1
CXA3202N
16 pin SSOP (Plastic)
E97808-PS
TX Gain Control Amplifier
Description
CXA3202N is a TX gain control amplifier suitable
for CDMA cellular/PCS phone.
Features
Wide gain control range
Linear gain slope
Wideband operation (50MHz to 300MHz)
Very small package (16 Pin SSOP)
Low voltage operation
High output IP3
Power save function included
Absolute Maximum Ratings
Supply voltage
V
CC
6
V
Operating temperature
Topr 55 to +125 C
Storage temperature
Tstg 65 to +150 C
Allowable Power dissipation P
D
330
mW
Supply voltage range
0.3 to 6
V
Logic input voltage
0.3 to V
CC
+ 0.3 V
Signal input voltage
0.3 to V
CC
+ 0.3 V
Differental signal input voltage
0 to 2.5
V
Operating Condition
Supply voltage
V
CC
2.7 to 3.8
V
Applications
CDMA cellular/PCS phone
Structure
Bipolar silicon monolithic IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
For the availability of this product, please contact the sales office.
2
CXA3202N
Block Diagram
Pin Configuration
OUT
OUTX
IF Output
GCTL
V
CC
1, 2
GND1, 2
PSV
Gain control
Supply Voltage
Ground
Power Save
CDMA IN
CDMA INX
IF Input
Bias
Driver
16
GCTL
15
NC
14
V
CC
1
13
V
CC
2
12
GND1
11
GND2
10
OUT
9
OUTX
1
CDMA IN
2
CDMA INX
3
NC
4
GND1
5
GND2
6
NC
7
NC
8
PSV
3
CXA3202N
Pin
No.
Symbol
Pin voltage
TYP (V)
Equivalent circuit
Description
40k
40k
GND
2
1
3
6
7
15
NC
No connection.
1
CDMA IN
Differential input pins for CDMA
transmit IF signal.
2
CDMA INX
1.1
1.1
Pin Description
8
PSV
Power save function pin.
High: Active
Low: Power save
--
GND
V
CC
1
135k
8
9
OUTX
Differential output pins for transmit
IF signal.
Open collector output.
--
10
OUT
--
GND
V
CC
2
9
10
12.25k
12.25k
510
510
4
12
GND1
Ground
Ground
5
11
GND2
0
0
13
V
CC
2
Positive power supply for output
stage.
3.0
14
V
CC
1
Positive power supply.
3.0
4
CXA3202N
Pin
No.
Symbol
Pin voltage
TYP (V)
Equivalent circuit
Description
16
GCTL
Gain control pin.
--
GND
V
CC
1
6k
6k
16
8k
8k
5
CXA3202N
1
Adjust GCTL voltage, and set the overall gain to 15dB.
Electrical Characteristics
DC Characteristics
Current consumption 1
Current consumption 2
Input current pin 8H
Input current pin 8L
Input current pin 16H
Input current pin 16L
PSV high voltage
PSV low voltage
I
CC
1
I
CC
2
IpsvH
IpsvL
IgctlH
IgctlL
VpsH
VpsL
mA
A
V
Parameter
Symbol
Conditions
Min.
Unit
Vpsv = 3.0V, Vgctl = 1.5V, Pin 13, 14
Vpsv = 0 V, Vgctl = 1.5V, Pin 13, 14
Vpsv = 3.0V
Vpsv = 0 V
Vgctl = 3.0V
Vgctl = 0.5V
Pin 8
Pin 8
10
5
15
1
2.5
Typ.
15.7
18
Max.
21.5
40
1
1
0.5
(V
CC
= 3.0V, Ta = 27C)
AC Characteristics
Operating frequency
range
Gain 2.3
Gain 1.5
Gain 1.0
Gain 0.7
CDMA Gain slope
Input level 3rd order
intercept point
Noise Figure
Fr
G2.3
G1.5
G1.0
G0.7
G
CLIN
IIP3
NF
MHz
dB
dB/V
dBm
dB
Parameter
Symbol
Conditions
Min.
Unit
f = 130.38MHz, level = 22.5dBm,
Vgctl = 2.3V
Vgctl = 1.5V
Vgctl = 1.0V
Vgctl = 0.7V
Gain at Vgctl = 2.0V Gain at Vgctl = 1.0V
G = 15dB
1
f1= 129.38MHz, f2 = 131.38MHz
Measure of 130.38MHz
G = 15dB
1
Measure of 130.38MHz
50
13
28
58
75
56
8.5
Typ.
17
24
54
70
59
4.5
28
Max.
300
21
20
50
65
62
32
(V
CC
= 3.0V, Ta = 27C)
6
CXA3202N
Measurement Circuit
2k
1000p
1000p
1
1
A8
V8
1k
A16
0.01
V16
A14
0.01
V14
2.4k
1
OUTPUT
9
10
11
12
13
14
15
16
2
3
4
5
6
7
8
1
GCTL
NC
V
CC
1
V
CC
2
GND1
GND2
OUT
OUTX
CDMA IN
CDMA INX
NC
GND1
GND2
NC
NC
PSV
CDMA
INPUT
2
820n
3
820n
3
1
TOKO, Inc. B5FL 616DS-1135
2
Coilcraft, Inc. 1008HS-102TKBC
3
Coilcraft, Inc. 1008HS-821TKBC
7
CXA3202N
Application Circuit
1000p
1000p
1k
0.01
Gain Control
Voltage
0.01
CDMA
RX IF
INPUT
1000p
1000p
RX IF
OUTPUT
9
10
11
12
13
14
15
16
2
3
4
5
6
7
8
1
GCTL
NC
V
CC
1
V
CC
2
GND1
GND2
OUT
OUTX
CDMA IN
CDMA INX
NC
GND1
GND2
NC
NC
PSV
V
CC
Active
Sleep
100p
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
Must be adjusting values to result a best impedance matching between BPF filter and this IC.
8
CXA3202N
Design Reference Values
Single ended measurement
(V
CC
= 3.0V, Ta = 27C)
Item
Symbol
Conditions
Input resistance
Input capacitance
Output resistance
Output capacitance
Rin
Cin
Rout
Cout
Typ.
10
0.98
6.0
0.92
Unit
k
pF
k
pF
f = 130.38MHz, Vgctl = 1.5V
Notes on Operation
1) This IC is a wideband amplifier with wide gain control range. The decouping capacitors between GND Pin
and V
CC
Pin should be as close to the IC as possible.
2) The resistors connected to Pins 9 and 10 should be as close to the IC as possible.
3) This IC assumes the excellent characteristics when the differential input impedance between Pins 1 and 2 is
500
. Refer to the Measurement Circuit for the external element settings, etc.
4) Pay attention to handling this IC because its electrostatic discharge strength is weak.
9
CXA3202N
Sensitivity
0
Vgctl [V]
0.5
1
1.5
2
2.5
3
100
60
40
20
0
20
40
Power gain [dB]
T = 40C
T = 27C
T = 85C
V
CC
= 3.0V
Noise Figure
80
Power gain [dB]
60
20
0
20
20
30
40
50
60
70
Noise figure [dB]
40
Gain Error from Room Temp
80
Power gain [dB]
0
20
40
6
4
2
2
4
6
Gain error [dB]
T = 40C
T = 85C
V
CC
= 3.0V
0
60
40
20
IIP3
Power gain [dB]
60
20
0
20
40
15
10
5
0
5
10
15
IIP3 [dBm]
T = 40C
T = 27C
T = 85C
V
CC
= 3.0V
40
80
90
V
CC
= 3.0V
80
3.5
V
CC
= 3.0V
T = 40C
T = 27C
T = 85C
100
10
CXA3202N
Package Outline
Unit: mm
16PIN SSOP (PLASTIC)
SONY CODE
EIAJ CODE
JEDEC CODE
PACKAGE STRUCTURE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE MASS
EPOXY RESIN
SOLDER / PALLADIUM
42/COPPER ALLOY
0.1g
SSOP-16P-L01
SSOP016-P-0044
5.0 0.1
0.65
0.22 0.05
+ 0.1
8
1
9
16
4.4
0.1
6.4
0.2
0.1 0.1
0.5
0.2
0 to 10
0.15 0.02
+ 0.05
1.25 0.1
+ 0.2
A
DETAIL A
0.1
PLATING
NOTE: Dimension "
" does not include mold protrusion.
0.13 M
NOTE : PALLADIUM PLATING
This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame).
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