1
PE00Y17-PS
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXA3329ER
24 pin VQFN (Plastic)
Analog Signal Processor TX-IF IC for W-CDMA Cellular Phones
Description
The CXA3329ER is an analog signal processor
TX-IF IC for the W-CDMA cellular phones. This IC
contains voltage-controlled gain control amplifier and
quadrature modulator.
Features
Gain control amplifier with a linear and wide gain
variable range
I-Q quadrature modulator
Power saving switch
Low voltage operation (2.7 to 3.3V)
Small package (24-pin VQFN)
Applications
Analog signal processor TX-IF IC for the W-CDMA
cellular phones
Structure
Bipolar silicon monolithic IC
Absolute Maximum Ratings
Supply voltage
Vcc
0.3 to +5.5
V
Operating temperature Topr
55 to +125
C
Storage temperature
Tstg
65 to +150
C
Recommended Operating Conditions
Supply voltage
Vcc
2.7 to 3.3
V
Operating temperature Ta
25 to +85
C
Preliminary
2
CXA3329ER
Block Diagram
GCA control
Switch
1/2
1/4
4
5
3
2
1
6
15
14
16
17
18
13
AGCV
CC
1
AGCGND1
I
Q
IX
QX
NC
NC
MODV
CC
PV
CC
MODGND
PGND
9
8
10
11
12
7
NC
GND4
Local IN
NC
NC
Local SW
22
23
21
20
19
24
PS
VCONT
AGCV
CC
2
OUTX
AGCGND2
OUT
3
CXA3329ER
Pin Description
3, 4
5, 6
I, IX
Q, QX
1.425
I, Q inputs.
Applies a bias voltage from the
external source.
1
AGCV
CC
1
2.85
2
AGCGND1
0
Positive power supply.
Ground.
PV
CC
PGND
GND4
10
0.5k
50
2k
2k
MODV
CC
MODGND
5
3
6
4
150
2k
150
PV
CC
PGND
7
30k
7
Local SW
--
Frequency division value selection.
High: 1/4 frequency division
Low: 1/2 frequency division
Open: Low
8, 9
NC
--
No connection.
10
Local IN
--
Local input.
11
12
13
14
15
16
GND4
NC
PGND
PV
CC
MODGND
MODV
CC
0
--
0
2.85
0
2.85
Ground.
No connection.
Ground.
Positive power supply.
Ground.
Positive power supply.
Pin
No.
Symbol
Equivalent circuit
Description
Typical pin
voltage [V]
4
CXA3329ER
AGCV
CC
2
AGCGND2
20
20k
6k
6k
8k
8k
AGCV
CC
1
AGCGND1
890
890
25 25
23
24
AGCV
CC
2
AGCGND2
60k
19
40k
19
PS
17, 18 NC
Power saving mode switch input.
High: Active mode
Low: Power saving mode
No connection.
--
--
IF signal differential output.
Gain control voltage input.
20
VCONT
--
23
24
OUTX
OUT
--
21
AGCV
CC
2
Positive power supply.
2.85
22
AGCGND2
Ground.
0
Pin
No.
Symbol
Equivalent circuit
Description
Typical pin
voltage [V]
5
CXA3329ER
Input Conditions for Each Pin
Item
Symbol
I/Q bias voltage
I/Q input voltage
I/Q band width
Local switch voltage-High
Local switch voltage-Low
Local frequency
Local input level
PS voltage-High
PS voltage-Low
Control voltage range
VB
IQ
V
IQ
BW
IQ
V
LSH
V
LSL
f
LO
LO
V
PSH
V
PSL
V
CN
Differential input
Conditions
1.35
--
--
2.5
0
--
18
2.0
0
0
Min.
1.425
0.4
--
760
15
Typ.
1.65
1
5
V
CC
0.8
--
12
V
CC
0.8
V
CC
Max.
V
Vp-p
MHz
V
V
MHz
dBm
V
V
V
Unit
Pin
No.
3, 4,
5, 6
3, 4,
5, 6
3, 4,
5, 6
7
7
10
10
19
19
20
6
CXA3329ER
Electrical Characteristics
Unless otherwise specified, the I/Q baseband input signals and local input signal use the conditions shown in
the Electrical Characteristics Measurement Circuit and the control voltage and power saving pins are set to
VCONT = 2.3V, PS = high.
The local switching pin is left open (1/2 frequency division).
IF output impedance is 1k
.
Values measured with a Sony evaluation board.
Note1) Set the control voltage so that the output power becomes 15dBm under the conditions shown in
the Electrical Characteristics Measurement Circuit. Input the two tone signals of 570kHz, 200mVp-p
and 630kHz, 200mVp-p to I-IX; and also input to Q-QX the two tone signals whose phases are
deviated by 90 degrees from those signals.
The ratio of the desired component and the 3rd order harmonic component of the outputs resulted
from the above is measured, and the power level that is made by adding the half ratio to the desired
component power level is labeled as the output IP3. See the figure on the next page.
Item
Symbol
DC Characteristics
Current consumption 1
Current consumption 2
Power saving current
AC Characteristics
Output IP3
Output power 1
Output power 2
Gain control range
Output noise power 1
I, Q residual sideband
product
Carrier leak
Input I/Q phase error
Input I/Q gain error
Imax
Imin
Ips
OIP3
P
O1
P
O2
Gcr
No
1
Img
CL
IQ
PE
IQ
GE
VCONT = 2.85V
VCONT = 0V
PS = low (in power saving mode)
Note1
VCONT = 2.3V,
differential output, f = 380MHz
VCONT = 0.3V,
differential output, f = 380MHz
VCONT = 0.3 to 2.3V,
f = 380MHz
VCONT = 1.8V,
I/Q inputs are no signal.
Suppression ratio of desired signal
(f = 380 + 1) MHz and image
signal (f = 380 1) MHz
Ratio of desired signal
(f = 380 + 1) MHz and local leak
(f = 380) MHz
Input signal I/Q phase difference
90 when the output signal I/Q
phase difference is 90.
I/Q input signal level difference
when the output signal I/Q levels
are the same.
Conditions
--
8.5
19
83
54
--
--
--
3
2.5
Min.
24
17
--
15
77
62
--
--
--
0
0
Typ.
5
11
73
70
147
25
18
3
2.5
Max.
mA
A
dBm
dBm
dB
dBm/
Hz
dBc
deg
dB
Unit
A
A
A
B
B
B
B
B
B
B
B
B
Measurement
point
7
CXA3329ER
f0 + 510kHz
f0 + 570kHz
f0 + 630kHz
f0 + 690kHz
S
IM3
Frequency
OIP3 = S + (S IM3)/2
A
Output level
8
CXA3329ER
Electrical Characteristics Measurement Circuit
A
Baseband signal input
Gain = 1
Gain = 1
cos (2
f)
f = 1MHz
400mVp-p
sin (2
f)
f = 1MHz
400mVp-p
10k
10k
10k
10k
1/2
Vcc
1/4 frequency
division
1n
1
1n
1
1n
fLO = 760MHz
15dBm
Local signal input
1/2 frequency
division
Vcc
Active
Power save
1k
1n
1n
1n
22n
1
22n
1
1
2
OUTPUT B
1n
1
1
1
1
1
4
5
3
2
1
6
15
14
16
17
18
13
AGCV
CC
1
AGCGND1
I
Q
IX
QX
NC
NC
MODV
CC
PV
CC
MODGND
PGND
9
8
10
11
12
7
NC
GND4
Local IN
NC
NC
Local SW
22
23
21
20
19
24
PS
VCONT
AGCV
CC
2
OUTX
AGCGND2
OUT
1
Murata, Inc. LQN21A22NJ (K) 04
2
TOKO, Inc. B5FL 616DS-1135
9
CXA3329ER
Application Circuit
Adjust these values so that the impedance matching with this IC is optimum.
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
Baseband signal
10k
10k
10k
10k
1/2
Vcc
1/4 frequency
division
1n
1
1n
1
1n
Local signal
1/2 frequency
division
Vcc
Active
Power save
1k
1n
1n
1n
1
1n
1
1
1
1
1
4
5
3
2
1
6
15
14
16
17
18
13
AGCV
CC
1
AGCGND1
I
Q
IX
QX
NC
NC
MODV
CC
PV
CC
MODGND
PGND
9
8
10
11
12
7
NC
GND4
Local IN
NC
NC
Local SW
22
23
21
20
19
24
PS
VCONT
AGCV
CC
2
OUTX
AGCGND2
OUT
10
CXA3329ER
Description of Operation
1. Outline of operation
This IC performs the signal processing between the analog transmit baseband processor block and the analog
transmit RF processor block of the cellular phone. The figure below shows the general circuit block diagram for
the portable cellular phones using this IC. The input for this IC is connected to the baseband signal processor
block; the output is connected to the analog RF processor block.
2. IC Internal Signal Flow
Two baseband-processed signals I, Q and the local signal are input to this IC as shown in the figure below.
The local signal is 1/2-frequency divided, and that signal becomes the quadrature I/Q local signal. The
baseband I/Q signals are input to the quadrature modulatar, and baseband processing to IF upconversion is
performed with the quadrature local signals. The signal is input to the gain control amplifier, and output after
the gain controlled to the necessary level.
RF receive/
transmit processor
Baseband signal
processor
CXA3328TN
CXA3329ER
1/2 div
(1/4 div)
90
I/IX
Q/QX
OUT/OUTX
Local
0
11
CXA3329ER
Notes on Operation
1. Baseband signal I/Q input
Pins 3 to 6, where the baseband signal is input, do not have a determined voltage internally on the IC.
Therefore, a bias voltage equivalent to 1/2V
CC
should be applied externally.
2. IF signal output
The IF signal outputs, OUT/OUTX, are differential outputs. The output impedance should be 1k
including the
external resistance with differential. Also, it is necessary to connect the inductor to eliminate the parasitic
capacitance in the IC.
3. Notes on power supplies
The CXA3329ER is designed to operate by a 2.85V stabilized power supply to allow use with the battery
driven portable phones. Using the multiple voltage regulators throughout the phone is recommended to
minimize the power supply noise in the CXA3329ER power supply unit. The recommended power supply range
for the CXA3329ER is from 2.7V to 3.3V. Decouple the power supplies around the CXA3329ER using 1F
capacitor for each V
CC
pin. Locate this capacitor as close to the pins as possible to minimize the series
inductance. Using an additional 1nF decoupling capacitor in parallel to the 1F capacitor is recommended to
further reduce the high frequency noise in the power supply input to the CXA3329ER.
12
CXA3329ER
Design Materials (Design Guarantee)
Electrical Characteristics
(V
CC
= 2.7 to 3.8V, Ta = 25 to +85C)
Unless otherwise specified, the I/Q baseband input signals and local input signal use the conditions shown in
the Electrical Characteristics Measurement Circuit and the control voltage and power saving pins are set to
VCONT = 2.3V, PS = high.
The local switching pin is left open (1/2 frequency division).
IF output impedance is 1k
.
Values measured with a Sony evaluation board.
DC Characteristics
Current consumption 1
Current consumption 2
Power saving current
AC Characteristics
Output IP3
Output power 1
Output power 2
Gain control range
Gain accuracy
Gain flatness
Output noise power 1
Output noise power 2
I, Q residual sideband
product
Carrier leak
Input I/Q phase error
Input I/Q gain error
Error vector magnitude
Response time
Imax
Imin
Ips
OIP3
P
O1
P
O2
Gcr
Gct
Gflat
No
1
No
2
Img
CL
IQ
PE
IQ
GE
EVM
Tr
VCONT = 2.85V
VCONT = 0V
PS = low (in power saving mode)
Note1 (See page 6.)
VCONT = 2.3V,
differential output, f = 380MHz
VCONT = 0.3V,
differential output, f = 380MHz
VCONT = 0.3 to 2.3V,
f = 380MHz
Difference between the output
powers where Ta = 25C, 85C
and Ta = 27C
IF 2.5MHz
P
O
= 25dB,
I/Q inputs are no signal.
P
O
= 65dBm,
I/Q inputs are no signal.
Suppression ratio of desired signal
(f = 380 + 1) MHz and image
signal (f = 380 1) MHz
Ratio of desired signal
(f = 380 + 1) MHz and local leak
(f = 380) MHz
Input signal I/Q phase difference
90 when the output signal I/Q
phase difference is 90.
I/Q input signal level difference
when output signal I/Q levels are
the same.
Until output rise of 90% after the
power is turned ON.
--
8.5
19
83
54
2
0.25
--
--
--
--
3
2.5
--
--
24
17
--
--
15
77
62
0
0
--
--
--
--
0
0
--
--
5
--
11
73
70
2
0.25
147
162
25
18
3
2.5
3
10
mA
A
dBm
dBm
dB
dB
dB
dBm/
Hz
dBc
deg
dB
%
s
A
A
A
B
B
B
B
B
B
B
B
B
B
B
B
B
B
Item
Symbol
Conditions
Min. Typ. Max.
Unit
Measurement
point
13
CXA3329ER
Design Materials (Design Guarantee)
Input Impedance
I/Q input resistance
I/Q input capacitance
VCONT pin input
resistance
Local IN input
resistance
R
IQ
C
IQ
R
VC
R
L
Single
Single
85
--
--
50
--
10
--
62.5
k
pF
k
3, 4, 5, 6
3, 4, 5, 6
20
10
Item
Symbol
Conditions
Min. Typ. Max.
Unit
Measurement
point
60
--
10
37.5
14
CXA3329ER
Sony Corporation
Package Outline Unit: mm
C
SONY CODE
EIAJ CODE
JEDEC CODE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE MASS
EPOXY RESIN
SOLDER PLATING
COPPER ALLOY
PACKAGE STRUCTURE
4.0
3.6
A
B
0.05 M S A-B C
S
(0.39)
(0.15)
VQFN-24P-03
24PIN VQFN(PLASTIC)
0.04g
0.1 S A-B C
x 4
0.1 S A-B C
x 4
0.4
0.05
S
0.7
C 0.6
1.0
4.78
TERMINAL SECTION
0.2
0.01
0.225
0.03
Solder Plating
0.14
0.13 0.025
+ 0.09
0.03
(Stand Off)
0.03 0.03 (
1)
0.6 0.1
45
0.9 0.1
PIN 1 INDEX
1
7
12
13
18
19
24
6
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