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Электронный компонент: CXG1006N

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1
CXG1006N
8 pin SSOP (Plastic)
E95Z31A66-ST
High-Frequency SPDT Antenna Switch
Description
The CXG1006N is a high power antenna switch
MMIC. This IC is designed using the Sony's GaAs J-
FET process and operates at a single positive power
supply.
Features
Single positive power supply operation
Low insertion loss 0.5dB (Typ.) at 2.0GHz
High isolation
27dB (Typ.) at 2.0GHz
High power switching
P1dB (Typ.)
32dBm
at 2.0GHz
V
CTL
(H) = 2.0V
34dBm
at 2.0GHz
V
CTL
(H) = 4.0V
Application
Antenna switch for digital cellular telephones
Structure
GaAs J-FET MMIC
Absolute Maximum Ratings (Ta = 25C)
Control voltage
Vctl
7
V
Operating temperature Topr
35 to +85
C
Storage temperature
Tstg
65 to +150
C
Operating Condition
Control voltage
0/4
V
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
For the availability of this product, please contact the sales office.
2
CXG1006N
Electrical Characteristics
V
CTL
(L) = 0V, V
CTL
(H) = 4V, P
IN
= 30dBm, R
RF
= 75k
(Ta = 25C)
Item
Insertion Loss
Isolation
Insertion Loss
Isolation
Insertion Loss
Isolation
VSWR
Switching Time
Symbol
IL1
ISO1
IL1.5
ISO1.5
IL2
ISO2
VSWR
TSW
Test Condition
f = 1.0GHz
f = 1.5GHz
f = 2.0GHz
Min.
35
29
24
Typ.
0.3
40
0.4
32
0.5
27
100
Max.
0.6
0.7
0.8
1.5
Unit
dB
dB
dB
dB
dB
dB
ns
V
CTL
(L) = 0V, f = 2GHz
(Ta = 25C)
Item
1dB Compression Point
1dB Compression Point
V
CTLA
V
CTLB
High
Low
Low
High
Port1-Port2 ON
Port1-Port3 OFF
Port1-Port2 OFF
Port1-Port3 ON
Symbol
P1dB (3)
P1dB (4)
Test Condition
V
CTL
(H) = 3V
V
CTL
(H) = 4V
Min.
30
32
Typ.
32
34
Max.
Unit
dBm
dBm
V
CTL
(L) = 0V, R
RF
= 75k
(Ta = 25C)
Item
Control Current
Control Current
Control Current
Symbol
I
CTL
(1)
I
CTL
(2)
I
CTL
(3)
Test Condition
V
CTL
(H) = 3V
V
CTL
(H) = 4V
V
CTL
(H) = 5V
Min.
Typ.
100
150
200
Max.
170
220
270
Unit
A
A
A
CTLB
Port1
GND
CTLA
GND
GND
Port2
Port3
8 pin SSOP (PLASTIC)
2
3
4
5
6
7
8
1
Package Outline/Pin Configulation
Port1
Port2
Port3
Block Diagram
3
CXG1006N
Recommended Circuit
100pF
100pF
CTLB
Port1
CTLA
Port3
Port2
100pF
100pF
100pF
1
2
3
4
5
6
7
8
R
RF
75k
R
RF
75k
R
RF
is used to stabilize the electrical characteristics at high power signal input
Example of Representive Characteristics (Ta = 25C)
0
2
4
6
0
10
20
30
24
28
32
40
36
44
Insertion Loss [dB]
Isolation [dB]
VCTL(H)=3V
VCTL(H)=4V
V
CTL
(H) = 5V
V
CTL
(H) = 4V
V
CTL
(H) = 3V
Insertion Loss
Insertion Loss and Isolation vs. Input Power
Input Power [dBm]
Isolation
@2.0GHz
3
2
1
0
5
4
3
2
1
0
50
40
30
20
10
0
Frequency [GHz]
Insertion Loss [dB]
Isolation [dB]
Insertion Loss
Isolation
Insertion Loss and Isolation vs. Frequency
V
CTL
(H) = 3V
V
CTL
(H) = 4V
V
CTL
(H) = 5V
4
CXG1006N
Package Outline
Unit: mm
SONY CODE
EIAJ CODE
JEDEC CODE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE WEIGHT
EPOXY RESIN
SOLDER / PALLADIUM
COPPER ALLOY
PACKAGE STRUCTURE
SSOP-8P-L01
PLATING
SSOP008-P-0044
0.04g
8PIN SSOP (PLASTIC)
0.24 0.07
+ 0.08
0.65
3.0 0.1
4.4
0.1
1.25 0.1
+ 0.2
0.1
A
6.4
0.2
B
0.24 0.07
+ 0.08
(0.22)
0.17 0.015
+ 0.025
(0.15)
0.1 0.05
0.25
0 to 10
0.6
0.15
(0.5)
1
4
5
8
0.13 M
DETAIL B
A
DETAIL
NOTE: Dimension "
" does not include mold protrusion.