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Электронный компонент: CXG1156K

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1
E02641-PS
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXG1156K
10 pin LCC (Ceramic)
Power Amplifier Module for JCDMA
Description
The CXG1156K is the power amplifier module which
operates at a single power supply. This IC is designed
using the Sony's original p-Gate HFET process.
Features
Single power supply operation:
V
DD1
= V
DD2
= 3.5V (High power mode),
1.3V (Low power mode 1),
1.0V (Low power mode 2),
V
GG
= 2.7V
Small package: 0.065cc (6.2mm
6.2mm
1.7mm)
High efficiency:
add = 40%@P
OUT
= 27.5dBm (High power mode),
add = 23%@P
OUT
= 15dBm (Low power mode 1)
Output power (high/low power mode switching supported):
P
OUT
= 18 to 27.5dBm: High power mode,
P
OUT
= 15 to 18dBm: Low power mode 1,
P
OUT
15dBm: Low power mode 2
Gain: Gp = 29dB (@900MHz)
Applications
Power amplifier for JCDMA system cellular phones
Structure
p-Gate HFET module
Absolute Maximum Ratings (Ta = 25C)
Operating case temperature
Tcase
30 to +90
C
Storage temperature
Tstg
30 to +125
C
Bias voltage
V
DD1
, V
DD2
6
V
Bias voltage
V
GG
3.3
V
(@V
DD1
= V
DD2
= 3.5V)
Input power
P
IN
8
dBm
Recommended Operating Conditions*
V
DD1
= V
DD2
= 3.2 to 4.2V@P
OUT
= 18 to 27.5dBm,
1.3 to 2.0V@P
OUT
18dBm,
1.0 to 2.0V@P
OUT
15dBm
V
GG
= 2.7V 1%
*This recommended operating voltage is the value that specified the supply voltage range where the functional
operation was confirmed by the Sony's recommended evaluation board.
GaAs module is ESD sensitive devices. Special handling precautions are required.
2
CXG1156K
Package Outline/Pin Configuration
Front
Back
8
V
GG
1
P
IN
2
V
DD1
3
V
DD2
9
GND
5
GND
10
GND
4
GND
7
GND
6
P
OUT
11
GND
6
P
OUT
3
V
DD2
2
V
DD1
1
P
IN
5
GND
9
GND
4
GND
10
GND
7
GND
8
V
GG
Note) Be sure to solder the GND part (11) to the land.
For the land where the GND part (11) is connected, form the GND pattern by making the throgh holes
in the land.
3
CXG1156K
Electrical Characteristics
(ZS = ZL = 50
, IS-95 Modulation, Tc = 25C)
Item
Frequency
Current consumption 1
Current consumption 2
Current consumption 3
Gain 1
Gain 2
Gain 3
ACPR1
(High power mode)
ACPR2
(High power mode)
ACPR1
(Low power mode 1)
ACPR2
(Low power mode 1)
ACPR1
(Low power mode 2)
ACPR2
(Low power mode 2)
2nd, 3rd harmonics
Input VSWR
Gate current
Conditions
Min.
887
25
22
20
Typ.
Max.
925
420
110
90
47
58
50
58
50
58
23
2
2.5
Unit
MHz
mA
mA
mA
dB
dB
dB
dBc
dBc
dBc
dBc
dBc
dBc
dBc
mA
405
105
79
29
24
22
54
64
56
63
56
63
27
1.3
1.7
P
OUT
= 27.5dBm, V
DD
= 3.5V, V
GG
= 2.7V
P
OUT
= 15dBm, V
DD
= 1.3V, V
GG
= 2.7V
P
OUT
= 12dBm, V
DD
= 1.0V, V
GG
= 2.7V
P
OUT
= 27.5dBm, V
DD
= 3.5V, V
GG
= 2.7V
P
OUT
= 18dBm, V
DD
= 1.3V, V
GG
= 2.7V
P
OUT
= 15dBm, V
DD
= 1.0V, V
GG
= 2.7V
P
OUT
= 27.5dBm, V
DD
= 3.5V, V
GG
= 2.7V,
900kHz offset, 30kHz band width
P
OUT
= 27.5dBm, V
DD
= 3.5V, V
GG
= 2.7V,
1.98MHz offset, 30kHz band width
P
OUT
= 18dBm, V
DD
= 1.3V, V
GG
= 2.7V,
900kHz offset, 30kHz band width
P
OUT
= 18dBm, V
DD
= 1.3V, V
GG
= 2.7V,
1.98MHz offset, 30kHz band width
P
OUT
= 15dBm, V
DD
= 1.0V, V
GG
= 2.7V,
900kHz offset, 30kHz band width
P
OUT
= 15dBm, V
DD
= 1.0V, V
GG
= 2.7V,
1.98MHz offset, 30kHz band width
P
OUT
= 27.5dBm, V
DD
= 3.5V, V
GG
= 2.7V
V
DD
= 3.5V, V
GG
= 2.7V
V
GG
= 2.7V, P
OUT
27.5dBm
4
CXG1156K
Recommended External Circuit
GND
GND
C1
GND
GND
GND
C2
V
GG
C1: 1F
C2: 10F
C2
C1
P
OUT
P
IN
V
DD1
C2
C1
V
DD2
GND
Recommended Evaluation Board
Board material:
Glass fabric-base epoxy
Size:
40mm
50mm
0.6mm
Relative dielectric constant: 4.6
Front
Back
GND
P
OUT
GND
GND
V
GG
V
DD2
V
DD1
P
IN
GND
C1
C2
C1
C1
C2
C2
5
CXG1156K
Example of Representative Characteristics
Conditions: f = 900MHz
V
DD1
= V
DD2
= 3.5V, V
GG
= 2.7V (High power mode)
V
DD1
= V
DD2
= 1.3V, V
GG
= 2.7V (Low power mode 1)
Ta = 25C
P
OUT
vs. P
IN
P
IN
[dBm]
P
OUT
[dBm]
26
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
16
18
20
22
24
14 12 10 8 6 4 2 0
2
4
ACPR2 vs. P
OUT
P
OUT
[dBm]
A
C
PR2 [dBc]
48
56
54
52
50
58
60
62
64
66
68
70
72
74
76
78
I
DD
vs. P
OUT
P
OUT
[dBm]
I
DD
[mA]
4
600
550
500
450
400
350
300
250
200
150
100
50
0
10
8
6
12 14 16 18 20 22 24 26 28 30 32
4
10
8
6
12 14 16 18 20 22 24 26 28 30 32
V
DD
= 3.5V
V
DD
= 1.3V
V
DD
= 3.5V
V
DD
= 1.3V
V
DD
= 3.5V
V
DD
= 1.3V
ACPR1 vs. P
OUT
P
OUT
[dBm]
A
C
PR1 [dBc]
34
56
54
52
50
48
46
44
42
40
38
36
58
60
62
64
66
68
70
72
74
4
10
8
6
12 14 16 18 20 22 24 26 28 30 32
V
DD
= 3.5V
V
DD
= 1.3V
6
CXG1156K
Sony Corporation
Package Outline Unit: mm
10PIN LCC
SONY CODE
JEITA CODE
JEDEC CODE
LCC-10C-03
PACKAGE STRUCTURE
6.0
6.2 0.3
SOLDERING POINT
SOLDERING POINT
PIN 1 INDEX
X
Detail X
S
0.1
S
0.1Max
S
0.2
6.0
1.4 0.9
1.6
3.8
1.7 0.1
3.4 0.15
4.9
0.15
0.15
2
2-R0.2
4-R0.2
1
2
3
4
5
6
7
8
9
10
TERMINAL
COAT
Y
Detail Y
+ 0.5
6.2 - 0.3
COAT
TERMINAL
SUBSTRATE
1.1 0.15
0.15
R0.2
0.6 0.2
0.15
C0.1
NOTE: Dimension "
" does not include cutting burr.
1.7 0.15
PACKAGE MATERIAL
TREATMENT
MATERIAL
PACKAGE MASS
CERAMIC SUBSTRATE
NICKEL PLATING
GOLD PLATING
0.8g
TERMINAL
TERMINAL
2-R0.2