1
CXK582000TM/YM/M
-85LL/10LL
E94234-ST
262144-word
8-bit High Speed CMOS Static RAM
Description
The CXK582000TM/YM/M is a high speed CMOS
static RAM organized as 262144-words by 8 bits.
A polysilicon TFT cell technology realized
extremely low stand-by current and higher data
retention stability.
Special feature are low power consumption and
high speed and board package line-up.
The CXK582000TM/YM/M is a suitable RAM for
portable equipment with battery back up.
Features
Fast access time
(Access time)
-85LL
85ns (Max.)
-10LL
100ns (Max.)
Low standby current
40A (Max.)
Low data retention current
24A (Max.)
Single +5V supply: 4.5V to 5.5V.
Low voltage date retention : 2.0V (Min.)
Broad package line-up
CXK582000TM/YM
8mm
20mm 32 pin
TSOP Package
CXK582000M
525mil 32 pin
SOP Package
Function
262144 word x 8 bit static RAM
Structure
Silicon gate CMOS IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
Preliminary
CXK582000TM
32 pin TSOP (PIastic)
CXK582000YM
32 pin TSOP (PIastic)
CXK582000M
32 pin SOP (PIastic)
Block Diagram
Memory
Matrix
2048
1024
I /O Gate
Column
Decoder
Row
Decoder
Buffer
Buffer
Buffer
I /O Buffer
V
CC
GND
I/O1 I/O8
OE
WE
CE1
A10
A11
A9
A8
A15
A16
A14
A12
A7
A5
A6
A4
A3
A1
A0
A13
A2
CE2
A17
For the availability of this product, please contact the sales office.
2
CXK582000TM/YM/M
Address input
Data input output
Chip enable 1, 2 input
Write enable input
Output enable input
Power supply
Ground
Symbol
Description
Supply voltage
Input voltage
Input and output voltage
Allowable power dissipation
Operating temperature
Storage temperature
Soldering temperature time
V
CC
V
IN
V
I/O
P
D
Topr
Tstg
Tsolder
0.5 to +7.0
0.5
to V
CC
+ 0.5
0.5
to V
CC
+ 0.5
0.7
0 to +70
55 to +150
235 10
V
V
V
W
C
C
C s
Item
Symbol
Rating
Unit
Absolute Maximum Ratings
(Ta = 25C, GND = 0V)
V
IN
, V
I/O
= 3.0V Min. for pulse width less than 50ns.
Pin Description
A0 to A17
I/O1 to I/O8
CE1, CE2
WE
OE
V
CC
GND
Pin Configuration (Top View)
H
L
L
L
L
H
H
H
H
L
H
H
L
Not selected
Not selected
Output disable
Read
Write
High Z
High Z
High Z
Data out
Data in
I
SB1
, I
SB2
I
SB1
, I
SB2
I
CC1
, I
CC2
, I
CC3
I
CC1
, I
CC2
, I
CC3
I
CC1
, I
CC2
, I
CC3
CE1 CE2
OE
WE
Mode
I/O pin
V
CC
Current
Truth Table
: "H" or "L"
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A17
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
GND
CXK582000M
Vcc
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
I/O8
I/O7
I/O6
I/O5
I/O4
OE
A10
CE1
I/O8
I/O7
I/O6
I/O5
I/O4
GND
I/O3
I/O2
I/O1
A0
A1
A2
A3
18
19
20
21
22
23
24
25
26
27
28
29
30
32
A11
A9
A8
A13
WE
CE2
A15
Vcc
A17
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
31
17
A3
A2
A1
A0
I/O1
I/O2
I/O3
GND
I/O4
I/O5
I/O6
I/O7
I/O8
CE1
A10
OE
18
19
20
21
22
23
24
25
26
27
28
29
30
32
A4
A5
A6
A7
A12
A14
A16
A17
Vcc
A15
CE2
WE
A13
A8
A9
A11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
31
17
CXK582000TM
(Standard Pinout)
CXK582000YM
(Mirror image Pinout)
19
18
17
20
21
22
23
24
25
26
27
28
29
30
31
32
3
CXK582000TM/YM/M
Input leakage current
Output leakage current
Operating power supply
current
I
LI
I
LO
I
CC1
V
IN
= GND to V
CC
CE1 = V
IH
or CE2 = V
IL
or
OE = V
IH
or WE = V
IL
V
I/O
= GND to V
CC
CE1 = V
IL
, CE2 = V
IH
V
IN
= V
IH
or V
IL
I
OUT
= 0mA
-85LLX
-10LLX
0 to +70C
0 to +40C
+25C
1
1
--
--
--
--
12
24
--
--
--
--
--
--
1.4
0.6
40
8
4
3
A
mA
--
--
7
45
40
+1
+1
15
80
70
A
A
mA
mA
mA
Item
Symbol
Min.
Typ.
Max.
Unit
Test conditions
Electrical Characteristics
DC Characteristics
(V
CC
= 5V 10%, GND = 0V, Ta = 0 to +70C)
V
CC
= 5V, Ta = 25C
Average operating current
Output high voltage
Output low voltage
Standby current
I
CC2
I
CC3
I
SB1
I
SB2
V
OH
V
OL
Min. cycle
duty = 100%
I
OUT
= 0mA
Cycle time 1s
duty = 100%
I
OUT
= 0mA
CE1
0.2V
CE2
Vcc 0.2V
V
IL
0.2V
V
IH
Vcc 0.2V
CE1 = V
IH
or CE2 = V
IL
I
OL
= 1.0mA
2.4
--
--
--
--
0.4
V
V
I
OH
= 1.0mA
CE2
0.2V
CE1
Vcc 0.2V
or
{
CE2
Vcc 0.2V
Supply voltage
Input high voltage
Input low voltage
Item
Symbol
Min.
Typ.
Max.
Unit
V
CC
V
IH
V
IL
4.5
2.2
0.3
5.0
--
--
5.5
V
CC
+ 0.3
0.8
V
V
V
DC Recommended Operating Conditions
(Ta = 0 to +70C, GND = 0V)
V
IL
= 3.0V Min. for pulse width less than 50ns.
4
CXK582000TM/YM/M
Input capacitance
I/O capacitance
Item
Symbol Test conditons
Min.
Typ.
Max.
Unit
C
IN
C
I/O
--
--
--
--
7
8
pF
pF
V
IN
= 0V
V
I/O
= 0V
Input pulse high level
Input pulse low level
Input rise time
Input fall time
Input and output reference level
Output load conditions
V
IH
= 2.2V
V
IL
= 0.8V
t
r = 5ns
t
f = 5ns
1.5V
C
L
= 100pF, 1TTL
Item
Conditions
AC Characteristics
AC test conditions
(V
CC
= 5V 10%, Ta = 0 to +70C)
C
L
includes scope and jig capacitances.
I/O capacitance
(Ta = 25C, f = 1MHz)
Note) This parameter is sampled and is not 100% tested.
TTL
C
L
5
CXK582000TM/YM/M
Item
Symbol
Min.
Max.
Min.
Max.
-85LL
-10LL
Unit
t
RC
t
AA
t
CO1
t
CO2
t
OE
t
OH
t
LZ1
,
t
LZ2
t
OLZ
t
HZ1
,
t
HZ2
t
OHZ
85
--
--
--
--
15
10
5
--
--
--
85
85
85
45
--
--
--
25
25
100
--
--
--
--
15
10
5
--
--
--
100
100
100
50
--
--
--
35
35
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Read cycle time
Address access time
Chip enable access time (CE1)
Chip enable access time (CE2)
Output enable to output valid
Output hold from address change
Chip enable to output in low Z (CE1, CE2)
Output enable to output in low Z (OE)
Chip disable to output in high Z (CE1, CE2)
Output disable to output in high Z (OE)
Read cycle (WE = "H")
t
HZ1
, t
HZ2
and t
OHZ
are defined as the time required for outputs to turn to high impedance state and are not
referred to as output voltage levels.
t
WHZ
is defined as the time required for outputs to turn to high impedance state and is not referred to as
output voltage level.
Item
Symbol
Min.
Max.
Min.
Max.
-85LL
-10LL
Unit
t
WC
t
AW
t
CW
t
DW
t
DH
t
WP
t
AS
t
WR
t
WR1
t
OW
t
WHZ
85
65
65
35
0
60
0
5
5
10
--
--
--
--
--
--
--
--
--
--
--
25
100
70
70
45
0
70
0
5
5
10
--
--
--
--
--
--
--
--
--
--
--
30
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Write cycle time
Address valid to end of write
Chip enable to end of write
Data to write time overlap
Data hold from write time
Write pulse width
Address setup time
Write recovery time (WE)
Write recovery time (CE1, CE2)
Output active from end of write
Write to output in high Z
Write cycle
(Ta = 0 to +70C)
(Ta = 0 to +70C)
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