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Электронный компонент: CXK5V8257BTM-70LL

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1
CXK5V8257BTM/BYM/BM
-70LL/10LL
E93836A5Z-ST
32768-word
8-bit High Speed CMOS Static RAM
Description
The CXK5V8257BTM/BYM/BM is 262,144 bits
high speed CMOS static RAM organized as 32768-
words by 8 bits.
A polysilicon TFT cell technology realized extermely
low stand-by current and higher data retention stability.
Operating on a single 3.3V supply, directly LVTTL
compatible (All inputs and outputs).
And special feature are, low power consumption,
high speed and broad package line-up.
The CXK5V8257BTM/BYM/BM is a suitable RAM
for portable equipment with battery back up.
Features
Single +3.3V supply: 3.3V 0.3V
Directly LVTTL compatible: All inputs and outputs
Fast access time:
(Access time)
CXK5V8257BTM/BYM/BM
-70LL
70ns (Max.)
-10LL
100ns (Max.)
Low standby current:
CXK5V8257BTM/BYM/BM
-70LL/10LL
3.5A (Max.)
Low power data retention: 2.0V (Min.)
Available in many packages
CXK5V8257BTM/BYM 8mm
13.4mm 28 pin
TSOP Package
CXK5V8257BM
450mil 28 pin
SOP Package
Function
32768-word
8 bit static RAM
Structure
Silicon gate CMOS IC
Block Diagram
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXK5V8257BTM
28 pin TSOP (Plastic)
CXK5V8257BYM
28 pin TSOP (Plastic)
CXK5V8257BM
28 pin SOP (Plastic)
Memory
Matrix
512
512
I /O Gate
Column
Decoder
Row
Decoder
Buffer
Buffer
Buffer
I /O Buffer
V
CC
GND
I /O1 I /O8
A14
A13
A12
A11
A9
A8
A7
A6
A5
OE
WE
CE
A4
A10
A3
A2
A1
A0
For the availability of this product, please contact the sales office.
2
CXK5V8257BTM/BYM/BM
Pin Configuration (Top View)
Pin Description
OE
A11
A9
A8
A13
WE
Vcc
A14
A12
A7
A6
A5
A4
A3
A10
CE
I/O8
I/O7
I/O6
I/O5
I/O4
GND
I/O3
I/O2
I/O1
A0
A1
A2
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
CXK5V8257BTM
(Standard Pinout)
A3
A4
A5
A6
A7
A12
A14
Vcc
WE
A13
A8
A9
A11
OE
A2
A1
A0
I/O1
I/O2
I/O3
GND
I/O4
I/O5
I/O6
I/O7
I/O8
CE
A10
CXK5V8257BYM
(Mirror Image Pinout)
7
6
5
4
3
2
1
28
27
26
25
24
23
22
1
2
3
4
5
6
7
8
9
10
11
12
13
14
19
18
17
16
15
20
21
22
23
24
25
26
27
28
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
GND
CXK5V8257BM
16
9
8
21
20
19
18
17
10
11
12
13
14
15
Vcc
WE
A13
A8
A9
A11
OE
A10
CE
I/O8
I/O7
I/O6
I/O5
I/O4
Address input
data input/output
Chip enable input
Write enable input
Output enable input
+3.3V power supply
Ground
A0 to A14
I/O1 to I/O8
CE
WE
OE
V
CC
GND
Symbol
Description
Supply voltage
Input voltage
Input and output voltage
Allowable power dissipation
Operating temperature
Storage temperature
Soldering temperature time
V
CC
V
IN
V
I/O
P
D
Topr
Tstg
Tsolder
0.5 to +4.6
0.5
1
to V
CC
+ 0.5
0.5
1
to V
CC
+ 0.5
0.7
0 to +70
55 to +150
235 10
V
V
V
W
C
C
C s
Item
Symbol
Rating
Unit
H
L
L
L
H
L
H
H
L
Not selected
Output disable
Read
Write
High Z
High Z
Data out
Data in
I
SB1
, I
SB2
I
CC1
, I
CC2
I
CC1
, I
CC2
I
CC1
, I
CC2
CE
OE
WE
Mode
I/O1 to I/O8
V
CC
Current
Absolute Maximum Ratings
(Ta = 25C, GND = 0V)
1
V
IN
, V
I/O
= 3.0V Min. for pulse width less than 50ns.
Truth Table
: "H" or "L"
DC Recommended Operating Conditions
(Ta = 0 to +70C, GND = 0V)
Supply voltage
Input high voltage
Input low voltage
V
CC
V
IH
V
IL
3.0
2.0
0.3
2
3.3
--
--
3.6
V
CC
+ 0.3
0.8
V
Item
Symbol
Min.
Typ.
Max.
Unit
2
V
IL
= 3.0V Min. for pulse width less than 50ns.
3
CXK5V8257BTM/BYM/BM
Input pulse high level
Input pulse low level
Input rise time
Input fall time
Input and output reference level
-70LL
-10LL
V
IH
= 2.0V
V
IL
= 0.8V
t
r = 5ns
t
f = 5ns
1.4V
C
L
2
= 30pF, 1TTL
C
L
2
= 100pF, 1TTL
Item
Conditions
TTL
C
L
Output load
conditions
AC Characteristics
AC test conditions (V
CC
= 3.3V 0.3V, Ta = 0 to +70C)
2
C
L
includes scope and jig capacitances.
I/O capacitance
(Ta = 25C, f = 1MHz)
Input capacitance
I/O capacitance
Item
Symbol Test condition
Min.
Typ.
Max.
Unit
C
IN
C
I/O
V
IN
= 0V
V
I/O
= 0V
--
--
--
--
8
10
pF
pF
Note) This parameter is sampled and is not 100% tested.
Electrical Characteristics
DC characteristics
(V
CC
= 3.3V 0.3V, GND = 0V, Ta = 0 to +70C)
Item
Symbol
Test Conditions
Min.
Typ.
1
Max.
Unit
Input leakage current
Output leakage
current
Operating power
supply current
Average operating
current
Standby current
Output high
voltage
Output low
voltage
I
LI
I
LO
I
CC1
I
CC2
I
SB1
I
SB2
V
OH
V
OL
VIN = GND to VCC
CE = V
IH
,
OE = V
IH
or WE = V
IL
,
V
I/O
= GND to V
CC
CE = V
IL
,
V
IN
= V
IH
or V
IL
,
I
OUT
= 0mA
Min. cycle,
Duty = 100%, I
OUT
= 0mA
CE
V
CC
0.2V
CE = V
IH
I
OH
= 2mA
I
OL
= 2.0mA
0.5
0.5
--
--
--
--
--
--
--
2.4
--
0.5
0.5
2
40
35
3.5
0.7
0.35
0.7
--
0.4
--
--
0.9
21
18
--
--
0.12
0.06
--
--
A
A
mA
mA
A
mA
V
V
1
V
CC
= 3.3V, Ta = 25C
70LL
10LL
0 to +70C
0 to +40C
+25C
4
CXK5V8257BTM/BYM/BM
-70LL
-10LL
Item
Symbol
Unit
Min.
Max.
Min.
Max.
-70LL
-10LL
Item
Symbol
Unit
Min.
Max.
Min.
Max.
t
RC
t
AA
t
CO
t
OE
t
OH
t
LZ
t
OLZ
t
HZ
1
t
OHZ
1
70
--
--
--
20
10
5
--
--
--
70
70
35
--
--
--
30
30
100
--
--
--
20
10
10
--
--
--
100
100
50
--
--
--
35
35
ns
ns
ns
ns
ns
ns
ns
ns
ns
Read cycle time
Address access time
Chip enable access time (CE)
Output enable to output valid
Output hold from address change
Chip enable to output in low Z (CE)
Output enable to output in low Z (OE)
Chip disable to output in high Z (CE)
Output disable to output in high Z (OE)
t
WC
t
AW
t
CW
t
DW
t
DH
t
WP
t
AS
t
WR
t
WR1
t
OW
t
WHZ
2
70
60
60
30
0
55
0
0
0
10
--
--
--
--
--
--
--
--
--
--
--
30
100
80
80
35
0
60
0
0
0
10
--
--
--
--
--
--
--
--
--
--
--
35
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Write cycle time
Address valid to end of write
Chip enable to end of write
Data to write time overlap
Data hold from write time
Write pulse width
Address setup time
Write recovery time (WE)
Write recovery time (CE)
Output active from end of write
Write to output in high Z
Read cycle (WE = "H")
1
t
HZ
and
t
OHZ
are defined as the time required for outputs to turn to high impedance state and are not
referred to as output voltage levels.
Write cycle
2
t
WHZ
is defined as the time required for outputs to turn to high impedance state and is not referred to as
output voltage level.
5
CXK5V8257BTM/BYM/BM
Address
t
AA
t
RC
t
OH
Data out
Previous data valid
Data valid
Address
t
AA
t
RC
t
CO
t
LZ
t
HZ
t
OHZ
t
OE
t
OLZ
CE
OE
Data out
High impedance
Data valid
Address
t
AW
t
WC
t
CW
t
AS
t
WP
t
DH
t
WHZ
t
DW
CE
WE
Data out
High impedance
Data valid
t
OW
(
2
)
(
2
)
OE
Data in
t
WR
(
1
)
Timing Waveform
Read cycle (1): CE = OE = V
IL
, WE = V
IH
Read cycle (2): WE = V
IH
Write cycle (1): WE control