CMOS 8-bit Single Chip Microcomputer

Description

The CXP823P24 is a highly integrated CMOS 8-bit

single-chip microcomputer which is mainly composed
of an 8-bit CPU, PROM, RAM and I/O ports. This
microcomputer features many other high-performance
circuits in a single-chip CMOS design, including an
A/D converter, serial interface, timer/counter, time-
base timer, capture timer/counter, fluorescent display
tube controller/driver, and remote control receiver.
Also, the CXP823P24 provides the power-on reset
function as well as the sleep/stop function which
assures reduced power consumption.

Being a PROM-incorporated version of the

CXP82324 which has on-chip mask ROM, the
CXP823P24 permits program writing. Therefore, it is
ideally suited for use in system development stage
evaluation and job lot production.

Features
· Instruction set which supports a wide array of data types 213 types

-- 16-bit arithmetic instruction/multiplication and division instructions/boolean bit operation instruction

· Minimum instruction cycle

During operation 400ns/10MHz

· Incorporated PROM capacity 24K bytes
· Incorporated RAM capacity

704 bytes (Including fluorescent display data area)

· Peripheral functions

-- A/D converter

8-bit, 8-channel, successive comparison type
(conversion time: 32µs at 10MHz)

-- Serial interface

1 channel data interface with an 8-bit, 8-stage FIFO
(1 to 8 byte automatic transfer)
1-channel, 8-bit clock synchronized interface

-- Timers

8-bit timer
8-bit timer/counter
19-bit time-base timer
16-bit capture timer/counter

-- Fluorescent display tube controller/driver

Display of up to 336 segments
1 to 16 digit dynamic display
Dimmer function
High voltage tolerance output (40V)
Built-in pull-down resistor

-- Remote control receiver

Built-in noise suppressor circuit
Built-in 8-bit pulse counter and 6-stage FIFO

· Interrupts

14 factors, 15 vectors, multiple interrupt pocessing

· Standby mode

Sleep/stop

· Package

80-pin plastic QFP

E92Y35A78-PS

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

CXP823P24

80 pin QFP (Plastic)

Structure

Silicon gate CMOS IC

CXP823P24

PE0/EC0/INT0

PA0/AN0 to

PA7/AN7

T0 to T7

T8/S28 to

T15/S21

S0 to S20

FDP

PE4/RMC

PB1/CS0

PB3/SI0

PB0/SO0

PB2/SCK0

PE0/INT0/EC0

PE7/TO

PB0/CINT

PE1/INT1/EC1

A/D CONVERTER

FDP

CONTROLLER/

DRIVER

REMOCON

8 BIT TIMER/COUNTER 0

8 BIT TIMER 1

16 BIT CAPTURE

TIMER/COUNTER 2

RAM

80 BYTES

FIFO

SERIAL

INTERFACE

UNIT 0

FIFO

INTERRUPT CONTROLLER

SPC700

CPU CORE

PROM

24K BYTES

CLOCK

GENERATOR/

SYSTEM CONTROL

RAM

704 BYTES

PRESCALER/

TIME BASE TIMER

PE1/EC1/INT1

PE2/INT2

PE3/INT3

PORT A

PORT B

PORT C

PORT D

PORT E

PORT F

PORT G

PA0 to PA7

PB0 to PB6

PC0 to PC7

PD0 to PD7

PE0 to PE5

PE6 to PE7

PF0 to PF7

PG0 to PG3

PB6/SI1

PB7/SO1

PB5/SCK1

SERIAL INTERFACE UNIT 1

RST

XTAL

EXTAL

PB7

Vpp

Block Diagram

CXP823P24

PE3/INT3

PE4/RMC

PE5

PE6

PE7/TO

PB0/CINT

PB1/CS0

PB2/SCK0

PB3/SI0

PB4/SO0

PB5/SCK1

PB6/SI1

PB7/SO1

PC0/KR0

PC1/KR1

PC2/KR2

PC3/KR3

PC4/KR4

PC5/KR5

PC6/KR6

PC7/KR7

PA0/AN0

PA1/AN1

PA2/AN2

T8/S28

T9/S27

T10/S26

T14/S22

T15/S21

S20

S19

S18

S17

S16

PF5/S13

PF4/S12

PF3/S11

PF2/S10

PF1/S9

PF0/S8

PD7/S7

PA3/AN3

PA4/AN4

PA5/AN5

RST

EXTAL

XTAL

PD0/S0

PD1/S1

PD2/S2

Vpp

PE2/IN2

PG2

PG1

PG0

FDP

31 32 33

70 69 68 67

25 26 27 28 29 30

T12/S24

T13/S23

T11/S25

PA6/AN6

PA7/AN7

PD3/S3

PD4/S4

PD5/S5

PD6/S6

PF7/S15

PF6/S14

PE1/EC1/INT1

PE0/EC0/INT0

PG3

Note) Vpp (Pin 73) is always connected to V

DD.

Pin Assignment (Top View)

CXP823P24

Pin Description

(Port A)
8-bit port; single bit
addressable.
(8 pins)

(Port B)
Single bit addressable from
amongst lower 7 bits;
highest bit (PB7)
dedicated to output.
(8 pins)

(Port C)
8-bit port; single bit
addressable. Can provide
12mA sink current.
(8 pins)

(Port E)
8-bit port with lower 6 bits
dedicated to input and
upper 2 bits dedicated to
output.
(8 pins)

Analog input to A/D converter.
(8 pins)

External capture input for 16-bit timer/counter.

Chip select input for serial interface (CH0).

Serial clock (CH0) input/output.

Serial data (CH0) input.

Serial data (CH0) output.

Serial clock (CH1) input/output.

Serial data (CH1) input.

Serial data (CH1) output.

Key return input for FDP segment signal
which performs key scanning.

Input for external
interrupt requests.
(4 pins)

Input for remote control receiving circuit.

Output pin for 16-bit timer/counter
rectangular waveform.

Symbol

I/O

Description

PA0/AN0

PA7/AN7

PB0/CINT

PB1/CS0

PB2/SCK0

PB3/SI0

PB4/SO0

PB5/SCK1

PB6/SI1

PB7/SO1

PC0/KR0

PC7/KR7

PE0/INT0/EC0

PE1/INT1/EC1

PE2/INT2

PE3/INT3

PE4/RMC

PE5

PE6

PE7/TO

PG0 to PG3

PF0/S8

PF7/S15

S16 to S20

T8/S28

T15/S21

T0 to T7

PD0/S0

PD7/S7

I/O/Analog input

I/O/Input

I/O/I/O

I/O/Input

I/O/Output

I/O/I/O

I/O/Input

Output/Output

I/O/Input

Input/Input/Input

Input/Input

Input

Output

Output/Output

I/O

Output/Output

Output

Output/Output

Output

Output/Output

(Port G)
4-bit input/output port; single bit addressable.
(4 pins)

(Port F)
8-bit dedicated output port.
(8 pins)

Segment signal output for FDP.

Dual purpose output for FDP timing and segment signals.

Timing signal output for FDP.

(Port D)
8-bit dedicated output port.
(8 pins)

Segment signal output for FDP.

External event input
to timer/counter.
(2 pins)

Segment signal
output for FDP.

CXP823P24

Provides voltage for FDP.

Connection for system clock oscillation crystal. When using an external
clock, input normal signal to EXTAL and reverse phase signal to the
XTAL pin.

System reset, active "L". The RST pin is an input/output pin which
outputs a "L" level from the on-chip power on reset circuit when the
power is turned on.

Positive power supply for the programmable on-chip PROM; connect to
V

for nomal operation.

Positive power supply pin.

GND

Symbol

I/O

Description

Input

Output

I/O

FDP

EXTAL

XTAL

RST

Vpp

CXP823P24

When reset

Circuit format

Input/Output Circuit Formats for Pins

RD (Port B)

Data bus

Port B direction

Port B output select

"0" when reset

SCK in

Schmitt input

Port B data

"0" when reset

SCK OUT

Output enable

Hi-Z

PB0/CINT
PB1/CS0
PB3/SI0
PB6/SI1

PB2/SCK0
PB5/SCK1

Port B

2 pins

Port A

Input multiplexer

RD (Port A)

Data bus

Port A direction

Port A data

"0" when reset

Port A input select

"0" when reset

A/D converter

Input
protection
circuit

RD (Port B)

Data bus

Port B direction

Port B data

"0" when reset

CINT
CS0
SI0
SI1

Schmitt input

PA0/AN0

PA7/AN7

8 pins

4 pins

CXP823P24

When reset

Circuit format

RD (Port B)

Data bus

Port B direction

Port B output select

"0" when reset

Port B data

"0" when reset

Output enable

Port B

Port C

Port E

1 pin

High level

Hi-Z

PB4/SO0

PB7/SO1

1 pin

8 pins

Hi-Z

PC0/KR0

PC7/KR7

5 pins

PE0/EC0/INT0
PE1/EC1/INT1
PE2/INT2
PE3/INT3
PE4/RMC

Port B

RD (Port C)

Data bus

Port C direction

Port C data

"0" when reset

Key input signal

Capable of driving 12mA large current

RD (Port E)

EC0/INT0
EC1/INT1
INT2
INT3
RMC

Data bus

Schmitt input

RD (Port B)

Data bus

Port B output select

"1" when reset

Port B data

"0" when reset

Output enable

Internal reset signal

Pull-up transistor

approx. 200k

CXP823P24

FDP

("0" when reset)

Segment output data

Output selection control signal

High voltage tolerance transistor

Mask option

Pull-down
resistor

21 pins

Oscillation

Low level

When reset

S16 to S20
T15/S21

T8/S28
T0 to T7

EXTAL

XTAL

2 pins

1 pin

RST

Hi-Z or
Low level
(when pull-
down resistor
is connected)

Port D

Port F

Circuit format

EXTAL

XTAL

Diagram shows

circuit construction
for oscillation.

During stop

feedback resistor is
disconnected.

Mask option

Schmitt input

Pull-up resistor

From power on reset circuit
(Mask option)

Hi-Z or
Low level
(when pull-
down resistor
is connected)

16 pins

PD0/S0

PD7/S7

PF0/S8

PF7/S15

FDP

RD (Port D or Port F)

Data bus

"0" when reset

Port D data or
Port F data

("0" when reset)

Segment output data

Output selection control signal

High voltage tolerance transistor

Mask option

Pull-down
resistor

CXP823P24

and V

OUT

cannot exceed V

+ 0.3V.

Rating for output current of general input/output port.

The large current drive transistor is an N-channel transistor of Port C.

Note) If the absolute maximum ratings are exceeded, the LSI could reach permanent breakdown. Also,

observing recommended operating conditions is desirable; otherwise, the LSI's reliability could be

affected.

Supply voltage

Input voltage

Output voltage

Display output voltage

High level output current

High level total output current

Low level output current

Low level total output current

Operating temperature

Storage temperature

Allowable power dissipation

Vpp

OUT

ODH1

ODH2

ODH

OLC

Topr

Tstg

Incorporated PROM

As P channel transistor is open drain,
V

voltage is determined as standerd.

Other than display output pins

: per pin

Display outputs S0 to S20: per pin

Display outputs T0 to T7,
T8/S28 to T15/S21: per pin

Total of other than display output pins

Total of display output pins

Port 1 pin

Large current port pin

Entire pin total

Item

Symbol

Rating

Unit

Remarks

Absolute Maximum Ratings

(Vss = 0V)

0.3 to +7.0

0.3 to +13.0

0.3 to +7.0

40 to

+ 0.3

100

10 to +75

55 to +150

600

°C

CXP823P24

High level input
voltage

Low level input
voltage

Operating temperature

Supply voltage

5.5

+ 0.3

0.3V

0.2V

0.4

+75

°C

Item

Symbol

Min.

Max.

Unit

Remarks

4.5

3.5

2.5

0.7V

0.8V

0.4

0.3

Vpp

IHS

IHEX

ILS

ILEX

Topr

High-speed mode (1/2, 1/4 clock) guaranteed
range during operation

Low-speed mode (1/16 clock) guaranteed range
during operation

Guaranteed data hold operation range during stop

Hysteresis input

EXTAL pin

Hysteresis input

EXTAL pin

All regular input ports (PA, PB3, PB4, PB6, PC, PE5, PG).

For pins RST, CINT, CS0, SCK0, SCK1, EC0/INT0, EC1/INT1, INT2, INT3, RMC.

Rating only for external clock input.

Vpp and V

should be set to the same voltage.

Recommended Operating Conditions

(Vss = 0V)

Vpp = V

CXP823P24

= 4.5V, I

= 0.5mA

= 4.5V, I

= 1.2mA

= 4.5V, I

= 1.8mA

= 4.5V, I

= 3.6mA

= 4.5V, I

= 12.0mA

= 5.5V, V

= 5.5V

= 5.5V, V

= 0.4V

= 5.5V, V

= 0.4V

High level
output voltage

4.0

3.5

0.5

1.5

µA

EXTAL

RST

Item

Symbol

Pins

Condition

Min.

DD1

DDSL

DDST

LOL

IHE

ILE

ILR

Low level
output voltage

Input current

Typ.

0.4

0.6

1.5

400

270

Max. Unit

Electrical Characteristics

DC Characteristics

(Ta = 10 to +75°C, Vss = 0V)

10MHz crystal
oscillator
(C

= C

= 15pF)

Sleep mode

Stop mode

Supply current

Input capacitance

= 4.5V

= V

2.5V

= 5.5V

= V

35V

FDP

= V

35V

= 5.5V

High-speed mode
(1/2 clock) operation

1MHz clock
0V other than the measured

Display output
current

Input/output leak
current

Open drain output
leak current
(P-CH Tr off state)

S0 to S20

S21/T15 to S28/T8
T0 to T7

S0 to S20
S21/T15 to S28/T8
T0 to T7

= 5V

FDP

= 30V

= 5.5V

= 0, 5.5V

Pull-down
resistor

S0 to S20
S21/T15 to S28/T8
T0 to T7

PA to PC, PE, PG

100

PA, PB, PC, PE6,
PE7, PG, RST
(for V

only)

For pins other
than S0 to S28,
T0 to T7, PB7,
PE6, PE7, V

, V

FDP

All output pins are left open.

CXP823P24

sys is determind by the upper two bits of the clock control resister (Address: 00FE

; CPU clock selected)

resulting in one of the 3 following values:

sys [ns] = 2000/fc (Upper 2 bits = "00"), 4000/fc (Upper 2 bits = "01"), 16000/fc (Upper 2 bits= "11")

EXTAL

0.4V

1/fc

External clock

EXTAL

XTAL

74HC04

Crystal oscillation
Ceramic oscillation

EXTAL

XTAL

AC Characteristics

(1) Clock timing

System clock frequency

System clock input pulse width

System clock input rising and
falling times

Event count input clock pulse
width

Event count input clock rising
and falling times

XTAL
EXTAL

EXTAL

EC0,
EC1

MHz

Item

Symbol

Pins

Conditions

Unit

Fig. 1, Fig. 2

Fig. 1, Fig. 2
External clock driver

Fig. 3

Min.

sys

Max.

200

(Ta = 10 to +75°C, V

= 4.5 to 5.5V, Vss = 0V)

Fig. 1. Clock timing

Fig. 2. Clock applying condition

0.2V

0.8V

EC0
EC1

Fig. 3. Event count clock timing

CXP823P24

Chip select transfer mode
(SCK0 = output mode)

Chip select transfer mode

Input mode

Output mode

Input mode

Output mode

SCK0 input mode

SCK0 output mode

SCK0 input mode

SCK0 output mode

SCK0 input mode

SCK0 output mode

Note 1)

sys is determind by the upper two bits of the clock control resister (Address: 00FE

; CPU clock

selected) resulting in one of the 3 following values:

sys [ns] = 2000/fc (Upper 2 bits = "00"), 4000/fc (Upper 2 bits = "01"), 16000/fc (Upper 2 bits = "11")

Note 2)

The load of SCK0 output mode and SO0 output delay time is 50pF + 1TTL.

(2) Serial transfer (CH0)

(Ta = 10 to +75°C, V

= 4.5 to 5.5V, Vss = 0V)

Item

CS0

SCK0

delay time

CS0

SCK0

float delay time

CS0

SO0

delay time

CS0

SO0

float delay time

CS0 high level width

SCK0 cycle time

SCK0
high and low level width

SI0 input setup time
(against SCK0

)

SI0 input hold time
(against SCK0

)

SCK0

SO0

delay time

DCSK

DCSKF

DCSO

DCSOF

WHCS

KCY

SIK

KSI

KSO

SCK0

SO0

CS0

SCK0

SI0

SO0

Symbol

Min.

sys + 200

100

sys + 200

16000/fc

sys + 100

8000/fc 50

100

200

sys + 200

100

Max.

Unit

Condition

CXP823P24

Serial transfer (CH1)

(Ta = 10 to +75°C, V

= 4.5 to 5.5V, Vss = 0V)

Item

Symbol

Min.

Max.

Condition

SCK1 cycle time

SCK1 high and low
level width

SI1 input setup time
(against SCK1

)

SI1 input hold time
(against SCK1

)

SCK1

SO1 delay time

KCY

SIK

KSI

KSO

SCK1

SI1

SO1

Input mode

Output mode

Input mode

Output mode

SCK1 input mode

SCK1 output mode

SCK1 input mode

SCK1 output mode

SCK1 input mode

SCK1 output mode

1000

16000/fc

400

8000/fc 50

100

200

100

200

100

Unit

Note) The load of SCK1 output mode and SO1 output delay time is 50pF + 1TTL.

Fig. 5. Serial transfer CH1 timing

SCK1

SI1

SO1

KCY

0.2V

0.8V

SIK

KSI

KSO

Input data

Output data

0.2V

0.8V

0.2V

0.8V

CXP823P24

(3) A/D converter characteristics

(Ta = 10 to +75°C, V

= 4.5 to 5.5V, Vss = 0V)

CONV

SAMP

IAN

A/D converter operation
only
Ta = 25°C
V

= 5.0V

= 0V

4930

160/f

ADC

12/f

ADC

Item

Symbol

Condition

Min.

Typ.

Max.

Unit

Bits

Resolution

Linearity error

Zero transition voltage

Full-scale transition
voltage

Conversion time

Sampling time

Analog input voltage

±3

150

5120

5050

LSB

µs

Analog input

Linearity error

Digital conversion value

Fig. 6. Definition of A/D converter terms

AN0 to AN7

: Digital Value converted between 00

to 01

: Digital Value converted between FE

and FF

ADC

: ADC operation clock selection (MSC: Bit 0 of

address 01FF

) and assumes following values:

ADC

= fc/2 when PS2 is selected.

ADC

= fc when PS1 is selected.

CXP823P24

External interrupt High and
Low level widths

Reset input Low level width

INT0
INT1
INT2
INT3

RST

8/fc

µs

Item

Symbol

Condition

Min.

Max.

Unit

RSL

(4) Interrupts, reset inputs

(Ta = 10 to +75°C, V

= 4.5 to 5.5V, Vss = 0V)

0.8V

0.2V

INT0

INT1

INT2

INT3

0.8V

0.2V

Fig. 7. Interrupt input timing

RSL

0.2V

RST

Fig. 8. RST input timing

0.2V

4.5V

OFF

The power supply should rise smoothly.

Fig. 9. Power-on reset

Power supply rising time

Power supply cut-off time

OFF

Item

Symbol

Condition

Min.

Max.

Unit

(5) Power-on reset

Power-on reset

(Ta = 10 to +75°C, V

= 4.5 to 5.0V, V

= 0V)

Power-on reset

Repetitive power-on reset

0.05

CXP823P24

Supplement

Fig. 10. Recommended Oscillation Circuit

EXTAL

XTAL

(i)

EXTAL

XTAL

(ii)

Manufacturer

MURATA MFG
CO., LTD

RIVER
ELETEC
CORPORATION

KINSEKI LTD.

CSA4.19MG

CSA8.00MTZ

CSA10.0MTZ

CST4.19MGW

CST8.00MTW

CST10.0MTW

HC-49/U03

HC-49/U (-S)

Model

fc (MHz)

4.19

8.00

10.00

4.19

8.00

10.00

4.19

8.00

10.00

4.19

8.00

10.00

(pF) C

(pF)

Circuit

Example

(i)

(ii)

(i)

Indicates types with on-chip grounding capacitors (C

and C

Optional item

Mask

CXP823P24Q-1-

Package

ROM capacity

Reset pin pull-up resistor

Power-on reset circuit

High voltage tolerance pin
pull-down resistor

80 pin plastic QFP

20K bytes/24K bytes

Existent/Non-existent

80 pin plastic QFP

PROM 24K bytes

Existent

Non-existent
(S0/PD0 to S15/PF7)
Existent (T0 to S16)

80 pin plastic QFP

PROM 24K bytes

Existent

(High voltage tolerance pin)

Product List

CXP823P24Q-2-

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