Description

The CXP824P40A is a CMOS 8-bit single chip

microcomputer integrating on a single chip an A/D
converter, serial interface, timer/counter, time base
timer, capture timer counter, fluorescent display tube,
controller/driver, remote control reception circuit, CTL
duty detection circuit, 14-bit PWM output and high-
speed output circuit besides the basic configurations
of 8-bit CPU, PROM, RAM, and I/O port.

The CXP824P40A also provides sleep/stop function

that enables lower power consumption.

CXP824P40A is the PROM-incorporated version of

the CXP82440A with built-in mask ROM. This
provides the additional feature of being able to write
directly into the program. Thus, it is most suitable for
evaluation use during system development and for
small-quantity production.

Features
· Wide-range instruction system (213 instructions) to cover various types of data

-- 16-bit arithmetic/multiplication and division/boolean bit operation instructions

· Minimum instruction cycle

400ns at 10MHz operation
122µs at 32kHz operation

· Incorporated PROM capacity

40K bytes

· Incorporated RAM capacity

1120 bytes (including fluorescent display area)

· Peripheral functions

-- A/D converter

8-bit, 8-channel, successive approximation method
(Conversion time of 32µs/10MHz)

-- Serial interface

Incorporated 8-bit, 8-stage FIFO
(Auto transfer for 1 to 8 bytes), 1 channel
8-bit clock sync type, 1 channel

-- Timers

8-bit timer, 8-bit timer/counter, 19-bit time base timer
16-bit capture timer/counter, 32kHz timer/counter

-- Fluorescent display tube controller/driver

Maximum of 384 segments display possible
1 to 16-digit dynamic display
Dimmer function
High voltage drive output (40V)
On-chip pull-down resistor (Mask option)
Hardware key scan function
(Maximum of 16

8 key matrix compatible)

-- Remote control receiving circuit

Incorporated noise elimination circuit
8-bit measurement counter with on-chip 6-stage FIFO

-- PWM output

14 bits, 1 channel

-- CTL duty detection circuit
-- High-speed output circuit

RTG 4 pins

· Interruption

19 factors, 15 vectors, multi-interruption possible

· Standby mode

SLEEP/STOP

· Package

100-pin plastic QFP

CXP824P40A

E94Z17-PP

CMOS 8-bit Single Chip Microcomputer

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

100 pin QFP (Plastic)

Structure

Silicon gate CMOS IC

CXP824P40A

Block Diagram

PE2/INT2

RAM

1120 BYTES

SPC 700

CPU CORE

INTERRUPT CONTROLLER

A/D CONVERTER

SERIAL

INTERFACE

UNIT 0

SERIAL INTERFACE UNIT 1

8 BIT TIMER/COUNTER 0

8 BIT TIMER 1

CTL DUTY DET

16 BIT CAPTURE

TIMER/COUNTER 2

PE3/INT3/NMI

PA0/AN0 to

PA7/AN7

PA0 to PA7

FIFO

REMOCON

FDP

CONTROLLER/

DRIVER

32kHz

TIMER/COUNTER

PRESCALER/

TIME BASE TIMER

Vpp

RST

PORT A

PORT B

PORT C

PORT D

PORT E

PORT F

PORT G

PORT H

PB0 to PB6

PC0 to PC7

PD0 to PD7

PE0 to PE5

PF0 to PF7

PG0 to PG7

PH0 to PH7

PE6 to PE7

TEX

EXTAL

XTAL

REF

T0 to T7

T15/S24 to T8/S31

PD0/S0 to PI7/S23

FDP

PE5/CTL

PE4/RMC

PB3/SI0

PB4/SO0

PB6/SI1

PB7/SO1

PB5/SCK1

PE0/INT0/EC0

PE7/TO

PB0/CINT

PE1/INT2/EC1

PB1/CS0

PB2/SCK0

PROM

40K BYTES

RAM

CLOCK GEN./

SYSTEM CONTROL

PB7

PORT I

PI0 to PI7

REALTIME

PULSE

GENERATOR

CH0

CH1

PG0/RTO0 to

PG3/RTO3

PE0/EC0/INT0

PE1/EC1/INT1

14 BIT PWM GENERATOR

PE6/PWM

PE7/DDO

PE7/ADJ

CXP824P40A

Pin Assignment (Top View)

PE1/EC1/INT1

PE2/INT2

PE3/INT3/NMI

PE4/RMC

PE5/CTL

PE6/PWM

PE7/TO/DDO/ADJ

PB0/CINT

PB1/CS0

PB2/SCK0

PB3/SI0

PB4/SO0

PB5/SCK1

PB6/SI1

PB7/SO1

PC0/KR0

PC1/KR1

PC2/KR2

PC3/KR3

PC4/KR4

PC5/KR5

PC6/KR6

PC7/KR7

PH0

PH1

PH2

PH3

PH4

PH5

PH6

T8/S31

T9/S30

T10/S29

T11/S28

T12/S27

T13/S26

T14/S25

T15/S24

PI7/S23

PI6/S22

PI5/S21

PI4/S20

PI3/S19

PI2/S18

PI1/S17

PI0/S16

PF7/S15

PF6/S14

PF5/S13

PF4/S12

PF3/S11

PF2/S10

PF1/S9

PF0/S8

PD7/S7

PD6/S6

PD5/S5

PD4/S4

PD3/S3

PH7

PA0/AN0

PA1/AN1

PA2/AN2

PA3/AN3

PA4/AN4

PA5/AN5

RST

EXTAL

XTAL

Vss

TEX

PA6/AN6

PA7/AN7

REF

AVss

PD0/S0

PD1/S1

PD2/S2

PE0/EC0/INT0

PG7

PG6

PG5

PG4

PG3/RTO3

PG2/RTO2

PG1/RTO1

PG0/RTO0

Vss

Vpp

FDP

31 32 33

41 42 43 44 45 46 47 48 49 50

88 87 86 85

100 99 98 97 96 95 94

Note) 1. Vpp (Pin 90) must be connected to V

2. Vss (Pins 41 and 91) are both connected to GND.

CXP824P40A

Pin Description

Pin code

I/O

Functions

I/O/
Analog input

PA0/AN0

PA7/AN7

(Port A)
8-bit I/O port. I/O can
be set in single bit
units.
(8 pins)

Analog inputs to A/D converter. (8 pins)

I/O/Input

PC0/KR0

PC7/KR7

PE0/INT0/
EC0

PE1/INT1/
EC1

PE2/INT2

PE3/INT3/
NMI

PE4/RMC

PE5/CTL

PE6/PWM

PE7/TO/
DDO/ADJ

PF0/S8

PF7/S15

PG0/RTO0

PG3/RTO3

PG4 to PG7

Input/Input/Input

Input/Input

Input/Input/Input

Input/Input

Output/Output

Output/Output/
Output/Output

Output/Output

I/O/Output

I/O

(Port C)
8-bit I/O port. I/O can
be set in a unit of single
bits. Capable of driving
12mA sync current.
(8 pins)

Serves as key return inputs when operating
key scan with FDP segment signal.

Output/Output

PD0/S0

PD7/S7

(Port D)
8-bit output port.
(8 pins)

FDP segment signal outputs.

(Port E)
8-bit port. Lower 6 bits
are for inputs; upper
2 bits are for outputs.
(8 pins)

(Port F)
8-bit output port.
(8 pins)

(Port G)
8-bit I/O port. I/O can
be set in a unit of single
bits. Data for the lower
4 bits are gated with the
contents of RTO or OR-gate output. (8 pins)

External event inputs for
timer/counter.
(2 pins)

Inputs for
external
interruption
request.
(4 pins)

Non-maskable interruption
request input.

Remote control reception circuit input.

Input for CTL duty direction circuit.

14-bit PWM output.

Output for the 16-bit timer/counter rectangular
waves, CTU duty detection, and 32kHz
oscillation frequency demultiplication.

FDP segment signal outputs.

Outputs for real-time pulse generator (RTG).
Functions as high-precision, real-time pulse
output port.
(4 pins)

I/O/Input

I/O/I/O

I/O/Input

I/O/Output

I/O/I/O

I/O/Input

Output/Output

PB0/CINT

PB1/CS0

PB2/SCK0

PB3/SI0

PB4/SO0

PB5/SCK1

PB6/SI1

PB7/SO1

(Port B)
8-bit I/O port. I/O for
lower 7 bits can be set
in a unit of single bits.
Uppermost bit (PB7) is
for output only.
(8 pins)

Capture input to 16-bit timer/counter.

Chip select input for serial interface (CH0).

Serial clock I/O (CH0).

Serial data input (CH0).

Serial data output (CH0).

Serial clock I/O (CH1).

Serial data input (CH1).

Serial data output (CH1).

CXP824P40A

Pin code

I/O

Functions

Output/Output

PI0/S16

PI7/S23

(Port I)
8-bit output ports.
(8 pins)

FDP segment signal outputs.

Output/Output

T8/S31

T15/S24

Outputs for FDP timing (digit) signals/segment signals.

I/O

PH0 to PH7

(Port H)
8-bit I/O port. I/O can be set in a unit of single bits.
(8 pins)

FDP

EXTAL

XTAL

TEX

RST

REF

Input

Output

Input

Output

Input

FDP voltage supply when incorporated resistor is set by mask option.

T0 to T7

FDP timing signal outputs.

Crystal connectors system clock oscillation. When the clock is supplied
externally, input to EXTAL; opposite phase clock should be input to
XTAL.

Crystal connectors for 32kHz timer/counter clock oscillation. Set 32kHz
crystal oscillator between TEX and TX. For usage as event input, attach
clock source to TEX, and open TX.

Low-level active, system reset.

Reference voltage input for A/D converter.

A/D converter GND.

Vcc supply.

Vpp

supply for incorporated PROM writing.

Connect to V

during normal operation.

GND.

Output

CXP824P40A

Port B data

Port B direction

RD (Port B)

Data bus

"0" when reset

Schmitt input

CINT

CS0

SI0
SI1

Port B data

Port B direction

RD (Port B)

Data bus

"0" when reset

Schmitt input

SCK in

Output enable

Port B output selection

"0" when reset

SCK OUT

Port B

8 pins

Hi-Z

When reset

PA0/AN0

PA7/AN7

PB0/CINT
PB1/CS0
PB3/SI0
PB6/SI1

Port B

4 pins

2 pins

Hi-Z

PB2/SCK0
PB5/SCK1

Port A data

Port A direction

Port A input selection

"0" when reset

RD (Port A)

Data bus

A/D converter

Input protection circuit

"0" when reset

Input multiplexer

I/O Circuit Format for Pins

Port A

Circuit format

CXP824P40A

1 pin

Hi-Z

High level

When reset

Circuit format

PB4/SO0

PB7/SO1

1 pin

8 pins

Hi-Z

PC0/KR0

PC7/KR7

6 pins

PE0/EC0/INT0
PE1/EC1/INT1
PE2/INT2
PE3/INT3/NMI
PE4/RMC
PE4/CTL

Data bus

RD (Port C)

Port C direction

Port C data

"0" when reset

High current drive of 12mA possible

Key input signal

Data bus

RD (Port B)

"1" when reset

Pull-up transistor approx.

200k

Port B output selection

Port B data

Output enable

Internal reset signal

"1" when reset

Port B data

Port B direction

RD (Port B)

Data bus

"0" when reset

Ouput enable

Port B output selection

"0" when reset

Port C

Port E

Port B

Schmitt input

RD (Port E)

Data bus

EC0/INT0
EC1/INT1
INT2
INT3/NMI
RMC
CTL

CXP824P40A

Port H

1 pin

High level

When reset

Circuit format

PE6/PWM

PE7/TO/
DDO/ADJ

1 pin

4 pins

Hi-Z

PG0/RTO0

PG3/RTO3

12 pins

PG4 to PG7
PH0 to PH7

Data bus

RD (Port G)

Port G data

"0" when reset

Port G direction

RTO data

"0" when reset

Data bus

Port E output selection

"0" when reset

Port E data

"1" when reset

RD (Port E)

Port E output selection

"00" when reset

Port E output selection

Output enable

ADJ2K

ADJ16K

DDO

0
1
2
3

MPX

ADJ signal is a frequency demultiplication

output for 32kHz oscillation frequency
adjustment.
ADJ2 can be used for buzzer output.

Data bus

RD (Port E)

Port E output selection

PWM

Port E data

"0" when reset

"1" when reset

Port G

Port E

Data bus

RD (Port G or Port H)

Port G or Port H data

"0" when reset

Port G or Port H direction

CXP824P40A

24 pins

Hi-Z or

Low level

(when PD

resistance is

added)

When reset

Circuit format

PD0/S0

PD7/S7

PF0/S8

PF7/S15

PI0/S16

PI7/S23

16 pins

T15/S24

T8/S31

T0 to T7

2 pins

EXTAL
XTAL

2 pins

Oscillation

Hi-Z or

High level

(when pull-up

resistance is

added)

TEX
TX

1 pin

RST

Hi-Z or

Low level

(when PD

resistance is

added)

RD (Port D, F, or I)

Data bus

Output selection control signal

("0" when reset)

Data for Port D, F, or I

"0" when reset

Segment output data

High voltage drive transistor

Pull-down resistor

Mask option

FDP

Output selection control signal

("0" when reset)

Segment output data

High voltage drive transistor

Pull-down resistor

Mask option

FDP

EXTAL

XTAL

TEX

Schmitt input

Mask option

Pull-up resistor

· Diagram shows circuit

composition during
oscillation.

· Feedback resistor is

removed during stop.

· Diagram shows circuit

composition during
oscillation.

Port D

Port F

Port I

· When the operation of the oscillation

circuit is stopped by the software, the
feedback resistor is removed, and TEX
and TX become "Low" level and "High"
level respectively.

CXP824P40A

1) V

and V

OUT

must not exceed V

+ 0.3V.

2) Specifies output current of general-purpose I/O ports.

3) The high current drive transistor is the N-CH transistor of Port C (PC).

Note) Usage exceeding absolute maximum ratings may permanently impair the LSI. Normal operation should be

conducted under the recommended operating conditions. Exceeding these conditions may adversely affect

the reliability of the LSI.

Supply voltage

Input voltage

Output voltage

Display output voltage

High level output current

High level total output
current

Low level output current

Low level total output current

Operating temperature

Storage temperature

Allowable power dissipation

Vpp

AVss

OUT

ODH1

ODH2

ODH

OLC

Topr

Tstg

0.3 to +7.0

0.3 to +13.0

0.3 to +0.3

0.3 to +7.0

40 to V

+ 0.3

100

20 to +75

55 to +150

600

°C

Incorporated PROM

As P channel transistor is open drain,
V

is reference.

All pins excluding outputs

(value per pin)

Display outputs S0 to S23 (value per pin)

Display outputs T0 to T7, and T8/S31 to
T15/S24 (value per pin)

Total for all pins excluding display outputs

Total for all display outputs

Port 1

High current Port 1

Total for all output pins

Item

Symbol

Rating

Unit

Remarks

Absolute Maximum Ratings

(Vss = 0V reference)

CXP824P40A

High level input
voltage

Low level input
voltage

Operating temperature

Supply voltage

5.5

+ 0.3

0.3V

0.2V

0.4

+75

°C

Item

Symbol

Min.

Max.

Unit

Remarks

4.5

3.5

2.7

2.5

0.7V

0.8V

0.4

0.3

IHS

IHEX

ILS

ILEX

Topr

High-speed mode
Guaranteed operation range

Low-speed mode
Guaranteed operation range

Guaranteed operation range with TEX
clock

Guaranteed data hold range during STOP

Hysteresis input

EXTAL

Hysteresis input

EXTAL

1) Value for each pin of normal input port (PA, PB4, PC, PG, PH).

2) Value of the following pins: RST, CINT, CS0, SCK0, SCK1, SI0, SI1, EC0/INT0, EC1/INT1, INT2,

INT3/NMI, RMC, CTL.

3) Specifies only during external clock input.

4) Vpp and V

should be set a same voltage.

Recommended Operating Conditions

(Vss = 0V reference)

Vpp

Vpp = V

CXP824P40A

= 4.5V, I

= 0.5mA

= 4.5V, I

= 1.2mA

= 4.5V, I

= 1.8mA

= 4.5V, I

= 3.6mA

= 4.5V, I

= 12.0mA

= 5.5V, V

= 5.5V

= 5.5V, V

= 0.4V

= 5.5V, V

= 5.5V

= 0.4V

= 4.5V

= V

2.5V

= 5.5V

= V

35V

FDP

= V

35V

= 5V

FDP

= V

35V

= 5.5V

= 0, 5.5V

High level
output current

Display output
current

4.0

3.5

0.5

0.1

1.5

µA

PA, PB,
PC, PE6,
PE7, PG,
PH

EXTAL

TEX

RST

Item

Symbol

Pins

Conditions

Min.

S0 to S23

S24/T15 to

S31/T8,

T0 to T7

S24/T15 to

S31/T8,

T0 to T7

S24/T15 to

S31/T8,

T0 to T7

PA to PC,
PE, PG, PH

Open drain output
leakage current
(P-CH Tr off
state)

LOL

Pull-down
resistance

I/O
leakage current

IHE

ILE

IHT

ILT

ILR

Low level
output current

Input current

100

Typ.

0.4

0.6

1.5

400

270

±10

Max.

Unit

DC Characteristics

Electrical Characteristics

(Ta = 10 to +75°C, Vss = 0V reference)

CXP824P40A

When all pins are open.

The leakage carrent is not specified because PB7 is dedicated for output.

Item

Symbol

Pins

Conditions

Min.

Typ.

Max.

Unit

Power supply
current

Input
capacity

Pins other
than
S0 to S31,
T0 to T7,
PB7, PE6,
AV

REF

, V

FDP

, V

DD1

High speed mode operation
(1/2 frequency demultiplier clock)

DDS1

DDS2

DDS3

DD2

= 5.5V, 10MHz crystal

oscillation (C

= C

= 15pF)

= 3V, 32kHz crystal

oscillation (C

= C

= 47pF)

SLEEP mode

STOP mode
V

= 5.5V, 10MHz crystal oscillation;

and termination of 32kHz oscillation

= 5.5V, 10MHz crystal

oscillation (C

= C

= 15pF)

= 3V, 32kHz crystal

oscillation (C

= C

= 47pF)

450

1100

µA

1.2

µA

Clock 1MHz
0V for all pins excluding
measured pins

CXP824P40A

sys indicates the three values below according to the upper two bits (CPU clock selection) of the control

clock register (address: 00FE

sys (ns) = 2000/fc (upper two bits = "00"), 4000/fc (upper two bits = "01"), 16000/fc (upper two bits = "11")

EXTAL

0.4V

1/fc

Crystal oscillation
Ceramic oscillation

EXTAL

XTAL

External clock

EXTAL

XTAL

74HC04

32kHz clock application condition
Crystal oscillation

TEX

TEX
EC0
EC1

0.2V

0.8V

AC Characteristics

(1) Clock timing

System clock frequency

System clock input pulse width

System clock input rise time,
fall time

Event count input clock
pulse width

Event count input clock
rise time, fall time

System clock frequency

Event count input
pulse width

Event count input rise time,
fall time

XTAL
EXTAL

EXTAL

EC0,
EC1

TEX
TX

TEX

MHz

kHz

µs

Item

Symbol

Conditions

Min.

Unit

Fig. 1, Fig. 2

Fig. 1, Fig. 2
External clock drive

Fig. 3

= 2.7 to 5.5V

Fig. 2 (32kHz clock
application condition)

Fig. 3

37.5

sys + 50

Typ.

32.768

Max.

200

(Ta = 10 to +75°C, V

= 4.5 to 5.5V, Vss = 0V reference)

Fig. 2. Clock application conditions

Fig. 1. Clock timing

Fig. 3. Event count clock timing

CXP824P40A

Chip select transfer mode
(SCK0 = output mode)

Chip select transfer mode

Note 1)

sys indicates the three values below according to the upper two bits (CPU clock selection) of the

control clock register (address: 00FE

sys (ns) = 2000/fc (upper two bits = "00"), 4000/fc (upper two bits = "01"), 16000/fc (upper two bits = "11")

Note 2) The load condition for the SCK0 output mode, SO0 output delay time is 50pF + 1TTL.

(2) Serial transfer (CH0)

(Ta = 10 to +75°C, V

= 4.5 to 5.5V, Vss = 0V reference)

Item

CS0

SCK0

delay time

CS0

SCK0

float delay time

CS0

SO0

delay time

CS0

SO0

float delay time

CS0 High level width

SCK0 cycle time

SCK0
High, Low level width

SI0 input set-up time
(for SCK0

)

SI0 input hold time
(for SCK0

)

SCK0

SO0

delay time

DCSK

DCSKF

DCSO

DCSOF

WHCS

KCY

SIK

KSI

KSO

SCK0

SO0

CS0

SCK0

SI0

SO0

Input mode

Output mode

Input mode

Output mode

SCK0 input mode

SCK0 output mode

SCK0 input mode

SCK0 output mode

SCK0 input mode

SCK0 output mode

Symbol

Min.

sys + 200

16000/fc

sys + 100

8000/fc 50

100

200

sys + 200

100

sys + 200

100

Max.

Unit

Condition

CXP824P40A

Serial transfer (CH1)

(Ta = 10 to +75°C, V

= 4.5 to 5.5V, Vss = 0V reference)

Item

SCK1 cycle time

KCY

SCK1

Input mode

Ouput mode

Input mode

Ouput mode

SCK1 input mode

SCK1 ouput mode

SCK1 input mode

SCK1 ouput mode

SCK1 input mode

SCK1 ouput mode

1000

16000/fc

400

8000/fc 50

100

200

100

200

100

SCK1

SI1

SO1

SIK

KSI

KSO

SCK1
High, Low level width

SI1 input set-up time
(for SCK1

)

SI1 input hold time
(for SCK1

)

SCK1

SO1 delay time

Symbol

Condition

Min.

Max.

Unit

Note) The load condition for the SCK1 output mode, SO1 output delay time is 50pF + 1TTL.

Fig. 5. Serial transfer CH1 timing

0.2V

0.8V

SO1

KCY

SIK

KSI

0.2V

0.8V

KSO

0.2V

0.8V

Output data

Input data

SI1

SCK1

CXP824P40A

Conversion time

Sampling time

Reference input voltage

Analog input voltage

CONV

SAMP

REF

IAN

REF

AN0 to AN7

Ta = 25°C
V

= 5.0V

= AV

= 0V

Operation mode

SLEEP mode
STOP mode
32kHz operation mode

Linearity error

Zero transition
voltage

Full-scale
transition voltage

Resolution

REF

current

REF

REFS

µs

REF

1.0

µA

0.6

160/f

ADC

12/f

ADC

0.5

Item

Symbol

Condition

Min.

Typ.

Max.

Unit

Bits

(3) A/D converter characteristics

(Ta = 10 to +75°C, V

= 4.5 to 5.5V, AV

REF

= 4.0 to AV

, Vss = AV

= 0V reference)

±3

LSB

5030

4970

4910

Fig. 6. Definition of A/D converter terms

Analog input

Linearity error

Digital conversion value

1) V

: Value at which the digital transfer value changes

from 00

to 01

and vice versa.

2) V

: Value at which the digital transfer value changes

from FE

to FF

and vice versa.

3) f

ADC

indicates the below values due to ADC operation

clock selection (ADCS: Bit 6 of address 00F9

During PS2 selection, f

ADC

= fc/2

During PS1 selection, f

ADC

= fc

CXP824P40A

External interruption
High, Low level width

Reset input Low level width

INT0
INT1
INT2
NMI/INT3

RST

32/fc

µs

Item

Symbol

Condition

Min.

Max.

Unit

RSL

(4) Interruption, reset input

(Ta = 10 to +75°C, V

= 4.5 to 5.5V, Vss = 0V reference)

0.2V

0.8V

INT0

INT1

INT2

NMI/INT3

(NMI specifies only for the

falling edge)

Fig. 7. Interruption input timing

RSL

0.2V

RST

Fig. 8. RST input timing

(5) Others

(Ta = 10 to +75°C, V

= 4.5 to 5.5V, Vss = 0V reference)

Item

CLK input
High, Low level width

CTH

CTL

sys = 2000/fc

sys + 200

Symbol

Condition

Min.

Max.

Unit

Fig. 9. Other timing

0.8V

CTL

CTH

CTL

0.2V

CXP824P40A

Appendix

Fig. 10. Recommended oscillation circuit

EXTAL

XTAL

(i) Main clock

EXTAL

XTAL

(ii) Main clock

EXTAL

XTAL

TEX

(iii) Sub clock

Manufacturer

MURATA
MFG
CO., LTD.

RIVER
ELETEC
CO., LTD

KINSEKI
LTD.

Model

CSA4.19MG

CSA8.00MTZ

CST4.19MGW

CST8.00MTW

HC-49/U03

HC-49/U (-S)

fc (MHz)

4.19

8.00

10.00

4.19

8.00

10.00

4.19

8.00

10.00

4.19

8.00

10.00

32.768kHz

(pF)

Rd (

)

Circuit

example

(i)

CSA10.0MTZ

(ii)

CST10.0MTW

(i)

(iii)

Those marked with an asterisk (

) signify types with built-in ground capacitance (C

, C

Option

Mask product

Package

ROM capacitance

Reset pin pull-up resistance

High voltage drive pin pull-up resistor

100-pin plastic QFP

32K bytes/40K bytes

Existent/non-existent

100-pin plastic QFP

PROM 40K bytes

Existent

Non-existent (S0/PD0 to S23/PI7)

Existent (T0 to T15/S24)

Mask option table

CXP824P40Q-1-

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