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Электронный компонент: CXP82500-U01Q

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CMOS 8-bit Single Chip Microcomputer
Description
The CXP82500 is a CMOS 8-bit single chip micro-
computer of piggyback/evaluator combined type, which
is developed for evaluating the function of the
CXP82532/82540.
Features
Wide-range instruction system (213 instructions) to
cover various types of data
-- 16-bit operation/multiplication and division/
Boolean bit operation instructions
Minimum instruction cycle
400ns at 10MHz operation
Applicable EPROM
LCC type 27C512 (Maximum 40K bytes are available.)
Incorporated RAM capacity
1120 bytes (Including fluorescent display data area)
Peripheral functions
-- A/D converter
8-bit, 8-channel, successive approximation method
(Conversion time of 32s/10MHz)
-- Serial interface
Incorporated 8-bit, 8-stage FIFO (Auto transfer for 1 to 8 bytes), 1 channel
8-bit clock sync type, 1 channel
-- Timer
8-bit timer
8-bit timer/counter
19-bit time base timer
16-bit capture timer/counter
-- Fluorescent display panel controller/driver
Maximum 336 segment display possible
1 to 16-digit dynamic display
Dimmer function
High voltage drive output (40V)
On-chip pull-down resistor (Mask option)
Hardware key scan function (Maximum 16
8 key matrix compatible)
-- Remote control reception circuit
8-bit pulse measurement counter with on-chip 6-stage FIFO
Interruption
14 factors, 14 vectors, multi-interruption possible
Standby mode
Sleep/stop
Package
80-pin ceramic QFP
Note) Mask option depends on the type of the CXP82500. Refer to the Products List for details.
Structure
Silicon gate CMOS IC
1
E93863A78-PS
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXP82500
80 pin PQFP (Ceramic)
Piggyback/
evaluator type
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2
CXP82500
Pin Assignment in Piggyback Mode
PE3/INT3
PE4/RMC
PE5
PE6
PE7/TO
PB0/CINT
PB1/CS0
PB2/SCK0
PB3/SI0
PB4/SO0
PB5/SCK1
PB6/SI1
PB7/SO1
PC0/KR0
PC1/KR1
PC2/KR2
PC3/KR3
PC4/KR4
PC5/KR5
PC6/KR6
PC7/KR7
PA0/AN0
PA1/AN1
PA2/AN2
T6
T7
T8/S28
T9/S27
T10/S26
T11/S25
T12/S24
T13/S23
T14/S22
T15/S21
S20
S19
S18
S17
S16
PF7/S15
PF6/S14
PF5/S13
PF4/S12
PF3/S11
PF2/S10
PF1/S9
PF0/S8
PD7/S7
P
A
3
/
A
N
3
P
A
4
/
A
N
4
P
A
5
/
A
N
5
P
A
6
/
A
N
6
P
A
7
/
A
N
7
R
S
T
E
X
T
A
L
X
T
A
L
V
S
S
P
D
0
/
S
0
P
D
1
/
S
1
P
D
2
/
S
2
P
D
3
/
S
3
P
D
4
/
S
4
P
D
5
/
S
5
P
D
6
/
S
6
P
E
2
/
I
N
2
P
E
1
/
E
C
1
/
I
N
T
1
P
E
0
/
E
C
0
/
I
N
T
0
P
G
3
P
G
2
P
G
1
P
G
0
N
C
V
D
D
V
F
D
P
T
0
T
1
T
2
T
3
T
4
T
5
A8
A9
A11
NC
OE
A10
CE
D7
D6
A6
A5
A4
A3
A2
A1
A0
NC
D0
A
7
A
1
2
A
1
5
N
C
V
D
D
A
1
4
A
1
3
D
1
D
2
G
N
D
N
C
D
3
D
4
D
5
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25 26 27 28 29 30
40
39
38
37
36
35
34
31 32 33
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
70 69 68 67
63
64
65
66
61
62
71
72
73
74
75
76
77
78
79
80
1
2
3
4
5
6
7
8
9
10
11
12
13
14 15 16 17 18 19 20
21
22
23
24
25
26
27
28
29
30
31
32
1
Note) NC (Pin 73) is always connected to V
DD
.
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3
CXP82500
Pin Assignment in Evaluator Mode
Note) NC (Pin 73) is always connected to V
DD
.
PE3/INT3
PE4/RMC
PE5
PE6
PE7/TO
PB0/CINT
PB1/CS0
PB2/SCK0
PB3/SI0
PB4/SO0
PB5/SCK1
PB6/SI1
PB7/SO1
PC0/KR0
PC1/KR1
PC2/KR2
PC3/KR3
PC4/KR4
PC5/KR5
PC6/KR6
PC7/KR7
PA0/AN0
PA1/AN1
PA2/AN2
T6
T7
T8/S28
T9/S27
T10/S26
T11/S25
T12/S24
T13/S23
T14/S22
T15/S21
S20
S19
S18
S17
S16
PF7/S15
PF6/S14
PF5/S13
PF4/S12
PF3/S11
PF2/S10
PF1/S9
PF0/S8
PD7/S7
P
A
3
/
A
N
3
P
A
4
/
A
N
4
P
A
5
/
A
N
5
P
A
6
/
A
N
6
P
A
7
/
A
N
7
R
S
T
E
X
T
A
L
X
T
A
L
V
S
S
P
D
0
/
S
0
P
D
1
/
S
1
P
D
2
/
S
2
P
D
3
/
S
3
P
D
4
/
S
4
P
D
5
/
S
5
P
D
6
/
S
6
P
E
2
/
I
N
2
P
E
1
/
E
C
1
/
I
N
T
1
P
E
0
/
E
C
0
/
I
N
T
0
P
G
3
P
G
2
P
G
1
P
G
0
N
C
V
D
D
V
F
D
P
T
0
T
1
T
2
T
3
T
4
T
5
A8
A9
A11
NC
HALT
A10
E/P
I/T
MON
A6/D6
A5/D5
A4/D4
A3/D3
A2/D2
A1/D1
A0/D0
NC
RD
A
7
/
D
7
A
1
2
A
1
5
N
C
V
D
D
A
1
4
A
1
3
W
R
S
Y
N
C
G
N
D
N
C
C
2
C
1
R
S
T
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25 26 27 28 29 30
40
39
38
37
36
35
34
31 32 33
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
70 69 68 67
63
64
65
66
61
62
71
72
73
74
75
76
77
78
79
80
1
2
3
4
5
6
7
8
9
10
11
12
13
14 15 16 17 18 19 20
21
22
23
24
25
26
27
28
29
30
31
32
1
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4
CXP82500
Products List
Address
Data
Input delay time
Address
Data
Hold time
Item
Symbol
Pins
Min.
Max.
Unit
t
ACC
t
IH
A0 to A15
D0 to D7
A0 to A15
D0 to D7
0
120
ns
ns
t
ACC
t
IH
0.8V
DD
0.8V
DD
0.2V
DD
0.2V
DD
Input data
Address data
A0 to A15
D0 to D7
EPROM Read Timing
(Ta = 20 to +75C, Vcc = 4.5 to 5.5V, Vss = 0V reference)
Products
Mask
Option item
Existent/Non-existent
Existent/Non-existent
Existent/Non-existent
CXP82540
Piggyback/evaluator
CXP82500-U01Q
80-pin ceramic PQFP
40K bytes
Existent
Existent
Only port for display
CXP82532
80-pin plastic QFP
32K bytes
40K bytes
Package
ROM capacitance
Pull-up resistance for reset pin
Power-on reset circuit
Pull-down resistance for high voltage drive pin
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5
CXP82500
Pin 1 index
Pin 1 marking
LCC type EPROM
Pin 1 marking
Piggyback mode
Piggyback/evaluator product
Evaluator mode
CPU Probe
Note)
Note) Evaluation cap should be
connected to CPU probe.
Piggyback mode/evaluator mode can be switched as shown below.
SONY CODE
EIAJ CODE
JEDEC CODE
PACKAGE STRUCTURE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE WEIGHT
CERAMIC
GOLD PLATING
42 ALLOY
5.7g
PQFP-80C-L01
AQFP080-C-0000-A
80PIN PQFP (CERAMIC)
18.7
16.3 0.2
9.48
11.66
15.58 0.2
40
25
65
80
1
24
64
41
2
2
.
3


0
.
2
5
4.5
6
.
0
2
4
.
7
1
.
2
7


0
.
1
3
1
2
.
0
2
1
4
.
2
2
1
8
.
1
2


0
.
2
0
.
3
PIN No. 1 INDEX
INDEX
9
.
5
9

M
A
X
0
.
1
5


0
.
0
2
+

0
.
0
5
3
.
5
7


0
.
3
6
PIN No. 1 INDEX
0
.
8


0
.
0
5
0
.
4


0
.
0
8
1
.
3


0
.
3
1
.
0
0
.
7
41
64
65
80
1
24
25
40
0.6
Package Outline
Unit: mm