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Электронный компонент: CXP871P40R-1

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CMOS 8-bit Single Chip Microcomputer
Description
The CXP871P40 is a CMOS 8-bit microcomputer
which consists of A/D converter, serial interface (2ch
independently), timer/counter, time base timer,
vector interruption, high precision timing pattern
generation circuit (PPG 2ch independently, RTG 2ch
independently), PWM generator, general purpose
prescaler, PWM for tuner, VCR vertical sync
separation circuit and the measuring circuit which
measures signals of capstan FG and drum FG/PG
and other servo systems, as well as basic
configurations like 8-bit CPU, PROM, RAM and I/O
port. They are integrated into a single chip.
Also CXP871P40 provides power on reset
function, sleep/stop function which enables to lower
power consumption .
CXP871P40 is the PROM-incorporated version of
the CXP87132/87140 with built-in mask ROM. This
provides the additional feature of being able to write
directly into the program. Thus, it is most suitable for
evaluation use during system development and for
small-quantity production.
Features
A wide instruction set (213 instructions) which covers various types of data
-- 16-bit arithmetic instruction/multiplication and division instructions/boolean bit operation instruction
Minimum instruction cycle
333ns at 12MHz operation (3.0 to 5.5V)
250ns at 16MHz operation (4.5 to 5.5V)
Incorporated PROM capacity
40K bytes
Incorporated RAM capacity
1312 bytes
Peripheral functions
-- A/D converter
8-bit, 12-channel, successive approximation system
(Conversion time: 20s/16MHz)
-- Serial I/O
Incorporated buffer RAM (1 to 32 bytes auto transfer) 1-channel
Incorporated 8-bit and 8-stage FIFO
(1 to 8 bytes auto transfer) 1-channel
-- Timer
8-bit timer, 8-bit timer/counter, 19-bit time base timer
-- High precision timing pattern generator
PPG 19 pins 32-stage programmable
PPG 10 pins 21-stage programmable
RTG 5 pins 2-channel
-- PWM/DA gate output
PWM 12-bit, 2-channel (Repetitive frequency 62.5kHz/16MHz)
DA gate pulse 12-bit, 4-channel
-- Servo input control
Capstan FG, Drum FG/PG, CTL input
-- VSYNC separator
-- FRC capture unit
Incorporated 26-bit and 8-stage FIFO
-- PWM output
14-bit, 1-channel
-- General purpose prescaler
10-bit (System clock asynchronous)
-- Pulse cycle measurement circuit
Interruption
18 factors, 14 vectors, multi-interruption possible
Standby mode
Sleep/stop
Package
100-pin plastic QFP/LQFP
1
E93X30C1X-PS
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXP871P40
100 pin QFP (PIastic)
100 pin LQFP (PIastic)
2
CXP871P40
A/D CONVERTER
SERIAL
INTERFACE UNIT
(CH0)
BUFFER
RAM
INTERRUPT CONTROLLER
SPC700
CPU CORE
PROM
40K BYTES
PRESCALER/
TIME BASE TIMER
RAM
1312 BYTES
12
AN0 to AN3
SI0
CS0
PI7/SI1
SCK0
AV
DD
PE1/INT2
EXTAL
XTAL
V
DD
Vss
PORT C
8
PC0 to PC7
PORT D
8
PD0 to PD7
PORT I
PI1 to PI7
RST
PORT J
8
PJ0 to PJ7
PORT G
8
PG0 to PG7
PORT H
8
PH0 to PH7
PORT A
8
PA0 to PA7
PORT E
2
6
PE0 to PE1
PE2 to PE7
REALTIME
PULSE
GENERATOR
2
PF0/AN4
to
PF7/AN11
2
PE0/INT0
FRC
CAPTURE
UNIT
FIFO
RAM
CH0
CH1
19
5
2
PORT B
8
PB0 to PB7
PORT F
PF0 to PF3
4
4
PF4 to PF7
AV
REF
AVss
MP
PI4/INT1
PORT K
1
PK0
PROGRAMMABLE
PATTERN
GENERATOR (CH1)
RAM
10
2
3
2
4
4
2
2
SERIAL
INTERFACE UNIT
(CH1)
FIFO
8BIT TIMER/COUNTER 0
8BIT TIMER 1
V SYNC SEPARATOR
CAPSTAN
DRUM
CTL
SERVO INPUT
CONTROL
PROGRAMMABLE PRESCALER
14BIT PWM GENERATOR
12BIT PWM GENERATOR CH0
12BIT PWM GENERATOR CH1
PULSE MEASURE UNIT
SO0
PI6/SO1
PI5/SCK1
PE1/EC
PI3/TO
PG4/SYNC0
PG5/SYNC1
PG6/EXI0
PG7/EXI1
PG0/CFG
PG1/DFG
PG2/DPG
PG3/PBCTL
PI0/PCK/OSCI
PK0/OSCO
PI1/PO
PE0/XOUT
PE2/PWM0
PE4/DAA0
PE6/DAB0
PE3/PWM1
PE5/DAA1
PE7/DAB1
PG4/PMI
PG7/PMSK
PI2/PWM
1
7
PI0
to
PPO113
to
PPO100
PPO112
PPO107
PPO000 to PPO018
19
10
PROGRAMMABLE
PATTERN
GENERATOR (CH0)
Vpp
CLOCK
GENERATOR/
SYSTEM CONTROL
RTO3
RTO7
to
Block Diagram
3
CXP871P40
PI6/SO1
PI7/SI1
PE0/INT0/XOUT
PE1/EC/INT2
PE2/PWM0
PE3/PWM1
PE4/DAA0
PE5/DAA1
PE6/DAB0
PE7/DAB1
PG0/CFG
PG1/DFG
PF2/DPG
PG3/PBCTL
PG4/SYNC0/PMI
PG5/SYNC1
PG6/EXI0
PG7/EXI1/PMSK
AN0
AN1
AN2
AN3
PF0/AN4
PF1/AN5
PF2/AN6
PF3/AN7
AV
DD
AV
REF
AV
SS
PF4/AN8
PB3/PPO011
PB2/PPO010
PB1/PPO009
PB0/PPO008
PC7/RTO7
PC6/RTO6
PC5/RTO5
PC4/RTO4
PC3/RTO3
PC2/PPO018
PC1/PPO017
PC0/PPO016
PJ7
PJ6
PJ5
PJ4
PJ3
PJ2
PJ1
PJ0
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
PB6/PPO014
PB7/PPO015
PA0/PPO000/PPO100
PA1/PPO001/PPO101
PA2/PPO002/PPO102
PA3/PPO003/PPO103
PA4/PPO004/PPO104
PA5/PPO005/PPO105
PA6/PPO006/PPO106
PA7/PPO007/PPO107
Vpp
V
DD
V
SS
PK0/OSCO
PI0/PCK/OSCI
PI1/PO
PI2/PWM
PI3/TO
PI4/INT1
PI5/SCK1
PH7
PH6
PH5
PH4
PH3
PH2
PH1
PH0
MP
RST
V
SS
XTAL
EXTAL
CS0
SI0
SO0
SCK0
PF7/AN11
PF6/AN10
PF5/AN9
Mask
option
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
40
39
38
37
36
35
34
32 33
41 42 43 44 45 46 47 48 49 50
51
52
53
54
55
56
57
58
59
60
70
69
68
67
63
64
65
66
61
62
71
72
73
74
81
82
83
84
75
76
77
78
88 87 86 85
79
89
90
100 99 98 97 96 95 94
91
92
93
1
80
31
PB5/PPO013/PPO113
PB4/PPO012/PPO112
Pin Configuration 1 (Top View) 100-pin QFP Package
Note)
1. Vpp (Pin 90) is always connected to V
DD
.
2. Vss (Pins 41 and 88) are both connected to GND.
4
CXP871P40
Pin Configuration 2 (Top View) 100-pin LQFP Package
PI6/SO1
PI7/SI1
PE0/INT0/XOUT
PE1/EC/INT2
PE2/PWM0
PE3/PWM1
PE4/DAA0
PE5/DAA1
PE6/DAB0
PE7/DAB1
PG0/CFG
PG1/DFG
PF2/DPG
PG3/PBCTL
PG4/SYNC0/PMI
PG5/SYNC1
PG6/EXI0
PG7/EXI1/PMSK
AN0
AN1
AN2
AN3
PF0/AN4
PF1/AN5
PF2/AN6
PB3/PPO011
PB2/PPO010
PB1/PPO009
PB0/PPO008
PC7/RTO7
PC6/RTO6
PC5/RTO5
PC4/RTO4
PC3/RTO3
PC2/PPO018
PC1/PPO017
PC0/PPO016
PJ7
PJ6
PJ5
PJ4
PJ3
PJ2
PJ1
PJ0
PD7
PD6
PD5
PB6/PPO014
PB7/PPO015
PA0/PPO000/PPO100
PA1/PPO001/PPO101
PA2/PPO002/PPO102
PA3/PPO003/PPO103
PA4/PPO004/PPO104
PA5/PPO005/PPO005
PA6/PPO006/PPO106
PA7/PPO007/PPO107
Vpp
V
DD
V
SS
PK0/OSCO
PI0/PCL/OSCI
PI1/PO
PI2/PWM
PI3/TO
PI4/INT1
PI5/SCK1
PH2
PH1
PH0
MP
RST
V
SS
XTAL
EXTAL
CS0
SI0
SO0
SCK0
PF7/AN11
PF6/AN10
PF5/AN9
Mask
option
PH7
PH6
PH5
PH4
PH3
PD4
PD3
PD2
PD1
PD0
PF4/AN8
AV
SS
PF3/AN7
AV
DD
AV
REF
PB4/PPO012/PPO112
PB5/PPO013/PPO113
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
40
39
38
37
36
35
34
31 32 33
41 42 43 44 45 46 47 48 49 50
51
52
53
54
55
56
57
58
59
60
70
69
68
67
63
64
65
66
61
62
71
72
73
74
75
1
26 27 28 29 30
81
82
83
84
76
77
78
88 87 86 85
79
89
90
100 99 98 97 96 95 94
91
92
93
80
Note)
1. Vpp (Pin 88) is always connected to V
DD
.
2. Vss (Pins 39 and 86) are both connected to GND.
5
CXP871P40
Output/
Real time
output
Output/
Real time
output
I/O/
Real time
output
I/O/
Real time
output
I/O
Input/Input/Output
Input/Input/Input
Output/Output
Output/Output
Output/Output
Output/Output
Output/Output
Output/Output
Input
Input/Input
Output/Input
I/O
Ouput
Input
Input
(Port A)
8-bit output port. Data is gated
with PPO0 and PPO1 contents
by OR-gate and they are output.
(8 pins)
(Port B)
8-bit output port. Data is gated
with PPO0 and PPO1 contents
by OR-gate and they are output.
(8 pins)
(Port C)
8-bit I/O port. Enables to
specify I/O by bit unit.
Data is gated with PPO or
RTO contents by OR-gate
and they are output.
(8 pins)
(Port D)
8-bit I/O port. Enables to specify I/O by 4-bit unit.
Enables to drive 12mA sink current. (During 5V0.5V operation)
(8 pins)
(Port E)
8-bit port. Lower 2 bits are
input port and upper 6 bits
are output port.
(8 pins)
Analog input pins to A/D converter. (12 pins)
(Port F)
Lower 4 bits are input port and upper 4 bits are output port.
Lower 4 bits also serve as standby release input pin.
(8 pins)
Serial clock (CH0) I/O pin.
Serial data (CH0) output pin.
Serial data (CH0) input pin.
Serial chip select (CH0) input pin.
External event
input pin for
timer/counter.
Input pin to request
external interruption.
Active when falling edge.
Input pin to request
external interruption.
Active when falling edge.
1/2 dividing
clock output of
XTAL or OSCO.
PWM output pins.
(2 pins)
DA gate pulse output pins.
(4 pins)
Programmable pattern generator
(PPG0, PPG1) output.
Functions as high precision real time
pulse output port.
(
PPG0 19 pins
)
PPG1 10 pins
Real time pulse generator (RTG)
output. Functions as high precision real
time pulse output port. (5 pins)
Symbol
I/O
Description
PA0/PPO000
/PPO100
to
PA7/PPO007
/PPO107
PB0/PPO008
to
PB7/PPO015
PC0/PPO016
to
PC2/PPO018
PC3/RTO3
to
PC7/RTO7
PD0 to PD7
PE0/INT0
/XOUT
PE1/EC/INT2
PE2/PWM0
PE3/PWM1
PE4/DAA0
PE5/DAA1
PE6/DAB0
PE7/DAB1
AN0 to AN3
PF0/AN4
to
PF3/AN7
PF4/AN8
to
PF7/AN11
SCK0
SO0
SI0
CS0
Pin Description