Description
The ICX054AL is an interline CCD solid-state
image sensor suitable for EIA 1/3-inch B/W video
cameras. High sensitivity is achieved through the
adoption of HAD (Hole-Accumulation Diode) sensors.
This chip features a field period readout system,
and an electronic shutter with variable charge-
storage time.
Features
High sensitivity (+3dB compare with ICX044BLA)
and low dark current
Continuous variable-speed shutter
1/60s (Typ.), 1/100s to 1/10000s
Low smear
Excellent antiblooming characteristics
Horizontal register: 5V drive
Reset gate:
5V drive
Device Structure
Optical size:
1/3-inch format
Number of effective pixels:
510 (H) x 492 (V) approx. 250K pixels
Number of total pixels:
537 (H) x 505 (V) approx. 270K pixels
Interline CCD image sensor
Chip size:
6.00mm (H) x 4.96mm (V)
Unit cell size:
9.6m (H) x 7.5m (V)
Optical black:
Horizontal (H) direction:
Front 2 pixels, Rear 25 pixels
Vertical (V) direction:
Front 12 pixels, Rear 1 pixel
Number of dummy bits:
Horizontal 16
Vertical 1 (even field only)
Substrate material:
Silicon
1
ICX054AL
E92705E66-ST
1/3-inch CCD Image Sensor for EIA B/W Camera
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
16 pin DIP (Plastic)
Pin 1
V
2
25
1
12
Pin 9
H
Optical black position
(Top View)
For the availability of this product, please contact the sales office.
2
ICX054AL
Substrate voltage SUB GND
V
DD
, V
OUT
, V
SS
GND
Supply voltage
V
DD
, V
OUT
, V
SS
SUB
V
1
, V
2
, V
3
, V
4
GND
Vertical clock input voltage
V
1
, V
2
, V
3
, V
4
SUB
Voltage difference between vertical clock input pins
Voltage difference between horizontal clock input pins
H
1
, H
2
V
4
H
1
, H
2
, RG, V
GG
GND
H
1
, H
2
, RG, V
GG
SUB
V
L
SUB
V
1
, V
2
, V
3
, V
4
, V
DD
, V
OUT
V
L
RG V
L
V
GG
, Vss, H
1
, H
2
V
L
Storage temperature
Operating temperature
Pin No.
Symbol
Description
Pin No.
Symbol
Description
1
2
3
4
5
6
7
8
V
4
V
3
V
2
V
1
GND
V
GG
V
SS
V
OUT
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
GND
Output amplifier gate bias
Output amplifier source
Signal output
9
10
11
12
13
14
15
16
V
DD
GND
SUB
V
L
RG
NC
H
1
H
2
Output amplifier drain supply
GND
Substrate (Overflow drain)
Protective transistor bias
Reset gate clock
Horizontal register transfer clock
Horizontal register transfer clock
Pin Description
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Note
Note) : Photo sensor
V
OUT
V
SS
V
GG
GND
V
1
V
2
V
3
V
4
V
DD
GND
SUB
V
L
RG
NC
H
1
H
2
Horizontal register
Vertical register
Block Diagram and Pin Configuration
(Top View)
Item
0.3 to +55
0.3 to +18
55 to +10
15 to +20
to +10
to +15
to +17
17 to +17
10 to +15
55 to +10
65 to +0.3
0.3 to +30
0.3 to +24
0.3 to +20
30 to +80
10 to +60
V
V
V
V
V
V
V
V
V
V
V
V
V
V
C
C
1
Ratings
Unit
Remarks
Absolute Maximum Ratings
1
+27V (Max.) when clock width < 10s, clock duty factor < 0.1%.
3
ICX054AL
Item
V
DD
V
GG
V
SS
V
SUB
V
SUB
V
RGL
V
RGL
V
L
14.55
1.75
9.0
3
1.0
3
15.0
2.0
2
15.45
2.25
18.5
+3
4.0
+3
V
V
V
%
V
%
5%
1
1
Symbol
Min.
Typ.
Max.
Unit
Remarks
Bias Conditions
DC Characteristics
Grounded with
680
resistor
Item
Output amplifier drain current
Input current
Input current
I
DD
I
IN1
I
IN2
3
1
10
mA
A
A
3
4
Symbol
Min.
Typ.
Max.
Unit
Remarks
Output amplifier drain voltage
Output amplifier gate voltage
Output amplifier source
Substrate voltage adjustment range
Fluctuation range after substrate voltage adjustment
Reset gate clock voltage adjustment range
Fluctuation range after reset gate clock voltage adjustment
Protective transistor bias
1
Indications of substrate voltage (V
SUB
) reset gate clock voltage (V
RGL
) setting value.
The setting values of substrate voltage and reset gate clock voltage are indicated on the back of the image
sensor by a special code. Adjust substrate voltage (V
SUB
) and reset gate clock voltage (V
RGL
) to the
indicated voltage. Fluctuation range after adjustment is 3%.
V
SUB
code one character indication
V
RGL
code one character indication
V
RGL
code V
SUB
code
Code and optimal setting correspond to each other as follows.
1
V
RGL
code
Optimal setting
1.0 1.5 2.0 2.5 3.0 3.5 4.0
2
3
4
5
6
7
V
SUB
code
Optimal setting
9.0 9.5 10.0 10.5 11.0 11.5 12.0 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 16.5 17.0 17.5 18.0 18.5
E
f
G
h
J
K
L
m
N
P
Q
R
S
T
U
V
W
X
Y
Z
<Example> "5L"
V
RGL
= 3.0V
V
SUB
= 12.0V
2
V
L
setting is the V
VL
voltage of the vertical transfer clock waveform.
3
1) Current to each pin when 18V is applied to V
DD
, V
OUT
, Vss and SUB pins, while pins that are not tested
are grounded.
2) Current to each pin when 20V is applied sequentially to V
1
, V
2
, V
3
and V
4
pins, while pins that are
not tested are grounded. However, 20V is applied to SUB pin.
3) Current to each pin when 15V is applied sequentially to RG, H
1
, H
2
and V
GG
pins, while pins that are
not tested are grounded. However, 15V is applied to SUB pin.
4) Current to V
L
pin when 30V is applied to V
1
, V
2
, V
3
, V
4
, V
DD
and V
OUT
pins or when, 24V is applied
to RG pin or when, 20V is applied to V
GG
, Vss, H
1
and H
2
pins, while V
L
pin is grounded. However,
GND and SUB pins are left open.
4
Current to SUB pin when 55V is applied to SUB pin, while pins that are not tested are grounded.
4
ICX054AL
Item
Readout clock voltage
V
VT
V
VH1
, V
VH2
V
VH3
, V
VH4
V
VL1
, V
VL2
,
V
VL3
, V
VL4
V
V
|V
VH1
V
VH2
|
V
VH3
V
VH
V
VH4
V
VH
V
VHH
V
VHL
V
VLH
V
VLL
V
H
V
HL
V
RG
V
RGLH
V
RGLL
V
SUB
14.55
0.05
0.2
9.0
7.8
0.25
0.25
4.75
0.05
4.5
22.5
15.0
0
0
8.5
8.5
5.0
0
5.0
23.5
15.45
0.05
0.05
8.0
9.05
0.1
0.1
0.1
0.5
0.5
0.5
0.5
5.25
0.05
5.5
0.8
24.5
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
1
2
2
2
2
2
2
2
2
2
2
2
3
3
4
4
5
V
VH
= (V
VH1
+V
VH2
) /2
V
VL
= (V
VL3
+ V
VL4
) /2
V
V
= V
VH
n V
VL
n (n = 1 to 4)
High-level coupling
High-level coupling
Low-level coupling
Low-level coupling
1
Low-level coupling
Horizontal transfer
clock voltage
Reset gate clock
voltage
Substrate clock voltage
Vertical transfer clock
voltage
Symbol
Min.
Typ.
Max.
Unit
Waveform
diagram
Remarks
Item
Reset gate clock
voltage
Symbol
V
RGL
V
RG
0.2
8.5
0
9.0
0.2
9.5
V
V
4
4
Min.
Typ.
Max.
Unit
Waveform
diagram
Remarks
Clock Voltage Conditions
1
The reset gate clock voltage need not be adjusted when reset gate clock is driven when the specifications
are as given below. In this case, the reset gate clock voltage setting indicated on the back of the image
sensor has not significance.
5
ICX054AL
Clock Equivalent Circuit Constant
Item
Capacitance between vertical transfer
clock and GND
C
V1
, C
V3
C
V2
, C
V4
C
V12
, C
V34
C
V23
, C
V41
C
V13
C
V24
C
H1
, C
H2
C
HH
C
RG
C
SUB
R
1
, R
3
R
2
, R
4
R
GND
R
H
R
RG
1500
820
470
230
150
230
47
47
5
320
51
100
15
10
40
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
Capacitance between vertical transfer
clocks
Vertical transfer clock series resistor
Vertical transfer clock ground resistor
Horizontal transfer clock series resistor
Reset gate clock series resistor
Symbol
Min.
Typ.
Max.
Unit
Remarks
R
H
R
H
H
2
H
1
C
H1
C
H2
C
HH
V
1
C
V12
V
2
V
4
V
3
C
V34
C
V23
C
V41
C
V13
C
V24
C
V1
C
V2
C
V4
C
V3
R
GND
R
4
R
1
R
3
R
2
Vertical transfer clock equivalent circuit
Horizontal transfer clock equivalent circuit
R
RG
RG
C
RG
Reset gate clock equivalent circuit
Capacitance between horizontal
transfer clock and GND
Capacitance between horizontal
transfer clocks
Capacitance between reset gate clock
and GND
Capacitance between substrate clock
and GND
6
ICX054AL
Drive Clock Waveform Conditions
(1) Readout clock waveform
(2) Vertical transfer clock waveform
II
II
100%
90%
10%
0%
V
VT
tr
twh
tf
M
0V
M
2
V
1
V
3
V
2
V
4
V
VHH
V
VH
V
VHL
V
VHH
V
VHL
V
VH1
V
VL1
V
VLH
V
VLL
V
VL
V
VHH
V
VH3
V
VHL
V
VH
V
VHH
V
VHL
V
VL3
V
VL
V
VLL
V
VLH
V
VHH
V
VHH
V
VH
V
VHL
V
VHL
V
VH2
V
VLH
V
VL2
V
VLL
V
VL
V
VHH
V
VHH
V
VHL
V
VH4
V
VHL
V
VH
V
VL
V
VLH
V
VLL
V
VL4
7
ICX054AL
(3) Horizontal transfer clock waveform
tr
twh
tf
90%
10%
twl
V
H
V
HL
(4) Reset gate clock waveform
Point A
twl
V
RG
V
RGH
V
RGL
+ 0.5V
V
RGL
10%
V
RGLH
RG waveform
V
RGLL
H
1
waveform
twh
tr
tf
V
RGLH
is the maximum value and V
RGLL
is the minimum value of the coupling waveform during the period from
Point A in the above diagram until the rising edge of RG.
In addition, V
RGL
is the average value of V
RGLH
and V
RGLL
.
V
RGL
= (V
RGLH
+ V
RGLL
)/2
Assuming V
RGH
is the minimum value during the interval twh, then:
V
RG
= V
RGH
V
RGL
8
ICX054AL
(5) Substrate clock waveform
90%
100%
10%
0%
V
SUB
tr
twh
tf
M
M
2
V
SUB
Clock Switching Characteristics
Item
Readout clock
Vertical transfer
clock
Horizontal
transfer clock
Horizontal
transfer clock
Horizontal
transfer clock
Reset gate clock
Substrate clock
V
T
V
1
, V
2
,
V
3
, V
4
H
H
1
H
2
RG
SUB
2.3
37
11
1.5
2.5
41
5.6
15
2.0
38
75
42
5.6
79
0.5
12
0.012
0.012
6.5
15
0.5
0.015
2
0.5
10
0.012
0.012
4.5
0.25
15
0.5
s
s
ns
s
s
ns
s
During
readout
1
During
imaging
During
parallel-
serial
conversion
During
drain charge
Symbol
twh
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
twl
tr
tf
Unit
Remarks
1
When vertical transfer clock driver CXD1250 is used.
2
tf
tr 2ns
9
ICX054AL
Image Sensor Characteristics
(Ta = 25C)
Item
Sensitivity
Saturation signal
Smear
Video signal shading
Dark signal
Dark signal shading
Flicker
Lag
S
Vsat
Sm
SH
Vdt
Vdt
F
Lag
470
700
560
0.005
0.007
20
25
2
1
2
0.5
mV
mV
%
%
%
mV
mV
%
%
1
2
3
4
4
5
6
7
8
Ta = 60C
Zone 0,
I
Zone 0 to
II'
Ta = 60C
Ta = 60C
Symbol
Min.
Typ.
Max.
Unit
Measurement method
Remarks
Zone Definition of Video Signal Shading
10
9
492 (V)
8
10
510 (H)
V
10
H
8
H
8
V
10
Effective pixel region
Ignored region
Zone 0,
I
Zone
II
,
II
'
10
ICX054AL
Image Sensor Characteristics Measurement Method
Measurement conditions
1) In the following measurements, the substrate voltage and the reset gate clock voltage are set to the values
indicated on the device, and the device drive conditions are at the typical values of the bias and clock
voltage conditions.
2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical
black (OB) level is used as the reference for the signal output, and the value measured at point [
A] in the
drive circuit example is used.
Definition of standard imaging conditions
1) Standard imaging condition
I
:
Use a pattern box (luminance 706cd/m
2
, color temperature of 3200K halogen source) as a subject.
(Pattern for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR
cut filter and image at F8. The luminous intensity to the sensor receiving surface at this point is defined as
the standard sensitivity testing luminous intensity.
2) Standard imaging condition
II
:
Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles.
Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted
to the value indicated in each testing item by the lens diaphragm.
1. Sensitivity
Set to standard imaging condition
I
. After selecting the electronic shutter mode with a shutter speed of
1/250s, measure the signal output (Vs) at the center of the screen and substitute the value into the
following formula.
S = Vs
[mV]
2. Saturation signal
Set to standard imaging condition
II
. After adjusting the luminous intensity to 10 times the intensity with
average value of the signal output, 200mV, measure the minimum value of the signal output.
3. Smear
Set to standard imaging condition
II
. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity to
500 times the intensity with average value of the signal output, 200mV. When the readout clock is stopped
and the charge drain is executed by the electronic shutter at the respective H blankings, measure the
maximum value VSm [mV] of the signal output and substitute the value into the following formula.
4. Video signal shading
Set to standard imaging condition
II
. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity so
that the average value of the signal output is 200mV. Then measure the maximum (Vmax [mV]) and
minimum (Vmin [mV]) values of the signal output and substitute the values into the following formula.
SH = (Vmax Vmin)/200
100 [%]
5. Dark signal
Measure the average value of the signal output (Vdt [mV]) with the device ambient temperature 60C and
the device in the light-obstructed state, using the horizontal idle transfer level as a reference.
60
250
Sm =
100 [%] (1/10V method conversion value)
200
VSm
500
1
1
10
11
ICX054AL
Vlag (lag)
Signal output 200mV
Light
FLD
SG1
Strobe light
timing
Output
6. Dark signal shading
After measuring 5, measure the maximum (Vdmax [mV]) and minimum (Vdmin [mV]) values of the dark
signal output and substitute the values into the following formula.
Vdt = Vdmax Vdmin [mV]
7. Flicker
Set to standard imaging condition
II
. Adjust the luminous intensity so that the average value of the signal
output is 200mV, and then measure the difference in the signal level between fields (
Vf [mV]). Then
substitute the value into the following formula.
F = (
Vf/200)
100 [%]
8. Lag
Adjust the signal output value generated by strobe light to 200mV. After setting the strobe light so that it
strobes with the following timing, measure the residual signal (Vlag). Substitute the value into the following
formula.
Lag = (Vlag/200)
100 [%]
12
ICX054AL
7
15V
5V
XSUB
XV2
XV1
XSG1
XV3
XSG2
XV4
H
2
H
1
RG
10k
100k
10/16V
0.1
47k
2SA1175
0.01
CCD OUT
8.5V
3.3/16V
47/6.3V
680
100
3.9k
2SK523
180k
27k
1/6.3V
1M
1500p
0.01
3.3/20V
15k
47k
15k
0.1
39k
0.1
270k
2SC2785
3
27k
56k
0.1
100k
1/35V
1/35V
1/35V
10/20k
22/16V
22/20V
22 /10V
CXD1250
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
12
3
4
5
6
8
16
15
14
13
12
11
10
9
ICX054
(BOTTOM VIEW)
H
2
H
1
NC
RG
V
L
SUB
GND
V
DD
V
4
V
3
V
2
V
1
GND
V
GG
V
SS
V
OUT
[
A]
Drive Circuit
13
ICX054AL
Spectral Sensitivity Characteristics
(Includes lens characteristics, excludes light source characteristics)
900
800
700
600
500
Wave Length [nm]
Relative Response
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.0
0.1
1000
400
Sensor Readout Clock Timing Chart
2.0
2.5
1.5
1.2
0.3
38.1
2.5
Unit: s
V1
V2
V3
V4
Odd Field
HD
V1
V2
V3
V4
Even Field
14
ICX054AL
24
6
246
8
13
5
135
7
24
24
6
13
135
6
5
492
491
492
491
520
525
1
2
3
4
5
10
15
20
260
265
270
275
280
FLD
VD
BLK
HD
SG1
SG2
V1
V2
V3
V4
CCD
OUT
CLP1
Drive Timing Chart (Vertical sync)
15
ICX054AL
HD
BLK
H1
H2
RG
XSHP
XSHD
V1
V2
V3
V4
CLP1
SUB
500
505
510
1
2
3
5
10
15
20
25
1
2
3
5
10
15
16
1
2
1
2
3
5
10
Drive Timing Chart (Horizontal sync)
16
ICX054AL
Notes on Handling
1) Static charge prevention
CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following
protective measures.
a) Either handle bare handed or use non-chargeable gloves, clothes or material.
Also use conductive shoes.
b) When handling directly use an earth band.
c) Install a conductive mat on the floor or working table to prevent the generation of static electricity.
d) Ionized air is recommended for discharge when handling CCD image sensor.
e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges.
2) Soldering
a) Make sure the package temperature does not exceed 80C.
b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a ground 30W
soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently.
c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering
tool, use a thermal controller of the zero cross On/Off type and connect it to ground.
3) Dust and dirt protection
a) Operate in clean environments (around class 1000 is appropriate).
b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should
dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air
is recommended.)
c) Clean with a cotton bud and ethyl alcohol if the grease stained. Be careful not to scratch the glass.
d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when
moving to a room with great temperature differences.
e) When a protective tape is applied before shipping, just before use remove the tape applied for
electrostatic protection. Do not reuse the tape.
4) Do not expose to strong light (sun rays) for long periods.
5) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or usage
in such conditions.
6) CCD image sensors are precise optical equipment that should not be subject to mechanical shocks.
PACKAGE STRUCTURE
0.3
16pin DIP (450mil)
H
V
2.5
2.5
8.4
0.5
1.2
5.7
6.1
10.3
12.2
0.1
9.5
11.4 0.1
11.43
0.25
0 to 9
8
1
16
9
2-R0.5
2.5
11.6
9.2
2.5
1.2
3.35 0.15
3.1
1.27
3.5 0.3
0.46
0.3
1.27
0.69
(For the first pin only)
1.
"A"
is the center of the effective image area.
2.
The two points
"B"
of the package are the horizontal reference.
The point
"B'"
of the package is the vertical reference.
3.
The bottom
"C"
of the package, and the top of the cover glass
"D"
are the height reference.
4.
The center of the effective image area relative to
"B"
and
"B'"
is (H, V) = (6.1, 5.7)
0.15mm.
5.
The rotation angle of the effective image area relative to H and V is
1.
6.
The height from the bottom
"C"
to the effective image area is 1.41
0.10mm.
The height from the top of the cover glass
"D"
to the effective image area is 1.94
0.15mm.
7.
The tilt of the effective image area relative to the bottom
"C"
is less than 50
m.
The tilt of the effective image area relative to the top
"D"
of the cover glass is less than 50
m.
8.
The thickness of the cover glass is 0.75mm, and the refractive index is 1.5.
9.
The notches on the bottom of the package are used only for directional index, they must
not be used for reference of fixing.
C
B
A
D
M
B'
~
~
~
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE WEIGHT
Plastic
GOLD PLATING
42 ALLOY
0.9g
17
ICX054AL
Package Outline
Unit: mm
PDF 
ZIP