Descriptions
The ILX522K is a reduction type CCD linear
sensor designed for color image scanner use. This
sensor reads B4 size documents at a density of 200
DPI. (Dot Per Inch), and has 2lines analog
memories to adjust the position of green line and
red/blue line. A built-in timing generator and clock-
drivers ensure direct drive at 5V logic.
Features
Number of effective pixels: 2048
2pixels
Pixel size
Red/Blue pixel: 14m
12m (14m pitch)
Green pixel: 14m
14m (14m pitch)
Built-in timing generator, clock-drivers
Ultra-low lag
Good linearity
High sensitivity
Input Clock Pulse: CMOS 5V drive
Absolute Maximum Ratings
Supply voltage
V
DD1
11
V
V
DD2
6
V
Pin Configuration (Top View)
Block Diagram
1
ILX522K
E95436-PP
2048
2pixel CCD Linear Sensor (Color)
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
22 pin DIP (Cer-DIP)
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
1
NC
RS
V1
V2
GND
V
DD2
V
GG
GND
NC
CLK
GND
GND
V
DD2
V
DD1
V
OUT-R/B
V
OUT-G
V
DD1
NC
NC
V
DD1
ROG
GND
R1
B1
G1
G2
R1024
B1024
G2047
G2048
2
5
8
10
13
14
15
18
20
21
D46
RS
V1
V2
GND
V
DD2
V
GG
GND
CLK
GND
Output
amplifier
V
DD2
V
DD1
V
OUT-R/B
V
OUT-G
V
DD1
V
DD1
ROG
GND
Driver
Analog memory
Analog memory
Readout gate
CCD analog shift register
D33
B1024
R1024
B1
R1
D32
D13
Clock driver
Readout gate
CCD analog shift register
Clock driver
D46
D33
G2048
G2047
G2
G1
D32
D13
Driver
Driver
Driver
9
12
11
3
4
19
1
16
GND
Output
amplifier
For the availability of this product, please contact the sales office.
2
ILX522K
Pin Description
Pin No.
Symbol
Description
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
RS
V
DD1
V
OUT-R/B
V
OUT-G
V
DD1
NC
NC
V
DD1
ROG
GND
V2
V1
V
DD2
GND
GND
CLK
NC
GND
V
GG
V
DD2
GND
NC
Clock pulse input
9V power supply
R/B signal out
G signal out
9V power supply
NC
NC
9V power supply
Clock pulse input
GND
Clock pulse input
Clock pulse input
5V power supply
GND
GND
Clock pulse input
NC
GND
Output gate bias
5V power supply
GND
NC
Item
Symbol
Min.
Typ.
Max.
Unit
Input capacity of
RS,
CLK
Input capacity of
V1,
V2
Input capacity of
ROG
Input clock frequency
C
RS, C
CLK
C
V1, C
V2
C
ROG
f
RS, f
CLK
--
--
--
--
10
10
10
--
--
--
--
3.5
pF
pF
pF
MHz
Note) Rules for raising and lowering power supply voltage.
To raise power supply voltage, first raise V
DD1
(9V) and then V
DD2
(5V).
To lower voltage, first lower V
DD2
(5V) and then V
DD1
(9V).
Clock Characteristics
Recommended Supply Voltage
Item
V
DD1
V
DD2
Min.
8.5
4.75
Typ.
9.0
5.0
Max.
9.5
5.25
Unit
V
V
3
ILX522K
Electrical Characteristics (Note 1)
(Ta = 25C, V
DD1
= 9V, V
DD2
= 5V f
RS = 3.5MHz Light source = 3200K, IR cut filter CM-500S (t = 1.0mm))
Item
Symbol
Min.
Typ.
Max.
Unit
Remarks
Sensitivity
Sensitivity nonuniformity
Saturation output voltage
Dark voltage average
Dark signal nonuniformity
Image lag
9V supply current
5V supply current
Total transfer efficiency
Output impedance
Offset level
R
R
R
G
R
B
PRNU
V
SAT
V
DRK-G
V
DRK-R/B
DSNU
-G
DSNU
-R/B
IL
I
VDD1
I
VDD2
TTE
Z
O
V
OS
5.2
6.5
2.8
--
1.0
--
--
--
--
--
--
--
92.0
--
--
8.0
10.0
4.3
5.0
1.5
0.3
1.5
0.6
2.0
0.02
20
16.0
98.0
150
5.4
10.8
13.5
5.8
15.0
--
1.5
9.0
3.0
12.0
--
40
32.0
--
--
--
V/(lx s)
%
V
mV
%
mA
mA
%
V
Note 2
Note 3
Note 4
Note 5
Note 6
--
--
--
--
Note 7
Red
Green
Blue
Green
Red/Blue
Green
Red/Blue
Note:
1) In accordance with the given electrooptical characteristics, the black level is defined as the average of D3,
D4, to D10.
2) For the sensitivity test light is applied with a uniform intensity of illumination.
3) PRNU is defined as indicated below in each color. Ray incidence conditions are the same as for Note 2.
PRNU =
100 [%]
The maximum output of each color is set to V
MAX
, the minimum output to V
MIN
, and the average output to
V
AVE
.
4) Use below the minimum value of the saturation output voltage.
5) Optical signal accumulated time
int stands at 5ms.
6) V
OUT-G
= 500mV (Typ.)
7) V
OS
is defined as indicated below.
(V
MAX
V
MIN
)/2
V
AVE
V
OUT
GND
V
OS
V
OUT
indicates V
OUT-G
and V
OUT-R/B.
4
ILX522K
Clock Timing Chart
Optical Black (18 pixels)
Dummy Signal (32 pixels)
1 Line Output (2094 pixels)
5V
0V
5V
0V
5V
0V
5V
0V
5V
0V
0
0
ROG
V1
V2
CLK
RS
V
OUT-G
V
OUT-R/B
12
3
D1
D2
D3
D12
D13
D14
D30
D31
D32
G1
G2
G2046
G2047
G2048
D33
D34
D39
D40
D46
D1
D2
D3
D12
D13
D14
D30
D31
D32
R1
B1
D33
D34
D39
D40
D46
2088
2094
B1023
R1024
B1024
Note)
CLK,
RS pulses must have more than 2094 cycles.
5
ILX522K
Item
Symbol
Min.
Typ.
Max.
Unit
ROG,
V2
CLK pulse timing
ROG,
V1,
V2 pulse period
ROG
V1 pulse timing
V1
CLK pulse timing
ROG,
V1,
V2 pulse rise time, fall time
t1
t2, t4
t3
t5
t6, t7
1
28
1
1
0
2
30
2
2
10
--
--
--
--
30
s
s
s
s
ns
ROG,
V1,
V2,
CLK Timing
CLK
t6
t7
t2
t3
t1
t6
t3
t6
t1
t2
t7
t7
t5
t4
V2
V1
ROG
6
ILX522K
Item
Symbol
Min.
Typ.
Max.
Unit
CLK pulse high level period
RS pulse high level period
Signal output delay time
t1
t2
t3
t4
t5
t6
135
30
--
--
--
--
500
250
60
25
70
25
--
--
--
--
--
--
ns
ns
ns
ns
ns
ns
CLK,
RS, V
OUT
Timing
CLK
t1
t2
t3
t5
t4
t6
RS
V
OUT
These timing is the condition under f
RS = 1MHz.
7
ILX522K
Application Circuit
NC
V1
GND
V
DD2
V
GG
GND
NC
CLK
GND
GND
V
DD2
RS
V2
V
DD1
V
OUT-R/B
V
OUT-G
V
DD1
NC
NC
V
DD1
ROG
GND
74HC04
CLK
74HC04
V1
10
16V
0.01
9V
5V
12
13
14
15
16
17
18
19
20
21
22
10
10V
0.01
10
16V
0.01
RS
1k
1k
74HC04
V
OUT-R/B
V
OUT-G
2SA1175
2SA1175
V2
74HC04
ROG
74HC04
2
3
4
5
6
7
8
9
10
11
1
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
8
ILX522K
Spectral sensitivity characteristics (Standard characteristics)
Wave length [nm]
Relative sensitivity
1.0
0.8
0.6
0.4
0.2
0
400
450
500
550
600
650
700
Dark signal output temperature characteristics
(Standard characteristics)
Ta Ambient temperature [C]
0
10
20
30
40
50
60
Output voltage rate
10
5
1
0.5
0.1
Integration time output voltage characteristics
(Standard characteristics)
int integration time [ms]
1
5
10
Output voltage rate
1
0.5
0.1
Example of Representative Characteristics (V
DD1
= 9V, V
DD2
= 5V, Ta = 25C)
9
ILX522K
Operational frequency characteristics of the V
DD1
supply current (Standard characteristics)
f
CLK
CLK clock frequency [MHz]
0
0.5
1.0
1.5
2.0
2.5
3.0
I
VDD1
V
DD1
supply current [mA]
40
30
20
10
0
3.5
Ta = 25C
4.75
5
5.25
Ta = 25C
9
7
5
3
0
8
6
4
1
2
0
0.5
1.0
1.5
2.0
2.5
3.0
20
15
10
5
0
3.5
Ta = 25C
Offset level vs. V
DD1
characteristics
(Standard characteristics)
V
DD1
[V]
8.5
9.0
V
OS
Offset level [V]
9
7
5
3
0
9.5
Ta = 25C
8
6
4
1
2
Offset level vs. Temperature characteristics
(Standard characteristics)
Ta Ambient temperature [C]
0
40
60
V
OS
Offset level [V]
6
4
0
8
2
10
30
20
50
f
CLK
CLK clock frequency [MHz]
Operational frequency characteristics of the V
DD2
supply current (Standard characteristics)
I
VDD2
V
DD2
supply current [mA]
V
OS
Offset level [V]
Offset level vs. V
DD2
characteristics
(Standard characteristics)
V
DD2
[V]
V
OS
V
DD2
0.54
V
OS
Ta
3mV/C
10
ILX522K
Notes of Handling
1) Static charge prevention
CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following
protective measures.
a) Either handle bare handed or use non chargeable gloves, clothes or material. Also use conductive
shoes.
b) When handling directly use an earth band.
c) Install a conductive mat on the floor or working table to prevent the generation of static electricity.
d) lonized air is recommended for discharge when handling CCD image sensor.
e) For the shipment of mounted substrates, use boxes treated for prevention of static charges.
2) Notes on Handling CCD Cer-DlP Packages
The following points should be observed when handling and installing cer-DlP packages.
a) Remain within the following limits when applying static load to the ceramic portion of the package:
(1) Compressive strength: 39 N/surface (Do not apply load more than 0.7mm inside the outer
perimeter of the glass portion.)
(2) Shearing strength: 29 N/surface
(3) Tensile strength: 29 N/surface
(4) Torsional strength: 0.9 Nm
Upper ceramic layer
39N
Lower ceramic layer
(1)
Low-melting glass
29N
29N
(2)
(3)
(4)
0.9Nm
b) In addition, if a load is applied to the entire surface by a hard component, bending stress may be
generated and the package may fracture, etc., depending on the flatness of the ceramic portion.
Therefore, for installation, either use an elastic load, such as a spring plate, or an adhesive.
c) Be aware that any of the following can cause the glass to crack: because the upper and lower ceramic
layers are shielded by low-melting glass,
(1) Applying repetitive bending stress to the external leads.
(2) Applying heat to the external leads for an extended period of time with soldering iron.
(3) Rapid cooling or heating
(4) Rapid cooling or impact to a limited portion of the low-melting glass with a small-tipped tool such as
tweezers.
(5) Prying the upper or lower ceramic layers away at a support point of the low-melting glass.
Note that the preceding notes should also be observed when removing a component from a board after
it has already been soldered.
3) Soldering
a) Make sure the package temperature does not exceed 80C.
b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a grounded
30W soldering iron and solder each pin in less then 2 seconds. For repairs and remount, cool
sufficiently.
c) To dismount an imaging device, do not use a solder suction equipment. When using an electric
desoldering tool, ground the controller. For the control system, use a zero cross type.
11
ILX522K
4) Dust and dirt protection
a) Operate in clean environments.
b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces.
Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity
ionized air is recommended.)
c) Clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. Be careful not to
scratch the glass.
d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when
moving to a room with great temperature differences.
5) Exposure to high temperatures or humidity will affect the characteristics. Accordingly avoid storage or
usage in such conditions.
6) CCD image sensors are precise optical equipment that should not be subject to mechanical shocks.
7) Since ILX522K has 2 line memory so that the signal of R/B line is delay, compese the optical system sub-
scanning R/B line initially.
12
ILX522K
Package Outline
Unit: mm
PACKAGE STRUCTURE
V
H
6.26
0.8
22
28.672 (14
m
2048Pixels)
41.6
0.5
1
11
12
No.1 Pixel (Green)
40.2
5.0 0.5
4.0 0.5
2.54
0.51
3.65
4.45 0.5
0.25
0 to 9
10.16
10.0 0.5
9.0
0.3
1.
The height from the bottom to the sensor surface is 2.45
0.3mm.
2.
The thickness of the cover glass is 0.8mm, and the refractive index is 1.5.
22pin DIP (400mil)
(AT STAND OFF)
M
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE WEIGHT
Cer-DIP
TIN PLATING
42 ALLOY
5.2g
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