1
E00818-PS
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
ILX554A
22 pin DIP (Cer-DIP)
2048-pixel CCD Linear Sensor (B/W) for Single 5V Power Supply Bar-code Reader
GND
V
OUT
V
DD
SHSW
Readout gate
CCD analog shift register
Cloc
k-dr
iv
ers
Mode selector
Readout gate
pulse gener
ator
Cloc
k pulse gener
ator/
Sample-and-hold pulse gener
ator
5
1
19
20
11
4
RO
G
CLK
D1
D2
D32
S1
S2
S3
S2046
S2047
S2048
D33
D40
D39
Output amplifier
S/H circuit
V
OUT
NC
NC
SHSW
CLK
NC
NC
NC
NC
NC
ROG
NC
NC
V
DD
GND
NC
NC
NC
NC
NC
NC
NC
1
2048
1
2
3
4
5
6
7
8
9
10
11
22
21
20
19
18
17
16
15
14
13
12
Description
The ILX554A is a rectangular reduction type CCD
linear image sensor designed for bar code POS
hand scanner and optical measuring equipment use.
A built-in timing generator and clock-drivers ensure
single 5V power supply for easy use.
Features
Number of effective pixels:
2048 pixels
Pixel size:
14m
56m
(14m pitch)
Single 5V power supply
Ultra-high sensitivity
Built-in timing generator and clock-drivers
Built-in sample-and-hold circuit
Maximum clock frequency:
2MHz
Absolute Maximum Ratings
Supply voltage
V
DD
6
V
Operating temperature
10 to +60
C
Storage temperature
30 to +80
C
Pin Configuration (Top View)
Block Diagram
For the availability of this product, please contact the sales office.
2
ILX554A
Pin Description
Pin No.
Symbol
Description
1
2
3
4
5
6
7
8
9
10
11
V
OUT
NC
NC
SHSW
CLK
NC
NC
NC
NC
NC
ROG
Signal output
NC
NC
Switch (with S/H or without S/H)
Clock pulse input
NC
NC
NC
NC
NC
Readout gate pulse input
Pin No.
Symbol
Description
12
13
14
15
16
17
18
19
20
21
22
NC
NC
NC
NC
NC
NC
NC
GND
V
DD
NC
NC
NC
NC
NC
NC
NC
NC
NC
GND
5V power supply
NC
NC
Mode Description
Mode in use
Pin 4 (SHSW)
With S/H
Without S/H
GND
V
DD
Item
Min.
Input capacity of
CLK
Input capacity of
ROG
--
--
Typ.
10
10
Max.
--
--
Unit
pF
pF
Clock Characteristics
Symbol
C
CLK
C
ROG
Item
Min.
V
IH
V
IL
4.5
0
Typ.
5.0
--
Max.
V
DD
0.5
Unit
V
V
Input Clock voltage Condition
1
1
This is applied to the all pulses applied externally. (
CLK,
ROG)
Item
Min.
V
DD
4.5
Typ.
5.0
Max.
5.5
Unit
V
Recommended Supply voltage
3
ILX554A
Electro-optical Characteristics
(Ta = 25C, V
DD
= 5V, Clock frequency: 1MHz, Light source = 3200K,
IR cut filter: CM-500S (t = 1.0mm), Without S/H mode)
Item
Min.
Sensitivity 1
Sensitivity 2
Sensitivity nonuniformity
Saturation output voltage
Dark voltage average
Dark signal nonuniformity
Image lag
Dynamic range
Saturation exposure
5V current consumption
Total transfer efficiency
Output impedance
Offset level
180
--
--
0.8
--
--
--
--
--
--
92
--
--
Typ.
240
3500
5.0
1.0
3.0
6.0
1
333
0.004
5.0
98.0
250
2.85
Max.
300
--
10.0
--
6.0
12.0
--
--
--
10
--
--
--
Unit
V/(lx s)
V/(lx s)
%
V
mV
mV
%
--
lx s
mA
%
V
Symbol
R1
R2
PRNU
V
SAT
V
DRK
DSNU
IL
DR
SE
I
VDD
TTE
Z
O
V
OS
Remarks
Note 1
Note 2
Note 3
--
Note 4
Note 4
Note 5
Note 6
Note 7
--
--
--
Note 8
D
D
D
SI
Vout
V
OS
GND
Note)
1. For the sensitivity test light is applied with a uniform intensity of illumination.
2. Light sourse: LED
= 660nm
3. PRNU is defined as indicated below. Ray incidence conditions are the same as for Note 1.
PRNU =
100 [%]
4. Integration time is 10ms.
5. Typical value is used for clock pulse and readout pulse. V
OUT
= 500mV.
6.
DR =
When optical integration time is shorter, the dynamic range sets wider because dark voltage is in
proportion to optical integration time.
7.
SE =
8. V
OS
is defined as indicated below.
The maximum output of all the valid pixels is set to V
MAX
,
the minimum output to V
MIN
and the average output to V
AVE
.
V
SAT
V
DRK
V
SAT
R1
(V
MAX
V
MIN
)/2
V
AVE
4
ILX554A
ROG
CLK
V
OUT
0
5
5
0
1
2088
0
1
2
3
Optical black
(18 pixels)
Effective picture elements signal
(2048 pixels)
Dummy signal
(8 pixels)
Dummy signal (32 pixels)
1-line output period (2088 pixels)
D1
D2
D3
D4
D5
D10
D11
D12
D13
D14
D30
D31
D32
S1
S2
S3
S4
S2045
S2046
S2047
S2048
D33
D34
D35
D36
D37
D38
D39
D40
Clock Timing Diagram (without S/H mode)
Without S/H mode (4 pin
V
DD
)
Note) 2090 or more clock pulse are required.
5
ILX554A
ROG
CLK
V
OUT
0
5
5
0
1
2088
0
1
2
3
D0
D1
D2
D3
D4
D5
Optical black
(18 pixels)
Effective picture elements signal
(2048 pixels)
Dummy signal
(8 pixels)
Dummy signal (33 pixels)
1-line output period (2089 pixels)
D10
D11
D12
D13
D14
S1
S2
D31
D30
D32
S3
S4
S2045
S2046
S2047
S2048
D33
D34
D35
D36
D37
D38
D39
D40
Clock Timing Diagram (with S/H mode)
With S/H mode (4 pin
GND)
Note) 2090 or more clock pulse are required.
6
ILX554A
CLK Timing (For all modes)
Item
CLK pulse rise/fall time
CLK pulse duty
1
Symbol
t
1,
t
2
--
Min.
0
40
Typ.
10
50
Max.
100
60
Unit
ns
%
1
100
t
4 / (
t
3 +
t
4)
ROG,
CLK Timing
Item
ROG,
CLK pulse timing 1
ROG,
CLK pulse timing 2
ROG pulse rise/fall time
ROG pulse period
Symbol
t
5
t
9
t
6,
t
8
t
7
Min.
0
1000
0
1000
Typ.
3000
3000
10
5000
Max.
--
--
--
--
Unit
ns
ns
ns
ns
t1
t2
t3
t4
CLK
t6
t7
t8
ROG
CLK
t5
t9
7
ILX554A
CLK, V
OUT
Timing (Note 1)
CLK
V
OUT
V
OUT
(Note 2)
(Note 3)
t12
t11
t10
Item
CLK-V
OUT
1
CLK-V
OUT
2
CLK-V
OUT
(with S/H) 3
Symbol
t
10
t
11
t
12
Min.
20
55
20
Typ.
100
210
150
Max.
250
410
250
Unit
ns
ns
ns
Note 1) fck = 1MHz,
CLK pulse duty = 50%,
CLK pulse rise/fall time = 10ns
Note 2) Output waveform when internal S/H is in use.
Note 3) indicates the correspondence of clock pulse and data period.
8
ILX554A
Example of Representative Characteristics
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
400
500
600
700
Wavelength [nm]
Spectral sensitivity (Typ.) (Ta = 25C)
800
900
1000
10
1
0.1
0
10
20
Ta Ambient temperature [C]
Dark voltage rate vs. Ambient temperature (Typ.)
Dar
k v
oltage r
ate
30
40
50
60
9
ILX554A
1
0.1
1
Output v
oltage r
ate
10
10
Integration time [ms]
Output voltage rate vs. Integration time (Typ.)
100
0
0
1.0
Current consumption r
ate
2.0
1.5
0.5
1.0
0.5
1.5
Clock frequency [MHz]
Current consumption rate vs. Clock frequency (Typ.)
2.0
4.50
2.4
2.8
Offset le
v
el [V]
3.2
3.0
2.6
2.5
5.00
4.75
5.25
V
DD
[V]
Offset level vs. V
DD
(Typ.)
5.50
2.9
3.1
2.7
0
2.4
2.8
Offset le
v
el [V]
3.2
3.0
2.6
2.5
20
40
Ambient temperature [C]
Offset level vs. Ambient temperature (Typ.)
60
2.9
3.1
2.7
10
ILX554A
Application Circuit (Without S/H mode)
Note)
CLK
ROG
V
DD
3k
V
OUT
0.01
22/10V
V
OUT
NC
NC
SHSW
CLK
NC
NC
NC
V
DD
GND
NC
NC
1
2
3
4
5
6
17
18
19
20
21
22
NC
NC
NC
NC
RO
G
NC
NC
NC
NC
NC
7
8
9
10
11
12
13
14
15
16
100
100
Note) This circuit diagram is the case when internal S/H mode is not used.
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
11
ILX554A
Upper ceramic layer
39N
Lower ceramic layer
Low-melting glass
(1)
29N
(3)
0.9Nm
(4)
29N
(2)
Notes on Handling
1) Static charge prevention
CCD image sensors are easily damaged by static discharge. Before handling, be sure to take the following
protective measures.
a) Either handle bare handed or use non-chargeable gloves, clothes or material. Also use conductive
shoes.
b) When handling directly use an eath band.
c) Install a conductive mat on the floor or working table to prevent the generation of static electricity.
d) lonized air is recommended for discharge when handling CCD image sensors.
e) For the shipment of mounted substrates use cartons treated for the prevention of static charges.
2) Notes on handling CCD Cer-DIP package
The following points should be observed when handling and installing this package.
a) (1) Compressive strength: 39N/surface
(Do not apply any load more than 0.7mm inside the outer perimeter of the glass portion.)
(2) Shearing strength:
29N/surface
(3) Tensile strength:
29N/surface
(4) Torsional strength:
0.9Nm
b) In addition, if a load is applied to the entire surface by a hard component, bending stress may be
generated and the package may fracture, etc., depending on the flatness of the ceramic portion.
Therefore, for installation, either use an elastic load, such as a spring plate, or an adhesive.
c) Be aware that any of the following can cause the glass to crack because the upper and lower ceramic
layers are shielded by low-melting glass.
(1) Applying repetitive bending stress to the external leads.
(2) Applying heat to the external leads for an extended period of time with a soldering iron.
(3) Rapid cooling or heating.
(4) Applying a load or impact to a limited portion of the low-melting glass with a small-tipped tool such
as tweezers.
(5) Prying the upper or lower ceramic layers away at a support point of the low-melting glass.
Note that the preceding notes should also be observed when removing a component from a board after
it has already been soldered.
3) Soldering
a) Make sure the package temperature does not exceed 80C.
b) Solder dipping in a mounting furnace causes demage to the glass abd other defects. Use a grounded
30W soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool
sufficiently.
c) To dismount image sensors, do not use a solder suction equipment. When using an electric desoldering
tool, ground the controller. For the control system, use a zero cross type.
12
ILX554A
4) Dust and dirt protection
a) Operate in clean environments.
b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should
dirt stick to a glass surface blow it off with an air blower. (For dirt stuck through static electricity, ionized
air is recommended.)
c) Clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. Be careful not to scratch
the glass.
d) Keep in case to protect from dust and dirt. To prevent dew condensation, preheat or precool when
moving to a room with great temperature differences.
5) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or usage
in such conditions.
6) CCD image sensors are precise optical equipment that should not be subject to mechanical shocks.
7) Normal output signal is not obtained immediately after device switch on. Use the output signal added 22500
pulses or above to
CLK clock pulse.
13
ILX554A
Son
y Cor
por
ation
1. The height from the bottom to the sensor surface is 2.45 0.3mm.
2. The thickness of the cover glass is 0.7mm, and the refractive index is 1.5.
V
H
6.46 0.5
22
28.672 (14m X 2048Pixels)
41.6 0.5
1
11
12
No.1 Pixel
5.0
0.3
4.0
0.5
2.54
0.51
3.65
4.35
0.5
0.25
0
to 9
10.0
0.5
0.3
22 pin DIP (400mil)
M
Cer-DIP
TIN PLATING
42 ALLOY
5.20g
PACKAGE STRUCTURE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE MASS
DRAWING NUMBER
LS-A20(E)
Package Outline Unit: mm
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