2048-pixel CCD Linear Sensor (B/W)
Description
The ILX751A is a reduction type CCD linear sensor
designed for facsimile, image scanner and OCR use.
This sensor reads B4 size documents at a density of
200DPI (Dot Per Inch). Featuring a shutter function,
correspondences with the sensitivity correction, etc,
is possible. A built-in timing generator and clock-
drivers ensure direct drive at 5V logic for easy use.
Features
Number of effective pixels: 2048 pixels
Pixel size: 14m
14m (14m pitch)
Built-in timing generator and clock-drivers
Shutter function
Ultra low lag
Maximum clock frequency: 5MHz
Absolute Maximum Ratings
Supply voltage
V
DD1
11
V
V
DD2
6
V
Operating temperature
10 to +55
C
Storage temperature
30 to +80
C
Pin Configuration (Top View)
Block Diagram
1
E00440-PS
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
ILX751A
22 pin DIP (Cer-DIP)
22
20
17
16
15
14
13
12
10
9
11
4
21
19
5
8
7
6
3
2
1
V
OUT
Output amplifier
Sample-and-hold
circuit
V
DD2
18
NC
V
DD1
GND
NC
NC
NC
NC
GND
NC
SHUT
ROG
SHSW
V
DD2
GND
CLK
V
DD2
NC
NC
NC
NC
Clock pulse generator
Sample-and-hold pulse generator
Mode
selector
Read out gate
pulse generator
Shutter gate
pulse generator
Clock-drivers
CCD analog shift register
Read out gate
Shutter gate
D14
D15
S1
D33
S2
S2047
S2048
D34
D35
D36
D37
D38
D39
Shutter drain
1
22
V
OUT
2
NC
3
NC
4
SHSW
5
CLK
6
NC
7
NC
8
V
DD2
9
SHUT
10
NC
11
21
20
19
18
17
16
15
14
13
12
ROG
V
DD2
V
DD2
V
DD1
GND
NC
GND
NC
NC
NC
NC
GND
1
2048
2
ILX751A
Unit
pF
pF
pF
Max.
--
--
--
Typ.
10
10
10
Min.
--
--
--
Symbol
C
CLK
C
ROG
C
SHUT
Item
Input capacity of
CLK pin
Input capacity of
ROG pin
Input capacity of
SHUT pin
Input Capacity of Pins
Item
Unit
V
V
Max.
9.5
5.25
Typ.
9.0
5.0
Min.
8.5
4.75
Item
V
DD1
V
DD2
Recommended Supply Voltage
Pin condition
Pin 4 SHSW
GND
V
DD2
Mode in use
S/H
Yes
No
Mode Description
Unit
V
V
Max.
5.5
0.5
Typ.
5.0
--
Min.
4.5
0.0
Input clock high level
Input clock low level
Recommended Input Pulse Voltage
Pin Description
Pin
No.
Symbol
Description
1
2
3
4
5
6
7
8
9
10
11
V
OUT
NC
NC
SHSW
CLK
NC
NC
V
DD2
SHUT
NC
ROG
Signal output
NC
NC
with S/H
GND
Switch
without S/H
V
DD
2
Clock pulse
NC
NC
5V power supply
Shutter pulse
NC
Clock pulse
Pin
No.
Symbol
Description
12
13
14
15
16
17
18
19
20
21
22
GND
NC
NC
NC
NC
GND
NC
GND
'
V
DD1
V
DD2
V
DD2
GND
NC
NC
NC
NC
GND
NC
GND
9V power supply
5V power supply
5V power supply
Note) Rules for raising and lowering power supply voltage
To raise power supply voltage, first raise V
DD1
(9V) and then V
DD2
(5V).
To lower voltage, first lower V
DD2
(5V) and then V
DD1
(9V).
{
3
ILX751A
Unit
Remarks
Max.
50
8.0
--
2.0
3.0
--
--
--
8.0
5.0
--
--
--
5.0
Typ.
40
2.0
1.8
0.3
0.5
0.02
6000
0.045
4.0
1.8
97.0
600
4.0
1.0
Min.
30
--
1.5
--
--
--
--
--
--
--
92.0
--
--
0
Symbol
R
PRNU
V
SAT
V
DRK
DSNU
IL
DR
SE
I
VDD1
I
VDD2
TTE
Z
O
V
OS
SHUT
Item
Electrooptical Characteristics
(Ta = 25C, V
DD1
= 9V, V
DD2
= 5V, Clock frequency = 1MHz, Light source = 3200K, IR cut filter: CM-500S (t = 1.0mm))
Notes)
1. For the sensitivity test light is applied with a uniform intensity of illumination.
2. PRNU is defined as indicated below. Ray incidence conditions are the same as for Note 1.
PRNU =
100 [%]
The maximum output is set to V
MAX
, the minimum output to V
MIN
and the average output to V
AVE
.
3. Integration time is 10ms.
4. V
OUT
= 500mV
5. DR =
When optical accumulated time is shorter, the dynamic range gets wider because dark voltage is in
proportion to optical accumulated time.
6. SE =
7. Vos is defined as indicated below.
(V
MAX
V
MIN
)/2
V
AVE
V
SAT
R
GND
OS
D31
D32
D33
S1
V
OS
,
V/(lx s)
%
V
mV
mV
%
--
lx s
mA
mA
%
V
%
Note 1
Note 2
--
Note 3
Note 3
Note 4
Note 5
Note 6
--
--
--
--
Note 7
Note 8
Secsitivity
Sensitivity nonuniformity
Saturation output voltage
Dark voltage average
Dark signal nonuniformity
Image lag
Dynamic range
Saturation exposure
9V supply current
5V supply current
Total transfer efficiency
Output impedance
Offset level
Shutter lag
V
SAT
V
DRK
4
ILX751A
8. To stipulate the lag during shutter operation, use the formula below.
Place the output voltage average value during shutter operation at V
SHUT
and the output voltage average
value when the shutter is not in operation at V
AVE
. (Refer to Fig. 5.)
SHUT =
100 [%]
Please note that the shutter pulse at this time accord with Fig. 5.
V
SHUT
V
AVE
5
ILX751A
Fig. 1. Clock Timing Diagram (without S/H mode)
D
u
m
m
y
s
i
g
n
a
l
(
3
3
p
i
x
e
l
s
)
O
p
t
i
c
a
l
b
l
a
c
k
(
1
8
p
i
x
e
l
s
)
D
u
m
m
y
s
i
g
n
a
l
(
6
p
i
x
e
l
s
)
E
f
f
e
c
t
i
v
e
p
i
c
t
u
r
e
e
l
e
m
e
n
t
s
s
i
g
n
a
l
(
2
0
4
8
p
i
x
e
l
s
)
1
-
l
i
n
e
o
u
t
p
u
t
p
e
r
i
o
d
(
2
0
8
7
p
i
x
e
l
s
)
1
D2
D3
D4
D5
D6
D1
1
D1
2
D1
3
D1
4
D1
5
D3
1
D3
2
D3
3
S1
S2
S3
S4
S2
04
5
S2
04
6
S2
04
7
S2
04
8
D3
4
D3
5
D3
6
S3
7
S3
8
D3
9
2
3
4
20
87
1
2
5
R
O
G
C
L
K
V
O
U
T
0
5
0
6
ILX751A
Fig. 2.
CLK, V
OUT
Timing
,,
,
,,
CLK
t3
t4
t2
t1
t5
t6
V
OUT
Item
CLK pulse rise/fall time
CLK pulse duty
1
CLK V
OUT
1
CLK V
OUT
2
Symbol
t1, t2
--
t5
t6
Min.
0
40
50
30
Typ.
10
50
80
75
Max.
--
60
110
120
Unit
ns
%
ns
ns
Fig. 3.
ROG,
CLK Timing
ROG
CLK
t7
t11
t8
t10
t9
Item
ROG,
CLK pulse timing
ROG pulse rise/fall time
ROG pulse period
Symbol
t7, t11
t8, t10
t9
Min.
500
0
500
Typ.
1000
10
1000
Max.
--
--
--
Unit
ns
ns
ns
1
100
t3/(t3 + t4)
7
ILX751A
Fig. 4.
SHUT Timing
SHUT
t12
t14
t13
Item
SHUT pulse rise/fall time
SHUT pulse period
Symbol
t12, t13
t14
Min.
0
500
Typ.
10
1000
Max.
--
--
Unit
ns
ns
8
ILX751A
Fig. 5. Shutter Operation Mode Clock
2
0
8
7
b
i
t
s
o
r
m
o
r
e
L
i
g
h
t
s
o
u
r
c
e
O
N
1
m
s
5
0
R
O
G
5
0
C
L
K
5
0
D
u
r
i
n
g
s
h
u
t
t
e
r
l
a
g
e
v
a
l
u
a
t
i
o
n
,
t
h
e
l
i
g
h
t
s
o
u
r
c
e
w
i
l
l
b
e
a
c
c
o
m
p
a
n
i
e
d
b
y
a
f
l
a
s
h
.
S
H
U
T
I
l
l
u
m
i
n
a
t
i
o
n
9
ILX751A
Fig. 6. Shutter Pulse and Output Voltage
O
N
5
V
0
V
R
O
G
I
l
l
u
m
i
n
a
t
i
o
n
S
H
U
T
V
O
U
T
5
V
0
V
O
F
F
O
N
O
N
S
h
u
t
t
e
r
O
N
V
A
V
E
V
S
H
U
T
O
F
F
O
F
F
10
ILX751A
Description of Shutter Pin 9
1) The state at 5V is when the shutter is not in operation.
2) When dropped to 0V, the shutter gate will open, letting the accumulated charge of the sensor be thrown
away to the shutter drain.
,
,
The charge is sent to the transfer
register as signal charge.
The charge up to this point will be thrown
away to the shutter drain.
Shutter gate ON
5V
ROG
SHUT
Accumulated charge
of the sensor
0V
5V
0V
11
ILX751A
Example of Representative Characteristics
Dark signal voltage rate vs. Ambient temperature
(Standard characteristics)
10
5
1
D
a
r
k
s
i
g
n
a
l
v
o
l
t
a
g
e
r
a
t
e
0.5
0.1
0
10
20
30
Ta Ambient temperature [
C]
40
50
60
V
DD1
, V
DD2
supply current vs. Clock frequency
(Standard characteristics)
10
I
VDD1
Ta = 25
C
I
VDD2
5
1
I
V
D
D
1
,
I
V
D
D
2
V
D
D
1
,
V
D
D
2
s
u
p
p
l
y
c
u
r
r
e
n
t
[
m
A
]
0.5
0.1
0.1M
1M
Clock frequency [Hz]
5M
Spectral sensitivity characteristics
(Standard characteristics)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
R
e
l
a
t
i
v
e
s
e
n
s
i
t
i
v
i
t
y
400
500
600
700
800
900
1000
Wavelength [nm]
12
ILX751A
Application Circuit
V
OU
T
NC
NC
SH
SW
CL
K
NC
NC
V
DD
2
(D
)
SH
UT
NC
RO
G
V
DD
2
(D
)
V
DD
2
(D
)
1
5
V
9
V
0
.
0
1
1
0
/
1
6
V
2
S
A
1
1
7
5
C
L
K
S
H
U
T
R
O
G
2
2
/
1
0
V
0
.
0
1
O
u
t
p
u
t
s
i
g
n
a
l
3
k
V
DD
1
(A
)
GN
D (
A)
NC
GN
D (
A)
NC
NC
NC
NC
GN
D (
D)
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
2
3
4
5
6
7
8
9
1
0
1
1
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility fo
r
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same
.
13
ILX751A
Notes of Handling
1) Static charge prevention
CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following
protective measures.
a) Either handle bare handed or use non chargeable gloves, clothes or material. Also use conductive shoes.
b) When handling directly use an earth band.
c) Install a conductive mat on the floor or working table to prevent the generation of static electricity.
d) Ionized air is recommended for discharge when handling CCD image sensor.
e) For the shipment of mounted substrates, use boxes treated for prevention of static charges.
2) Notes on Handling CCD Cer-DIP Packages
The following points should be observed when handling and installing cer DIP packages.
a) Remain within the following limits when applying static load to the ceramic portion of the package:
(1) Compressive strength: 39N/surface
(Do not apply load more than 0.7mm inside the outer perimeter of the glass portion.)
(2) Shearing strength: 29N/surface
(3) Tensile strength: 29N/surface
(4) Torsional strength: 0.9Nm
b) In addition, if a load is applied to the entire surface by a hard component, bending stress may be
generated and the package may fracture, etc., depending on the flatness of the ceramic portion.
Therefore, for installation, either use an elastic load, such as a spring plate, or an adhesive.
c) Be aware that any of the following can cause the glass to crack: because the upper and lower ceramic
layers are shielded by low-melting glass,
(1) Applying repetitive bending stress to the external leads.
(2) Applying heat to the external leads for an extended period of time with soldering iron.
(3) Rapid cooling or heating.
(4) Rapid cooling or impact to a limited portion of the low-melting glass with a small-tipped tool such as
tweezers.
(5) Prying the upper or lower ceramic layers away at a support point of the low-melting glass.
Note that the preceding notes should also be observed when removing a component from a board after
it has already been soldered.
3) Soldering
a) Make sure the package temperature does not exceed 80C.
b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a grounded
30W soldering iron and solder each pin in less then 2 seconds. For repairs and remount, cool sufficiently.
c) To dismount an imaging device, do not use a solder suction equipment. When using an electric desoldering
tool, ground the controller. For the control system, use a zero cross type.
Upper ceramic layer
39N
Lower ceramic layer
Low-melting glass
(1)
29N
(3)
0.9Nm
(4)
29N
(2)
,
,
,
,
14
ILX751A
4) Dust and dirt protection
a) Operate in clean environments.
b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should
dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized
air is recommended.)
c) Clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. Be careful not to scratch
the glass.
d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when
moving to a room with great temperature differences.
5) Exposure to high temperatures or humidity will affect the characteristics. Accordingly avoid storage or
usage in such conditions.
6) CCD image sensors are precise optical equipment that should not be subject to mechanical shocks.
15
ILX751A
Package Outline
Unit: mm
1
.
T
h
e
h
e
i
g
h
t
f
r
o
m
t
h
e
b
o
t
t
o
m
t
o
t
h
e
s
e
n
s
o
r
s
u
r
f
a
c
e
i
s
2
.
4
5
0
.
3
m
m
.
2
.
T
h
e
t
h
i
c
k
n
e
s
s
o
f
t
h
e
c
o
v
e
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l
a
s
s
i
s
0
.
7
m
m
,
a
n
d
t
h
e
r
e
f
r
a
c
t
i
v
e
i
n
d
e
x
i
s
1
.
5
.
V
H
7
.
3
5
0
.
5
2
2
2
8
.
6
7
2
(
1
4
m
X
2
0
4
8
P
i
x
e
l
s
)
4
1
.
6
0
.
5
1
1
1
1
2
N
o
.
1
P
i
x
e
l
5.0
0
.5
4.0
0
.5
2
.
5
4
0
.
5
1
3.6
5
4.3
5
0
.5
0.2
5
0
to
9
10
.0
0
.5
0
.
3
2
2
p
i
n
D
I
P
(
4
0
0
m
i
l
)
M
C
e
r
-
D
I
P
T
I
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P
L
A
T
I
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G
4
2
A
L
L
O
Y
5
.
2
0
g
P
A
C
K
A
G
E
S
T
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(
E
)
Sony Corporation
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