ChipFind - документация

Электронный компонент: LCX019AM

Скачать:  PDF   ZIP
Description
The LCX019AM is a 3.4cm diagonal active matrix
TFT-LCD panel addressed by polycrystalline silicon
super thin film transistors with built-in peripheral
driving circuit. This panel allows full-color
representation without color filters through the use of
a microlens.
This panel has an aspect ratio of 4:3 and supports
NTSC/PAL display.
This panel has a polysilicon TFT high-speed
scanner and built-in function to display images
up/down and/or right/left inverse. The built-in 5V
interface circuit leads to lower voltage of timing and
control signals.
Features
The number of active dots: 576,000 (1.32-inch; 3.4cm in diagonal)
Horizontal resolution: 600TV lines
Effective aperture ratio: 70% (reference value)
High contrast ratio with normally white mode: 200 (typ.)
Built-in H and V drivers (built-in input level conversion circuit, 5V driving possible)
Supports NTSC
(PAL mode also available through conversion of scanned dot numbers by an external IC)
Up/down and/or right/left inverse display function
Element Structure
Dots: 1199.5 (H)
480 (V) = 575,760
Built-in peripheral driver using polycrystalline silicon super thin film transistors.
Applications
Liquid crystal projectors, etc.
1
LCX019AM
E97106A94-PS
3.4cm (1.32-inch) LCD Panel (with microlens)
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
For the availability of this product, please contact the sales office.
2
LCX019AM
Block Diagram
M
o
d
e

C
o
n
t
r
o
l
l
e
r
Level
Shifter
Bi-directional H Driver
B
i
-
d
i
r
e
c
t
i
o
n
a
l

V

D
r
i
v
e
r
B
i
-
d
i
r
e
c
t
i
o
n
a
l

V

D
r
i
v
e
r
2
3
4
5
6
7
8
9
10 11
12 13
14 15 16
17
18
19
20
21
22
23
1
VCOM
P
r
e
c
h
a
r
g
e
C
o
n
t
r
o
l
l
e
r
P
S
I
G
H
S
T
H
C
K
1
H
C
K
2
N
.
C
.
R
G
T
V
S
T
V
C
K
P
C
G
D
W
N
E
N
B
A
V
D
D
H
V
D
D
V
V
D
D
V
S
S
V
S
S
G
S
I
G
6

(
B
2
)
S
I
G
5

(
R
2
)
S
I
G
4

(
G
2
)
S
I
G
3

(
B
1
)
S
I
G
2

(
R
1
)
S
I
G
1

(
G
1
)
C
O
M
3
LCX019AM
Absolute Maximum Ratings (V
SS
= 0V)
H driver supply voltage
HV
DD
1.0 to +20
V
V driver supply voltage
VV
DD
1.0 to +20
V
Analog block drive supply voltage
AV
DD
1.0 to +20
V
Common pad voltage
COM
1.0 to +17
V
H shift register input pin voltage
HST, HCK1, HCK2
1.0 to +17
V
RGT
V shift register input pin voltage
VST, VCK, PCG
1.0 to +17
V
ENB, DWN
Video signal input pin voltage
SIG1, SIG2, SIG3, SIG4
1.0 to +15
V
SIG5, SIG6, PSIG
Operating temperature
Topr
10 to +70
C
Storage temperature
Tstg
30 to +85
C
Operating Conditions (V
SS
= 0V)
Supply voltage
HV
DD
13.5 0.3
V
VV
DD
13.5 0.3
V
AV
DD
15.5 0.3
V
Input pulse voltage (Vp-p of all input pins except video signal and side black signal input pins)
Vin
5.0 0.5
V
Pin Description
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
COM
V
SS
G
PSIG
SIG1 (G1)
SIG2 (R1)
SIG3 (B1)
SIG4 (G2)
SIG5 (R2)
SIG6 (B2)
AV
DD
HV
DD
N.C.
13
14
15
16
17
18
19
20
21
22
23
24
RGT
HST
HCK1
HCK2
V
SS
ENB
VCK
VST
DWN
PCG
VV
DD
TEST
Drive direction pulse for H shift
register (H: normal, L: reverse)
Start pulse for H shift register
drive
Clock pulse for H shift register
drive
Clock pulse for H shift register
drive
GND (H, V drivers)
Enable pulse for gate selection
Clock pulse for V shift register
drive
Start pulse for V shift register
drive
Drive direction pulse for V shift
register (H: normal, L: reverse)
Improvement pulse (2) for
uniformity
Power supply for V driver
Test; Open
Common voltage of panel
Analog block GND
Improvement pulse for uniformity
Video signal 1 (G) to panel
Video signal 2 (R) to panel
Video signal 3 (B) to panel
Video signal 4 (G) to panel
Video signal 5 (R) to panel
Video signal 6 (B) to panel
Analog block power supply
Power supply for H driver
Symbol
Description
Pin
No.
Symbol
Description
4
LCX019AM
Input Equivalent Circuit
To prevent static charges, protective diodes are provided for each pin except the power supply. In addition,
protective resistors are added to all pins except video signal input. All pins are connected to V
SS
with a high
resistance of 1M
(typ.). The equivalent circuit of each input pin is shown below: (The resistor value: typ.)
Input
LC
Level conversion circuit
(single-phase input)
2.5k
2.5k
VV
DD
Input
Level conversion circuit
(single-phase input)
250
250
HV
DD
Input
Level conversion circuit
(single-phase input)
2.5k
2.5k
HV
DD
Input
HV
DD
250
250
250
250
Level conversion circuit
(2-phase input)
Input
HV
DD
Signal line
(1) SIG1, SIG2, SIG3, SIG4, SIG5, SIG6, PSIG
(2) HCK1, HCK2
(3) RGT
(4) HST
(5) PCG, VCK
(6) VST, ENB, DWN
(7) COM
1M
Input
1M
1M
1M
1M
Level conversion circuit
(single-phase input)
250
250
VV
DD
Input
1M
1M
1M
VV
DD
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
5
LCX019AM
Input Signals
1. Input signal voltage conditions
(Vss = 0V)
Item
H driver input voltage
RGT, HST, HCK1, HCK2
(Low)
(High)
(Low)
(High)
VHIL
VHIH
VVIL
VVIH
VVC
Vsig
Vcom
Vpsig
0.5
4.5
0.5
4.5
6.8
VVC 4.5
VVC 0.3
VVC 3.4
0.0
5.0
0.0
5.0
7.0
--
VVC 0.2
VVC 3.5
0.3
5.5
0.3
5.5
7.2
VVC + 4.5
VVC 0.1
VVC 3.6
V
V
V
V
V
V
V
V
V driver input voltage
ENB, VCK, PCG, VST, DWN
Video signal center voltage
Video signal input range
1
(SIG1 to 6)
Common voltage of panel
2
Uniformity improvement signal input
(PSIG)
3
Symbol
Min.
Typ.
Max.
Unit
1
Video input signal shall be symmetrical to VVC.
2
Common voltage of the panel shall be adjusted to VVC 0.2 V.
3
The uniformity improvement signal PSIG shall be input with the same polarity as video signals SIG1 to 6
and symmetrically with respect to VVC. Also, the PSIG rise and fall shall be synchronized with the PCG
pulse rise and the time between the rise trPSIG and fall tfPSIG shall be kept to 800ns or less. (See the
figure below.)
Uniformity Improvement Signal PSIG Input Waveform
Level Conversion Circuit
The LCX019AM has a built-in level conversion circuit in the clock input unit on the panel. The input signal level
increases to HV
DD
or VV
DD
. The V
CC
of external ICs are applicable to 5 0.5V.
trPSIG
tfPSIG
VVC
PSIG
PCG
90%
10%