1/16

September 2000

M27C801

8 Mbit (1Mb x 8) UV EPROM and OTP EPROM

5V ± 10% SUPPLY VOLTAGE in READ
OPERATION

ACCESS TIME: 45ns

LOW POWER CONSUMPTION:

Active Current 35mA at 5MHz

Standby Current 100µA

PROGRAMMING VOLTAGE: 12.75V ± 0.25V

PROGRAMMING TIME: 50µs/word

ELECTRONIC SIGNATURE

Manufacturer Code: 20h

Device Code: 42h

DESCRIPTION
The M27C801 is an 8 Mbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It is ideally suited for applica-
tions where fast turn-around and pattern experi-
mentation are important requirements and is
organized as 1,048,576 by 8 bits.
The FDIP32W (window ceramic frit-seal package)
has transparent lid which allows the user to ex-
pose the chip to ultraviolet light to erase the bit pat-
tern. A new pattern can then be written to the
device by following the programming procedure.
For applications where the content is programmed
only one time and erasure is not required, the
M27C801 is offered in PDIP32, PLCC32 and
TSOP32 (8 x 20 mm) packages.

FDIP32W (F)

PLCC32 (K)

TSOP32 (N)

8 x 20 mm

PDIP32 (B)

Figure 1. Logic Diagram

AI01267

A0-A19

Q0-Q7

VCC

M27C801

VSS

GVPP

M27C801

2/16

Figure 2C. TSOP Connections

A13

A10

A14

A11

GVPP

A17

A18

A16

A12

A19

VCC

A15

AI01269

M27C801

(Normal)

VSS

Figure 2B. PLCC Connections

AI01814

A17

A10

A18

A16

A11

A13

A12

A19

M27C801

A15

A14

GVPP

Figure 2A. DIP Connections

A13

A10

A14

A11

GVPP

VSS

A17

A18

A16

A12

A19

VCC

A15

AI01268

M27C801

Table 1. Signal Names

A0-A19

Address Inputs

Q0-Q7

Data Outputs

Chip Enable

Output Enable / Program Supply

Supply Voltage

Ground

3/16

M27C801

Table 2. Absolute Maximum Ratings

(1)

Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may

cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant qual-
ity documents.

2. Minimum DC voltage on Input or Output is 0.5V with possible undershoot to 2.0V for a period less than 20ns. Maximum DC

voltage on Output is V

+0.5V with possible overshoot to V

+2V for a period less than 20ns.

3. Depends on range.

Table 3. Operating Modes

Note: X = V

or V

, V

= 12V ± 0.5V.

Table 4. Electronic Signature

Symbol

Parameter

Value

Unit

Ambient Operating Temperature

(3)

40 to 125

°C

BIAS

Temperature Under Bias

50 to 125

°C

STG

Storage Temperature

65 to 150

°C

(2)

Input or Output Voltage (except A9)

2 to 7

Supply Voltage

2 to 7

(2)

A9 Voltage

2 to 13.5

Program Supply Voltage

2 to 14

Mode

Q7-Q0

Read

Data Out

Output Disable

Hi-Z

Program

Pulse

Data In

Program Inhibit

Hi-Z

Standby

Hi-Z

Electronic Signature

Codes

Identifier

Hex Data

Manufacturer's Code

20h

Device Code

42h

M27C801

4/16

DEVICE OPERATION

The operating modes of the M27C801 are listed in
the Operating Modes table. A single power supply
is required in the read mode. All inputs are TTL
levels except for GV

and 12V on A9 for Elec-

tronic Signature and Margin Mode Set or Reset.
Read Mode
The M27C801 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, indepen-
dent of device selection. Assuming that the ad-

dresses are stable, the address access time
(t

AVQV

) is equal to the delay from E to output

ELQV

). Data is available at the output after a delay

of t

GLQV

from the falling edge of G, assuming that

E has been low and the addresses have been sta-
ble for at least t

AVQV

-t

GLQV

Standby Mode
The M27C801 has a standby mode which reduces
the supply current from 35mA to 100µA.
The M27C801 is placed in the standby mode by
applying a CMOS high signal to the E input. When
in the standby mode, the outputs are in a high im-
pedance state, independent of the GV

input.

Table 5. AC Measurement Conditions

High Speed

Standard

Input Rise and Fall Times

10ns

20ns (10% to 90%)

Input Pulse Voltages

0 to 3V

0.4 to 2.4V

Input and Output Timing Ref. Voltages

1.5V

0.8 and 2V

Figure 3. AC Testing Input Output Waveform

AI01822

High Speed

1.5V

2.4V

Standard

0.4V

2.0V

0.8V

Figure 4. AC Testing Load Circuit

AI01823B

1.3V

OUT

CL = 30pF for High Speed
CL = 100pF for Standard
CL includes JIG capacitance

3.3k

1N914

DEVICE

UNDER

TEST

Table 6. Capacitance

(1)

= 25 °C, f = 1 MHz)

Note: 1. Sampled only, not 100% tested.

Symbol

Parameter

Test Condition

Min

Max

Unit

Input Capacitance

= 0V

OUT

Output Capacitance

OUT

= 0V

5/16

M27C801

Table 7. Read Mode DC Characteristics

(1)

= 0 to 70 °C or 40 to 85 °C; V

= 5V ± 10%)

Note: 1. V

must be applied simultaneously with or before V

and removed simultaneously or after V

2. Maximum DC voltage on Output is V

+0.5V.

Table 8A. Read Mode AC Characteristics

(1)

= 0 to 70 °C or 40 to 85 °C; V

= 5V ± 10%)

Note: 1. V

must be applied simultaneously with or before V

and removed simultaneously or after V

PP.

2. Sampled only, not 100% tested.
3. Speed obtained with High Speed AC measurement conditions.

Symbol

Parameter

Test Condition

Min

Max

Unit

Input Leakage Current

±10

Output Leakage Current

OUT

±10

Supply Current

E = V

, GV

= V

OUT

= 0mA, f = 5MHz

CC1

Supply Current (Standby) TTL

E = V

CC2

Supply Current (Standby) CMOS

E > V

0.2V

100

Program Current

= V

Input Low Voltage

0.3

0.8

(2)

Input High Voltage

+ 1

Output Low Voltage

= 2.1mA

0.4

Output High Voltage TTL

= 1mA

3.6

Output High Voltage CMOS

= 100

0.7

Symbol

Alt

Parameter

Test

Condition

M27C801

Unit

-45

(3)

-60

-70

Min

Max

Min

Max

Min

Max

AVQV

ACC

Address Valid to Output Valid

E = V

= V

ELQV

Chip Enable Low to Output Valid

= V

GLQV

Output Enable Low to Output Valid

E = V

EHQZ

(2)

Chip Enable High to Output Hi-Z

= V

GHQZ

(2)

Output Enable High to Output Hi-Z

E = V

AXQX

Address Transition to Output
Transition

E = V

= V

Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, the product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention

will not occur.

For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.

M27C801

6/16

Figure 5. Read Mode AC Waveforms

AI01583B

tAXQX

tEHQZ

A0-A19

Q0-Q7

tAVQV

tGHQZ

tGLQV

tELQV

VALID

Hi-Z

VALID

Table 8B. Read Mode AC Characteristics

(1)

= 0 to 70 °C or 40 to 85 °C; V

= 5V ± 10%)

Note: 1. V

must be applied simultaneously with or before V

and removed simultaneously or after V

2. Sampled only, not 100% tested.

Symbol

Alt

Parameter

Test Condition

M27C801

Unit

-80

-100/-120/-150

Min

Max

Min

Max

AVQV

ACC

Address Valid to Output Valid

E = V

, GV

= V

100

ELQV

Chip Enable Low to Output Valid

= V

100

GLQV

Output Enable Low to Output
Valid

E = V

EHQZ

(2)

Chip Enable High to Output Hi-Z

= V

GHQZ

(2)

Output Enable High to Output
Hi-Z

E = V

AXQX

Address Transition to Output
Transition

E = V

, GV

= V

System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, I

, has three seg-

ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
capacitive and inductive loading of the device at
the output. The associated transient voltage peaks
can be suppressed by complying with the two line

output control and by properly selected decoupling
capacitors. It is recommended that a 0.1µF ceram-
ic capacitor be used on every device between V

and V

. This should be a high frequency capaci-

tor of low inherent inductance and should be
placed as close to the device as possible. In addi-
tion, a 4.7µF bulk electrolytic capacitor should be
used between V

and V

for every eight devic-

es. The bulk capacitor should be located near the
power supply connection point. The purpose of the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.

7/16

M27C801

Table 9. Programming Mode DC Characteristics

(1)

= 25 °C; V

= 6.25V ± 0.25V; V

= 12.75V ± 0.25V)

Note: 1. V

must be applied simultaneously with or before V

and removed simultaneously or after V

Table 10. MARGIN MODE AC Characteristics

(1)

= 25 °C; V

= 6.25V ± 0.25V; V

= 12.75V ± 0.25V)

Note: 1. V

must be applied simultaneously with or before V

and removed simultaneously or after V

Symbol

Parameter

Test Condition

Min

Max

Unit

Input Leakage Current

±10

Supply Current

Program Current

E = V

Input Low Voltage

0.3

0.8

Input High Voltage

+ 0.5

Output Low Voltage

= 2.1mA

0.4

Output High Voltage TTL

= 1mA

3.6

A9 Voltage

11.5

12.5

Symbol

Alt

Parameter

Test Condition

Min

Max

Unit

A9HVPH

AS9

High to V

High

µs

VPHEL

VPS

High to Chip Enable Low

µs

A10HEH

AS10

A10

High to Chip Enable High (Set)

µs

A10LEH

AS10

A10

Low to Chip Enable High (Reset)

µs

EXA10X

AH10

Chip Enable Transition to V

A10

Transition

µs

EXVPX

VPH

Chip Enable Transition to V

Transition

µs

VPXA9X

AH9

Transition to V

Transition

µs

Programming
When delivered (and after each erasure for UV
EPROM), all bits of the M27C801 are in the '1'
state. Data is introduced by selectively program-
ming '0's into the desired bit locations. Although
only '0' will be programmed, both '1's and '0's can
be present in the data word. The only way to
change a '0' to a '1' is by die exposure to ultraviolet

light (UV EPROM). The M27C801 is in the pro-
gramming mode when V

input is at 12.75V and

E is pulsed to V

. The data to be programmed is

applied to 8 bits in parallel to the data output pins.
The levels required for the address and data in-
puts are TTL. V

is specified to be 6.25V ±

0.25V.

M27C801

8/16

Figure 6. MARGIN MODE AC Waveforms

Note: A8 High level = 5V; A9 High level = 12V.

AI00736B

tA9HVPH

tVPXA9X

GVPP

A10 Set

VCC

tVPHEL

tA10LEH

tEXVPX

tA10HEH

A10 Reset

tEXA10X

Table 11. Programming Mode DC Characteristics

(1)

= 25 °C; V

= 6.25V ± 0.25V; V

= 12.75V ± 0.25V)

Note: 1. V

must be applied simultaneously with or before V

and removed simultaneously or after V

2. Sampled only, not 100% tested.

Symbol

Alt

Parameter

Test Condition

Min

Max

Unit

AVEL

Address Valid to Chip Enable Low

µs

QVEL

Input Valid to Chip Enable Low

µs

VCHEL

VCS

High to Chip Enable Low

µs

VPHEL

OES

High to Chip Enable Low

µs

VPLVPH

PRT

Rise Time

ELEH

Chip Enable Program Pulse Width (Initial)

µs

EHQX

Chip Enable High to Input Transition

µs

EHVPX

OEH

Chip Enable High to V

Transition

µs

VPLEL

Low to Chip Enable Low

µs

ELQV

Chip Enable Low to Output Valid

µs

EHQZ

(2)

DFP

Chip Enable High to Output Hi-Z

130

EHAX

Chip Enable High to Address Transition

9/16

M27C801

PRESTO IIB Programming Algorithm

PRESTO IIB Programming Algorithm allows the
whole array to be programmed with a guaranteed
margin, in a typical time of 52.5 seconds. This can
be achieved with STMicroelectronics M27C801
due to several design innovations to improve pro-
gramming efficiency and to provide adequate mar-
gin for reliability. Before starting the programming
the internal MARGIN MODE circuit is set in order
to guarantee that each cell is programmed with
enough margin. Then a sequence of 50µs pro-
gram pulses are applied to each byte until a cor-
rect verify occurs. No overprogram pulses are
applied since the verify in MARGIN MODE pro-
vides the necessary margin.
Program Inhibit
Programming of multiple M27C801s in parallel
with different data is also easily accomplished. Ex-
cept for E, all like inputs including GV

of the par-

allel M27C801 may be common. A TTL low level
pulse applied to a M27C801's E input, with V

12.75V, will program that M27C801. A high level E
input inhibits the other M27C801s from being pro-
grammed.
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determine that they were correct-
ly programmed. The verify is accomplished with G
at V

. Data should be verified with t

ELQV

after the

falling edge of E.

Figure 8. Programming Flowchart

AI01271B

n = 0

Last

Addr

VERIFY

E = 50

s Pulse

++n

= 25

++ Addr

VCC = 6.25V, VPP = 12.75V

FAIL

CHECK ALL BYTES

1st: VCC = 6V

2nd: VCC = 4.2V

YES

SET MARGIN MODE

RESET MARGIN MODE

Figure 7. Programming and Verify Modes AC Waveforms

tAVEL

VALID

AI01270

A0-A19

Q0-Q7

VCC

DATA IN

DATA OUT

tQVEL

tVCHEL

tVPHEL

tEHQX

tEHVPX

tELQV

tELEH

tEHQZ

tVPLEL

PROGRAM

VERIFY

GVPP

tEHAX

M27C801

10/16

Electronic Signature
The Electronic Signature (ES) mode allows the
reading out of a binary code from an EPROM that
will identify its manufacturer and type. This mode
is intended for use by programming equipment to
automatically match the device to be programmed
with its corresponding programming algorithm.
The ES mode is functional in the 25°C ± 5°C am-
bient temperature range that is required when pro-
gramming the M27C801. To activate the ES
mode, the programming equipment must force
11.5V to 12.5V on address line A9 of the
M27C801. Two identifier bytes may then be se-
quenced from the device outputs by toggling ad-
dress line A0 from V

to V

. All other address

lines must be held at V

during Electronic Signa-

ture mode. Byte 0 (A0 = V

) represents the man-

ufacturer code and byte 1 (A0 = V

) the device

identifier code. For the STMicroelectronics
M27C801, these two identifier bytes are given in
Table 4 and can be read-out on outputs Q7 to Q0.

ERASURE OPERATION (applies to UV EPROM)
The erasure characteristics of the M27C801 is
such that erasure begins when the cells are ex-
posed to light with wavelengths shorter than ap-
proximately 4000 Å. It should be noted that
sunlight and some type of fluorescent lamps have
wavelengths in the 3000-4000 Å range.
Research shows that constant exposure to room
level fluorescent lighting could erase a typical
M27C801 in about 3 years, while it would take ap-
proximately 1 week to cause erasure when ex-
posed to direct sunlight. If the M27C801 is to be
exposed to these types of lighting conditions for
extended periods of time, it is suggested that
opaque labels be put over the M27C801 window to
prevent unintentional erasure. The recommended
erasure procedure for the M27C801 is exposure to
short wave ultraviolet light which has wavelength
2537 Å. The integrated dose (i.e. UV intensity x
exposure time) for erasure should be a minimum
of 30 W-sec/cm

. The erasure time with this dos-

age is approximately 30 to 40 minutes using an ul-
traviolet lamp with 12000 µW/cm

power rating.

The M27C801 should be placed within 2.5 cm (1
inch) of the lamp tubes during the erasure. Some
lamps have a filter on their tubes which should be
removed before erasure.

11/16

M27C801

Table 12. Ordering Information Scheme

Note: 1. High Speed, see AC Characteristics section for further information.

For a list of available options (Speed, Package, etc...) or for further information on any aspect of this de-
vice, please contact the STMicroelectronics Sales Office nearest to you.

Example:

M27C801

-45

Device Type
M27

Supply Voltage

C = 5V ±10%

Device Function
801 = 8Mbit (1Mb x8)

Speed

-45

(1)

= 45 ns

-60 = 60 ns
-70 = 70 ns

-80 = 80 ns
-100 = 100 ns

-120 = 120 ns
-150 = 150 ns

Package

F = FDIP32W
B = PDIP32

K = PLCC32
N = TSOP32: 8 x 20 mm

Temperature Range

1 = 0 to 70 °C
6 = 40 to 85 °C

Options
X = Additional Burn-in

TR = Tape & Reel Packing

Table 1. Revision History

Date

Revision Details

September 1998

First Issue

03/21/00

FDIP32W Package changed

09/25/00

AN620 Reference removed

M27C801

12/16

Table 13. FDIP32W - 32 pin Ceramic Frit-seal DIP with window, Package Mechanical Data

Symbol

millimeters

inches

Typ

Min

Max

Typ

Min

Max

5.72

0.225

0.51

1.40

0.020

0.055

3.91

4.57

0.154

0.180

3.89

4.50

0.153

0.177

0.41

0.56

0.016

0.022

1.45

0.057

0.23

0.30

0.009

0.012

41.73

42.04

1.643

1.655

38.10

1.500

15.24

0.600

13.06

13.36

0.514

0.526

2.54

0.100

14.99

0.590

16.18

18.03

0.637

0.710

3.18

0.125

1.52

2.49

0.060

0.098

7.11

0.280

4°

11°

4°

11°

Figure 9. FDIP32W - 32 pin Ceramic Frit-seal DIP with window, Package Outline

Drawing is not to scale.

FDIPW-a

13/16

M27C801

Figure 10. PDIP32 - 32 pin Plastic DIP, 600 mils width, Package Outline

Drawing is not to scale.

PDIP

Table 14. PDIP32 - 32 pin Plastic DIP, 600 mils width, Package Mechanical Data

Symbol

millimeters

inches

Typ

Min

Max

Typ

Min

Max

5.08

0.200

0.38

0.015

3.56

4.06

0.140

0.160

0.38

0.51

0.015

0.020

1.52

0.060

0.20

0.30

0.008

0.012

41.78

42.04

1.645

1.655

38.10

1.500

15.24

0.600

13.59

13.84

0.535

0.545

2.54

0.100

15.24

0.600

15.24

17.78

0.600

0.700

3.18

3.43

0.125

0.135

1.78

2.03

0.070

0.080

0°

10°

0°

10°

M27C801

14/16

Table 15. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Mechanical Data

Symbol

millimeters

inches

Typ

Min

Max

Typ

Min

Max

2.54

3.56

0.100

0.140

1.52

2.41

0.060

0.095

0.38

0.015

0.33

0.53

0.013

0.021

0.66

0.81

0.026

0.032

12.32

12.57

0.485

0.495

11.35

11.56

0.447

0.455

9.91

10.92

0.390

0.430

1.27

0.050

14.86

15.11

0.585

0.595

13.89

14.10

0.547

0.555

12.45

13.46

0.490

0.530

0.00

0.25

0.000

0.010

0.89

0.035

0.10

0.004

Figure 11. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Outline

Drawing is not to scale.

PLCC

E1 E

1 N

D2/E2

0.51 (.020)

1.14 (.045)

15/16

M27C801

Table 16. TSOP32 - 32 lead Plastic Thin Small Outline, 8 x 20 mm, Package Mechanical Data

Symbol

millimeters

inches

Typ

Min

Max

Typ

Min

Max

1.20

0.047

0.05

0.17

0.002

0.006

0.95

1.05

0.037

0.041

0.15

0.27

0.006

0.011

0.10

0.21

0.004

0.008

19.80

20.20

0.780

0.795

18.30

18.50

0.720

0.728

7.90

8.10

0.311

0.319

0.50

0.020

0.50

0.70

0.020

0.028

0°

5°

0°

5°

0.10

0.004

Figure 12. TSOP32 - 32 lead Plastic Thin Small Outline, 8 x 20 mm, Package Outline

Drawing is not to scale.

TSOP-a

N/2

DIE

M27C801

16/16

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

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