74VHC541
OCTAL BUS BUFFER
WITH 3 STATE OUTPUTS (NON INVERTED)
June 1999
s
HIGH SPEED: t
PD
= 3.6 ns (TYP.) at V
CC
= 5V
s
LOW POWER DISSIPATION:
I
CC
= 4
A (MAX.) at T
A
= 25
o
C
s
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28% V
CC
(MIN.)
s
POWER DOWN PROTECTION ON INPUTS
s
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8 mA (MIN)
s
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
s
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 541
s
IMPROVED LATCH-UP IMMUNITY
s
LOW NOISE: V
OLP
= 0.9V (Max.)
DESCRIPTION
The VHC541 is an advanced high speed CMOS
OCTAL BUS BUFFER (3-STATE) fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
The 3 STATE control gate operates as a two
input AND such that if either G1 and G2 are high,
all eight outputs are in the high impedance state.
In order to enhance PC board layout, the AC541
offers a pinout having inputs and outputs on
opposite sides of the package.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs
and
outputs are
equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES :
74VHC541M
74VHC541T
M
(Micro Package)
T
(TSSOP Package)
1/8
TRUTH TABLE
INPUT
O UT PUT
G 1
G 2
An
Yn
H
X
X
Z
X
H
X
Z
L
L
H
H
L
L
L
L
X:"H" or "L"
Z: High impedance
PIN DESCRIPTION
PIN No
SYMBOL
NAME AND FUNCT ION
1,19
G1, G2
Output Enable Input
2, 3, 4,5,
6, 7,8, 9
A1 to A8
Data Inputs
18, 17, 16,
15, 14, 13,
12, 11
Y1 to Y8
Data Outputs
10
GND
Ground (0V)
20
V
CC
Positive Supply Voltage
INPUT EQUIVALENT CIRCUIT
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Val ue
Unit
V
CC
Supply Voltage
-0.5 to +7.0
V
V
I
DC Input Voltage
-0.5 to +7.0
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
- 20
mA
I
OK
DC Output Diode Current
20
mA
I
O
DC Output Current
25
mA
I
CC
orI
GND
DC V
CC
or Ground Current
75
mA
T
stg
Storage Temperature
-65 to +150
o
C
T
L
Lead Temperature (10 sec)
300
o
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Valu e
Uni t
V
CC
Supply Voltage
2.0 to 5.5
V
V
I
Input Voltage
0 to 5.5
V
V
O
Output Voltage
0 to V
CC
V
T
op
Operating Temperature
-40 to +85
o
C
dt/dv
Input Rise and Fall Time (see note 1) (V
CC
= 3.3
0.3V)
(V
CC
= 5.0
0.5V)
0 to 100
0 to 20
ns/V
ns/V
1) V
IN
from 30% to70%of V
CC
74VHC541
2/8
AC ELECTRICAL CHARACTERISTICS (Input t
r
= t
f
=3 ns)
Symb ol
Parameter
Test Co nditi on
Val ue
Un it
V
CC
(V)
C
L
(pF )
T
A
= 25
o
C
-40 to 85
o
C
Min.
Typ .
Max.
Min .
Max.
t
PLH
t
PHL
Propagation Delay
Time
3.3
(*)
15
5.0
7.0
1.0
8.5
ns
3.3
(*)
50
7.5
10.5
1.0
12.0
5.0
(**)
15
3.5
5.0
1.0
6.0
5.0
(**)
50
5.0
7.0
1.0
8.0
t
PZL
t
PZH
Output Enable Time
3.3
(*)
15
R
L
= 1K
6.8
10.5
1.0
12.5
ns
3.3
(*)
50
R
L
= 1K
9.3
14.0
1.0
16.0
5.0
(**)
15
R
L
= 1K
4.7
7.2
1.0
8.5
5.0
(**)
50
R
L
= 1K
6.2
9.2
1.0
10.5
t
PLZ
t
PHZ
Output Disable Time
3.3
(*)
50
R
L
= 1K
11.2
15.4
1.0
17.5
ns
5.0
(**)
50
R
L
= 1K
6.0
8.8
1.0
10.0
t
OSLH
t
OSHL
Output to Output Skew
Time (note 1)
3.3
(*)
50
1.5
1.5
ns
5.0
(**)
50
1.0
1.0
(*) Voltage range is 3.3V
0.3V
(**) Voltage range is 5V
0.5V
Note 1: Parameter guaranteed by design. t
soLH
= |t
pLHm
- t
pLHn
|, t
soHL
= |t
pHLm
- t
pHLn
|
DC SPECIFICATIONS
Symb ol
Parameter
T est Cond ition s
Val ue
Un it
V
CC
(V)
T
A
= 25
o
C
-40 to 85
o
C
Min.
Typ .
Max.
Min .
Max.
V
IH
High Level Input
Voltage
2.0
1.5
1.5
V
3.0 to 5.5
0.7V
CC
0.7V
CC
V
IL
Low Level Input
Voltage
2.0
0.5
0.5
V
3.0 to 5.5
0.3V
CC
0.3V
CC
V
OH
High Level Output
Voltage
2.0
I
O
=-50
A
1.9
2.0
1.9
V
3.0
I
O
=-50
A
2.9
3.0
2.9
4.5
I
O
=-50
A
4.4
4.5
4.4
3.0
I
O
=-4 mA
2.58
2.48
4.5
I
O
=-8 mA
3.94
3.8
V
OL
Low Level Output
Voltage
2.0
I
O
=50
A
0.0
0.1
0.1
V
3.0
I
O
=50
A
0.0
0.1
0.1
4.5
I
O
=50
A
0.0
0.1
0.1
3.0
I
O
=4 mA
0.36
0.44
4.5
I
O
=8 mA
0.36
0.44
I
OZ
High Impedance
Output Leakage
Current
5.5
V
I
= V
IH
orV
IL
V
O
= V
CC
orGND
0.25
2.5
A
I
I
Input Leakage Current
0 to 5.5
V
I
= 5.5V or GND
0.1
1.0
A
I
CC
Quiescent Supply
Current
5.5
V
I
= V
CC
orGND
4
40
A
74VHC541
3/8
CAPACITIVE CHARACTERISTICS
Symb ol
Parameter
T est Cond ition s
Val ue
Un it
T
A
= 25
o
C
-40 to 85
o
C
Min.
Typ .
Max.
Min .
Max.
C
IN
Input Capacitance
4
10
10
pF
C
OUT
Output Capacitance
6
pF
C
PD
Power Dissipation
Capacitance (note 1)
18
pF
1) C
PD
isdefined as the value of the IC'sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto
Test Circuit).Average operating current can be obtained by the following equation. I
CC
(opr) = C
PD
V
CC
f
IN
+ I
CC
/8 (per Circuit)
TEST CIRCUIT
T EST
SW IT CH
t
PLH
, t
PHL
Open
t
PZL
, t
PLZ
V
CC
t
PZH
, t
PHZ
GND
C
L
= 15/50 pF or equivalent (includes jig and probe capacitance)
R
L
= R
1
= 1K
orequivalent
R
T
= Z
OUT
of pulse generator (typically 50
)
DYNAMIC SWITCHING CHARACTERISTICS
Symb ol
Parameter
T est Cond ition s
Val ue
Un it
V
CC
(V)
T
A
= 25
o
C
-40 to 85
o
C
Min.
Typ .
Max.
Min .
Max.
V
OLP
Dynamic Low Voltage
Quiet Output (note 1, 2)
5.0
C
L
= 50 pF
0.6
0.9
V
V
OLV
-0.9
-0.6
V
IHD
Dynamic High Voltage
Input (note 1, 3)
5.0
3.5
V
ILD
Dynamic Low Voltage
Input (note 1, 3)
5.0
1.5
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n -1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to5.0V. Inputs under test switching: 5.0V to threshold (V
ILD
), 0V to threshold (V
IHD
), f=1MHz.
74VHC541
4/8
WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)
74VHC541
5/8
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