TARGET SPECIFICATION
ADE3700
Analog LCD Display Engine for XGA and SXGA Resolutions
This is preliminary information on a new product forseen to be developed. Details are subject to change without notice.
October 2003
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Feature Overview
s
Programmable Context SensitiveTM Scaling
s
High-quality Up-scaling and Down-scaling
s
Integrated 9-bit ADC/PLL
s
IQSyncTM AutoSetup
s
Integrated programmable Timing Controller
s
Integrated Pattern Generator
s
Perfect PictureTM Technology
s
sRGB 3D Color Warp
s
Integrated OSD
s
Advanced EMI reduction features
s
Framelock operation with Safety ModeTM
s
Serial IC interface
s
Low power 0.18 m process technology
General Description
ADE3700 devices are a family of highly-integrated
display engine ICs, enabling the most advanced,
flexible, and cost-effective system-on-chip solutions
for analog-only input LCD display applications.
The ADE3700 covers the full range of XGA and
SXGA analog-only applications including Smart
Panel designs.
The ADE3700 family is pin-to-pin compatible and
comes in a low-cost, 128-pin LQFP package.
ADE3700 devices use the same software platform
and are backward-compatible with the previous
generation of ADE3xxx Scaling Engines.
LCD Scaler Product Selector
Product
Package
Output Format Support
Input Interface Support
Resolution
TCON
Analog
DVI
YUV
ADE3700X
128 LQFP
Up to XGA 75 Hz
Yes
ADE3700XT
128 LQFP
Up to XGA 75 Hz
Yes
Yes
ADE3700SX
128 LQFP
Up to SXGA 75 Hz
Yes
Line-Lock
PLL
Fast and accurate
Phase
Position
Level
Clock
sRGB 3D Color Warp
Temporal & Spatial
Dithering
Interlace
Analog
Video
3
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LCD
Panel
Microcontroller
Firmware ROM
On-Screen
Display Engine
Pattern
Generator
Programmable Timing Controller (TCON)
RSDS
LV
C
M
O
S
EMI Reduction
Per Pin Delay
Slew Rate Control
Spread Spectrum
Data Inversion
ADE 3700
IC
adjustments of:
IQ Scaling
TM
RGB
Signals
Triple
9-bit
ADC
To TFT
P
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Engine with
Context Sensitive
TM
Filtering
Mode
Detection
ADE3700
2/89
Third Generation Context SensitiveTM Scaler
q
Sharper text with Edge Enhancement
q
RAM based coefficients for unique
customization
q
5:1 Upscale and 2:1 Downscale
q
Independent X - Y axis zoom and shrink
Analog RGB input
q
140 MHz 9-bit ADC
q
Ultra low jitter digital Line Lock PLL
q
Composite Sync and Sync on Green support
IQsyncTM AutoSetup
q
AutoSetup configures phase, clock, level, and
position
q
Supports continuous calibration for reduced
user intervention
q
Automatically detects activity on input
q
Compatible with all standard VESA and GTF
modes
Perfect PictureTM Technology
q
Programmable 3D Color Warp
q
Digital brightness, contrast, hue, and
saturation gamma controls for all inputs
q
Simple white point control
q
Compatible with sRGB standard
q
Video & Picture windowing
q
Supports up to 7 different windows
q
Independent window controls for contrast
brightness, saturation, hue and gamma
Perfect ColorTM Technology
q
True color dithering for 12- and 18-bit panels
q
Temporal and spatial dithering
q
30-bit programmable gamma table
OSD Engine
q
256 RAM based 12x18 characters
q
1- and 4-bit per pixel color characters
q
Bordering, shadowing, transparency, fade-in,
and fade-out effects
q
Supports font rotation
q
Up to 4 sub windows
q
32-entry TrueColor LUT
Programmable Timing Controller (TCON)
q
Highly programmable support for XGA
SmartPanels
q
Dual-function LVCMOS and RSDS outputs
q
Supports 18-, 24-, 36-, and 48-bit RSDS
outputs
q
Advanced Flicker Detection and Reduction
q
12 programmable timing signals for row/
column control
q
Wide range of drivers & TCON compatibility
q
Simulation tools for easy programming
q
Supports complex polarity generation for IPS
panels
Advanced EMI Reduction Features
q
Flexible data inversion / transition
minimization, single, dual, and separate
q
Per pin delay, 0 to 6ns in 0.4ns increments
q
Adaptive Slew Rate control outputs
q
Differential clock
q
Spread spectrum -programmable digital FM
modulation of the output clock with no
external components
Output Format
q
Supports resolutions up to SXGA @ 75Hz
q
Supports 6- or 8-bit Panels
q
Supports double or single pixel wide formats
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ADE3700
Table of Contents
Chapter 1
General Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
1.1
Pin Descriptions .................................................................................................................. 7
Chapter 2
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
2.1
Global Control .................................................................................................................... 11
2.2
FM Frequency Synthesizer ................................................................................................ 16
2.3
Analog-to-Digital Converter (ADC) ..................................................................................... 17
2.4
Line Lock PLL .................................................................................................................... 18
2.5
Sync Retiming (SRT) ......................................................................................................... 23
2.6
Sync Measurement ............................................................................................................ 25
2.7
Sync Multiplexer (SMUX) ................................................................................................... 32
2.7.1
Functional Description .......................................................................................................................33
2.7.2
Example .............................................................................................................................................34
2.8
Data Multiplexer ................................................................................................................. 37
2.9
Data Measurement (DMEAS) ............................................................................................ 38
2.9.1
Edge Intensity ....................................................................................................................................38
2.9.2
Pixel Sum ...........................................................................................................................................38
2.9.3
Minimum/Maximum Pixel ...................................................................................................................38
2.9.4
Pixel Cumulative Distribution (PCD) ..................................................................................................39
2.9.5
Horizontal Position .............................................................................................................................39
2.9.6
Vertical Position .................................................................................................................................39
2.9.7
DE Size ..............................................................................................................................................40
2.10
LCD Scaler ......................................................................................................................... 42
2.11
Output Sequencer .............................................................................................................. 45
2.11.1
Frame Synchronization ......................................................................................................................45
2.11.2
Timing Unit .........................................................................................................................................45
2.11.3
Signal Generation ..............................................................................................................................45
2.12
Timing Controller (TCON) .................................................................................................. 48
2.13
Pattern Generator .............................................................................................................. 54
2.13.1
Screen Split .......................................................................................................................................54
2.13.2
Pattern Engine ...................................................................................................................................55
2.13.3
Borders ..............................................................................................................................................55
2.14
sRGB .................................................................................................................................. 60
2.14.1
Parametric Gamma, Digital Contrast / Brightness on Multiple Windows ...........................................60
2.14.2
Color Space Warp ..............................................................................................................................60
2.15
On-Screen Display (OSD) .................................................................................................. 62
2.15.1
OSD Access via I2C ..........................................................................................................................62
2.16
Flicker ................................................................................................................................. 68
ADE3700
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2.17
Gamma ...............................................................................................................................70
2.18
APC ....................................................................................................................................71
2.19
Output Multiplexer ..............................................................................................................72
2.19.1
Sub Block Function ........................................................................................................................... 73
2.19.2
RSDS ................................................................................................................................................ 76
2.19.3
Per Pin Delay .................................................................................................................................... 77
2.20
Pulse Width Modulation (PWM) ..........................................................................................80
2.21
DFT Block ...........................................................................................................................81
2.22
IC RAM Addresses ...........................................................................................................83
Chapter 3
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
3.1
Absolute Maximum Ratings ................................................................................................84
3.2
Power Consumption Matrices .............................................................................................84
3.3
Nominal Operating Conditions ............................................................................................85
3.4
Preliminary Thermal Data ...................................................................................................85
3.5
Preliminary DC Specifications ............................................................................................85
3.5.1
LVTTL 5 Volt Tolerant Inputs With Hysteresis ................................................................................... 85
3.5.2
LVTTL 5 Volt Tolerant Inputs ............................................................................................................. 85
3.5.3
LVTTL 5 Volt Tolerant I/O With Hysteresis ........................................................................................ 86
3.5.4
LVTTL Outputs .................................................................................................................................. 86
3.6
Preliminary AC Specifications ...........................................................................................86
Chapter 4
Package Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Chapter 5
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
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ADE3700
1
General Information
The ADE3700 family of devices is capable of implementing all of the advanced features of today's
LCD monitor products. For maximum flexibility, an external microcontroller (MCU) is used for
controlling the ADE3700 and other monitor functions.
The ADE3700 architecture unburdens the MCU from all data-intensive pixel manipulations,
providing an optimal blend of features and code customizing without incurring the cost of a 16-bit
processor or memory. The key interactions between the monitor MCU and the ADE3700 can be
broken down into the features shown in the table below.
Figure 1: ADE3700 Block Diagram
Table 1: ADE3700 Features (Sheet 1 of 2)
Feature
Description of ADE3700 Operation
Blocks Used
Pages
Power-up /
Initialize
When power is first applied, the ADE3700 is asynchronously reset from a pin.
The MCU typically programs the ADE3700 with a number of default values
and sets up the ADE3700 to identify activity on any of the input pins. All pre-
configured values and RAMs, such as DVI settings, line-lock PLL settings,
OSD characters, LCD timing values (output sequencer), scale kernels,
gamma curves, sRGB color warp, APC dithering, output pin configuration
(OMUX), etc. can be pre-loaded into the ADE3700. The typical end state is
that the ADE3700 is initialized into a low power mode, ready to turn active
once the power button is pressed.
GLBL
SMEAS
LLK
ADC
OSD
SCALER
GAMMA
SRGB
OUTSEQ
TCON
APC
OMUX
11
25
18
17
62
42
70
60
45
48
71
72
Activity Detect
When the monitor has been powered on, the inputs can be monitored for
active video sources. Based on the activity monitors, the MCU chooses an
input or power down state.
SMEAS
25
LCD
Timing Controller
FM
Freq. Synthesizer
LLKPLL
INCLK
SCLK
DOTCLK
Color
Management
OSD
GAMMA
LUT
DATA
CTRL
Analog
DMEAS
SMEAS
Out
put
F
o
rm
at
Pattern
Generator
SCLK
Frequency
Synthesizer
Scaler
Port
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