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Электронный компонент: EMIF01-10005W5

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EMIF01-10005W5
May 1999 - Ed: 1
IEC 1000-4-2
15kV
(air discharge)
8 kV
(contact discharge)
COMPLIES WITH THE FOLLOWING STANDARD:
SOT323-5L
FUNCTIONAL DIAGRAM
I1
GND
I2
O1
O2
R
= 100
C
= 50pF
I/O
IN
Cost-effectiveness compared to discrete solution
EMI bi-directional low-pass filter
High efficiency in ESD suppression.
High flexibility in the design of high density boards
Very low PCB space consuming : 4.2 mm
2
typically
High reliability offered by monolithic integration
BENEFITS
EMI FILTER
INCLUDING ESD PROTECTION
Application Specific Discretes
A.S.D.
TM
Where EMI filtering in ESD sensitive equipment is required :
Computers and printers
Communication systems
Mobile phones
MCU Boards
MAIN APPLICATIONS
The EMIF01-10005W5 is a highly integrated array
designed to suppress EMI / RFI noise in all systems
subjected to electromagnetic interferences.
Additionally, this filter includes an ESD protection circuitry
which prevents the protected device from destruction when
subjected to ESD surges up to 15 kV.
DESCRIPTION
TM : ASD is trademark of STMicroelectronics.
ESD response to IEC1000-4-2 (16 kV air discharge)
Filtering response
1
10
100
1000 2000
-30
-20
-10
0
f(MHz)
dB
1/10
Symbol
Parameter and test conditions
Value
Unit
V
PP
ESD discharge IEC1000-4-2, air discharge
ESD discharge IEC1000-4-2, contact discharge
16
9
kV
T
j
Junction temperature
150
C
T
op
Operating temperature range
-40 to + 85
C
T
stg
Storage temperature range
-55 to +150
C
T
L
Lead solder temperature (10 second duration)
260
C
ABSOLUTE MAXIMUM RATINGS (T
amb
= 25 C)
Symbol
Test conditions
Min.
Typ.
Max.
Unit
V
BR
I
R
= 1 mA
6
7
8
V
I
RM
V
RM
= 3V
1
A
R
I/O
80
100
120
R
d
I
pp
= 10 A, t
p
= 2.5
s (see note 1)
1
C
IN
at 0V bias
50
pF
Note 1 : to calculate the ESD residual voltage, please refer to the paragraph "ESD PROTECTION" on pages 4 & 5
Symbol
Parameter
V
BR
Breakdown voltage
I
RM
Leakage current @ V
RM
V
RM
Stand-off voltage
V
CL
Clamping voltage
Rd
Dynamic impedance
I
PP
Peak pulse current
R
I/O
Series resistance between Input
and Output
C
IN
Input capacitance per line
ELECTRICAL CHARACTERISTICS (T
amb
= 25 C)
V
I
V
RM
PP
I
RM
I
V
BR
R
I
V
CL
slope : 1 / R
d
EMIF01-10005W5
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TECHNICAL INFORMATION
FREQUENCY BEHAVIOR
The EMIF01-10005W5 is firstly designed as an EMI/RFI filter. This low-pass filter is characterized by the following
parameters:
- Cut-off frequency
- Insertion loss
- High frequency rejection
Figure A1 gives these parameters, in particular the signal rejection at the GSM frequency is about -24dB at 900MHz,
1
10
100
1000 2000
-30
-20
-10
0
f(MHz)
dB
Fig A1: EMIF01-10005W5 frequency response curve.
Fig A2: Measurement conditions
TRACKING GENERATOR
Vg
50
TG OUT
SPECTRUM ANALYSER
50
RF IN
SMA
SMA
TEST BOARD
EMIF0
1
EMIF01-10005W5
3/10
ESD PROTECTION
In addition to its filtering function, the EMIF01-10005W5 is particularly optimized to perform ESD protection.
ESD protection is based on the use of device which clamps at :
V
CL
= V
BR
+ R
d
.I
PP
This protection function is splitted in 2 stages. As shown in figure A3, the ESD strikes are clamped by the first stage S1 and
then its remaining overvoltage is applied to the second stage through the resistor R. Such a configuration makes the output
voltage very low at the Vout level.
To have a good approximation of the remaining voltages at both Vin and Vout stages, we provide the typical dynamical
resistance value Rd. By taking into account these following hypothesis : R>>Rd, R
G
>>Rd and Rload>>Rd, it gives these
formulas:
Vin
=
Rg.Vbr
+
Rd.Vg
Rg
Vout
=
R.Vbr
+
Rd.Vin
R
The results of the calculation done for V
G
=8kV, R
G
=330
(IEC1000-4-2 standard) and V
BR
=7V (typ.) give:
Vin = 31.2 V
Vout = 7.3 V
This confirms the very low remaining voltage across the device to be protected. It is also important to note that in this
approximation the parasitic inductance effect was not taken into account. This could be few tenths of volts during few ns at
the Vin side. This parasitic effect is not present at the Vout side due the low current involved after the resistance R.
Fig A3 : ESD clamping behavior
ESD
Surge
Vin
Vout
Rload
S1
S2
Rg
R
Rd
Rd
Vbr
Vbr
Vg
Device to be protected
EMIF01-10005W5
Fig A4 : Measurement conditions
TEST BOARD
ESD
SURGE
EMIF01
16kV
Air
Discharge
Vin
Vout
EMIF01-10005W5
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Please note that the EMIF01-10005W5 is not only acting
for positive ESD surges but also for negative ones. For
these kind of disturbances it clamps close to ground
voltage as shown in Fig. A5b.
NOTE: DYNAMIC RESISTANCE MEASUREMENT
As the value of the dynamic resistance remains stable for
a surge duration lower than 20
s, the 2.5
s rectangular
surge is well adapted. In addition both rise and fall times
are optimized to avoid any parasitic phenomenon during
the measurement of Rd.
Fig A5 : Remaining voltage at both stages S1 (Vin) and S2 (Vout) during ESD surge
a) Positive surge
b) Negative surge
Fig A6 : Rd measurement current wave
2.5 s
2 s
t
t
I
I
PP
2.5s duration measurement wave
The measurements shown here after illustrate very clearly (Fig. A5a) the high efficiency of the ESD protection :
- no influence of the parasitic inductances on Vout stage
- Vout clamping voltage very close to V
BR
EMIF01-10005W5
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Fig A7 : Crosstalk phenomena
line 1
line 2
V
G1
V
G2
R
G1
R
G2
R
L1
R
L2
DRIVERS
RECEIVERS
V
G1
V
G2
V
G2
V
G1
CROSSTALK BEHAVIOR
1- Crosstalk phenomena
2- Digital Crosstalk
Figure A8 shows the measurement circuit used to quantify the crosstalk effect in a classical digital application.
Figure A9 shows that in such a condition signal from 0 to 5V and rise time of 3 ns, the impact on the disturbed line is less
than 100mV peak to peak. No data disturbance was noted on the concerned line. The same results were obtained with
falling edges.
Fig A8 : Digital crosstalk measurement
Line 1
Line 2
V
G1
21
V
G1
+5V
+5V
74HC04
74HC04
+5V
Square
Pulse
Generator
5KHz
Fig A9 : Digital crosstalk results
EMIF01-10005W5
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3- Analog Crosstalk
Fig A10 : Analog crosstalk measurement
TRACKING GENERATOR
Vg
50
TG OUT
SPECTRUM ANALYSER
50
RF IN
SMA
SMA
TEST BOARD
EMIF0
1
Fig A11 : Typical analog crosstalk result
1
10
100
1,000
-100
-80
-60
-40
-20
0
F(MHz)
dB
Figure A10 gives the measurement circuit for the analog
application. In figure A11, the curve shows the effect of cell
I/O1 on cell I/O2. In usual frequency range of analog
signals (up to 100MHz) the effect on disturbed line is less
than -43 dB.
EMIF01-10005W5
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4 - PSpice model
Note This model is available for an ambient temperature
of 27C
Fig A12: PSpice model of one EMIF01 cell
Fig. A14: PSpice simulation : IEC 1000-4-2 Contact Discharge response
Dz
Df
Dr
BV
7
1000
1000
Cjo
25p
25p
1p
IBV
100u
100u
100u
IKF
1000
1000
1000
IS
10E-15
1.016E-15
10E-15
ISR
100p
100p
100p
N
1
1.0755
0.6
M
0.3333
0.3333
0.3333
RS
1
1
1m
VJ
0.6
0.6
0.6
TT
50n
50n
1n
Fig A13: PSpice parameters
0
20
40
60
80
100
0
10
20
30
40
50
60
t(ns)
(V)
Vin
Vout
a) Positive surge
0
20
40
60
80
100
-60
-50
-40
-30
-20
-10
0
t(ns)
(V)
Vin
Vout
b) Negative surge
Fig A15: Comparison between PSpice
simulation and measured frequency response
1
10
100
1,000
-30
-20
-10
0
F(MHz)
dB
Measured
PSpice
EMIF01-10005W5
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ORDER CODE
EMIF
01
-
100
05
W5
EMI FILTER
TYPE
Series resistance value
SOT323-5L package
Input capacitance value /10
Order code
Marking
Package
Weight
Base qty
Delivery
mode
EMIF01-10005W5
M12
SOT323-5L
5.4 mg
3000
Tape & reel
EMIF01-10005W5
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PACKAGE MECHANICAL DATA
SOT323-5L
RECOMMENDED FOOTPRINT
0.3mm
1mm
1mm
0.35mm
29mm
E
c
Q1
H
b
D
A2
A
A1
e
e
Mechanical specifications
Lead plating
Tin-lead
Lead plating thickness
5
m min.
25
m max.
Lead material
Sn / Pb
(70% to 90% Sn)
Lead coplanarity
100
m max.
Body material
Molded epoxy
Flammability
UL94V-0
REF.
DIMENSIONS
Millimeters
Inches
Min.
Max.
Min.
Max.
A
0.8
1.1
0.031
0.043
A1
0
0.1
0
0.004
A2
0.8
1
0.031
0.039
b
0.15
0.3
0.006
0.012
c
0.1
0.18
0.004
0.007
D
1.8
2.2
0.071
0.086
E
1.15
1.35
0.045
0.053
e
0.65 Typ.
H
1.8
2.4
0.071
0.094
Q1
0.1
0.4
0.004
0.016
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of
use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by
implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied.
STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written ap-
proval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
1999 STMicroelectronics - Printed in Italy - All rights reserved.
STMicroelectronics GROUP OF COMPANIES
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EMIF01-10005W5
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