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EMIF04-MMC02F1
September 2002 - Ed: 4A
IEC 61000-4-2 Level 4:
15kV
(air discharge)
8 kV
(contact discharge)
on input & output pins.
MIL STD 883E - Method 3015-6 Class 3
COMPLIES WITH THE FOLLOWING STANDARDS :
Flip Chip package
A2
D3
D2
C2
D1
C1
B1
C3
B3
B2
A3
PIN CONFIGURATION
s
4 lines low-pass-filter
s
High efficiency in EMI filtering
s
Very low PCB space consuming: < 3.3 mm
2
s
Very thin package: 0.65 mm
s
High efficiency in ESD suppression
(IEC61000-4-2 level 4)
s
High reliability offered by monolithic integration
s
High reducing of parasitic elements through
integration & wafer level packaging.
BENEFITS
4 LINES EMI FILTER
INCLUDING ESD PROTECTION
IPAD
TM
s
MULTIMEDIACARDTM
MAIN APPLICATION
The EMIF04-MMC02F1 is a highly integrated array
designed to suppress EMI / RFI noise for
MULTIMEDIACARDTM port filtering.
The EMIF04-MMC02F1 flip-chip packaging means
the package size is equal to the die size. That's
why EMIF04-MMC02F1 is a very small device.
Additionally, this filter includes an ESD protection
circuitry which prevents the protected device from
destruction when subjected to ESD surges up to
15 kV.
DESCRIPTION
TM : IPAD is a trademark of STMicroelectronics.
EMIF04-MMC02F1
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A3
A2
C2
B2
D2
GND
R1
R10
R20
R2
R3
R4
B3
B1
C3
C1
D3
D1
SCHEMATIC
Symbol
Parameter and test conditions
Value
Unit
V
PP
ESD discharge IEC61000-4-2, air discharge
ESD discharge IEC61000-4-2, contact discharge
15
8
kV
T
j
Junction temperature
125
C
T
op
Operating temperature range
-40 to + 85
C
T
stg
Storage temperature range
-55 to +150
C
ABSOLUTE MAXIMUM RATINGS (T
amb
= 25 C)
Symbol
Parameter
V
BR
Breakdown voltage
I
RM
Leakage current @ V
RM
V
RM
Stand-off voltage
V
CL
Clamping voltage
Rd
Dynamic impedance
I
PP
Peak pulse current
ELECTRICAL CHARACTERISTICS (T
amb
= 25 C)
EMIF04-MMC02F1
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Symbol
Test conditions
Min.
Typ.
Max.
Unit
V
BR
I
R
= 1 mA
6
V
I
RM
V
RM
= 3V
0.1
0.5
A
C
line
@ 0V
20
pF
R
1,
R
2
,R
3
,R
4
Tolerance 5%
47
R
10
Tolerance 5%
13
k
R
20
Tolerance 5%
56
k
P
70
mW
1.0M
3.0M
10.0M
30.0M
100.0M 300.0M
1.0G
3.0G
-50.00
-45.00
-40.00
-35.00
-30.00
-25.00
-20.00
-15.00
-10.00
-5.00
0.00
S21(dB) measurements of C3/C1 line
dB
f/Hz
Fig. 1: Filtering measurements
1.0M
3.0M
10.0M
30.0M
100.0M 300.0M
1.0G
3.0G
-80.00
-70.00
-60.00
-50.00
-40.00
-30.00
-20.00
-10.00
0.00
Xtalk measurements C3/B1
dB
f/Hz
Fig. 2: Cross talk measurements
0
2
4
6
8
10
12
14
16
18
20
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
V
R
(V)
C(pF)
F=1MHz
V
osc
=30mV
RMS
T
j
=25C
Fig. 3: Line capacitance versus reverse applied
voltage.
Note: spikes at high frequencies are induced by the PCB
layout.
EMIF04-MMC02F1
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Fig. 4: ESD response to IEC61000-4-2 (+15kV contact discharge).
Positive Surge
Negative Surge
APLAC MODEL
R3
R2
R1
D1
C3
B3
A3
C1
B1
A2
120pH
100m
D3
C2
B2
R10
R20
MODEL = demif04_gnd
MODEL = demif04
MODEL = demif04
R4
D2
DEMIF04
BV = 7
IBV = 1m
CJO = Cz
M = 0.3333
RS = 1
VJ = 0.6
TT = 100n
DEMIF04 gnd
BV = 7
IBV = 1m
CJO = Cz_gnd
M = 0.3333
RS = 1
VJ = 0.6
TT = 100n
Fig. 5: Device structure
EMIF04-MMC02F1
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Lbump
Rbump
Lhole
Rhole
D2
cap_hole
Cins
Rins
A2
B1
C1
D1
Cins
Rins
Cins
Rins
Cins
Rins
Cins
Rins
Cins
Rins
A3
B3
C3
D3
Cins
Rins
Cins
Rins
Cins
Rins
Cins
Rins
aplacvar Lbump 50pH
aplacvar lhole 940pH opt
aplacvar Rhole 100m
aplacvar cap_hole 0.15pF
aplacvar Cins 200fF
aplacvar Rins 10Meg
aplacvar R1 47 opt
aplacvar R2 47
aplacvar R3 47
aplacvar R4 47
aplacvar R10 13k
aplacvar R20 56k
aplacvar Cz 15pF opt
aplacvar Cz_gnd 45pF opt
aplacvar Ls 450pH opt
aplacvar Rs 300m
aplacvar Rbump 50m
Fig. 6: Aplac model connections
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