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MAIN PRODUCT CHARACTERISTICS:
Where EMI filtering in ESD sensitive equipment is
required
Mobile phones and communication systems
Computers, printers and MCU Boards
DESCRIPTION
The EMIF10-1K010F2 is a highly integrated
devices designed to suppress EMI/RFI noise in all
systems subjected to electromagnetic
interferences. The EMIF10 flip chip packaging
means the package size is equal to the die size.
This filter includes an ESD protection circuitry
which prevents the device from destruction when
subjected to ESD surges up 15kV.
BENEFITS
EMI symmetrical (I/O) low-pass filter
High efficiency in EMI filtering
Lead free package
Very low PCB space consuming:
2.57 mm x 2.57 mm
Very thin package: 0.65 mm
High efficiency in ESD suppression
High reliability offered by monolithic integration
High reducing of parasitic elements through
integration & wafer level packaging.
COMPLIES WITH THE FOLLOWING STANDARDS:
IEC61000-4-2
Level 4
15kV (air discharge)
8kV
(contact discharge)
MIL STD 883E -Method 3015-6 Class 3
EMIF10-1K010F2
EMI FILTER
INCLUDING ESD PROTECTION
REV. 1
October 2004
TM: IPAD is a trademark of STMicroelectronics.
Figure 2: Basic Cell Configuration
Input
GND
GND
GND
Output
Low-pass Filter
Ri/o = 1k
Cline = 100pF
IPADTM
Flip-Chip
(24 Bumps)
Figure 1: Pin Configuration (ball side)
A
B
C
D
E
1
2
3
4
5
010
08
06
04
02
09
07
05
03
01
I10
I8
I6
I4
I2
I9
GND
GND
I5
I1
I7
GND
GND
I3
Table 1: Order Code
Part Number
Marking
EMIF10-1K010F2
FD
EMIF10-1K010F2
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Table 2: Absolute Maximum Ratings (T
amb
= 25C)
Table 3: Electrical Characteristics (T
amb
= 25C)
Symbol
Parameter and test conditions
Value
Unit
T
j
Junction temperature
125
C
T
op
Operating temperature range
- 40 to + 85
C
T
stg
Storage temperature range
- 55 to + 150
C
Symbol
Parameters
V
BR
Breakdown voltage
I
RM
Leakage current @ V
RM
V
RM
Stand-off voltage
V
CL
Clamping voltage
R
d
Dynamic impedance
I
PP
Peak pulse current
R
I/O
Series resistance between Input &
Output
C
in
Input capacitance per line
Symbol
Test conditions
Min.
Typ.
Max.
Unit
V
BR
I
R
= 1 mA
6
8
10
V
I
RM
V
RM
= 3V per line
500
nA
R
I/O
900
1000 1100
R
line
At 0V bias
80 100 120 pF
Figure 3: S21 (dB) attenuation measurement
and Aplac simulation
Figure 4: Analog crosstalk measurements
1.0M
3.0M
10.0M
30.0M
100.0M
300.0M
1.0G
- 50.00
- 45.00
- 40.00
- 35.00
- 30.00
- 25.00
- 20.00
- 15.00
- 10.00
- 5.00
0.00
dB
f/Hz
1.0M
3.0M
10.0M
30.0M
100.0M
300.0M
1.0G
- 50.00
- 45.00
- 40.00
- 35.00
- 30.00
- 25.00
- 20.00
- 15.00
- 10.00
- 5.00
0.00
dB
Aplac
Measure
1
10
100
1,000
-100
-80
-60
-40
-20
0
frequency (MHz)
V
I
V
RM
PP
I
RM
I
V
BR
R
I
V
CL
EMIF10-1K010F2
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Figure
5:
Digital
crosstalk
measurement
Figure 6: ESD response to IEC61000-4-2
(+15kV air disc.harge) on one input V(in) and
on one output (Vout)
Figure 7: ESD response to IEC61000-4-2 (-15kV
air discharge) on one input V(in) and on one
output (Vout)
Figure 8: Line capacitance versus applied
voltage
V
G1
2 1 G1
V
V(in1)
V(out1)
V(in1)
V(out1)
1
2
5
10
0
10
20
30
40
50
60
70
80
90
100
VR(V)
C(pF)
F=1MHz
Vosc=30mV
EMIF10-1K010F2
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Figure 9: Aplac model single line structure
Figure 10: Aplac model parameters
sub
Rsubump
Rsubump
Csubump
Csubump
+
+
Rsub
Ii
GNDi
Oi
Rgnd
Rseries
MODEL = demif10
MODEL = demif10
sub
Rgnd
Rgnd
Rgnd
Lgnd
Lgnd
Lgnd
cap_line
cap_line
Port15
50
Port16
50
50pH
50pH
Rs
Rs
50m
50m
Ls
Ls
Ii
Ii
Oi
Oi
+
+
Lgnd
+
-
Lbump
Rbump
Lhole
Rhole
GNDi
cap_hole
+
Cz
57pF
Rseries
960
cap_line
0.8pF
Ls
0.6nH
Rbump
50m
Lbump
50pH
Rs
0.15
Csubump
15pF
Rsubump
0.15
Rsub
0.1
lhole
1.2nH opt
Rhole
0.15
cap_hole
0.15pF
Rgnd
0.25
Ignd
0.4nH
Model demif10
BV = 7
IBV = 1m
CJO = Cz
M = 0.3333
Rs = 1
VJ = 0.6
TT = 100n
EMIF10-1K010F2
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Figure 11: Ordering Information Scheme
Figure 12: FLIP-CHIP Package Mechanical Data
Figure 13: Foot print recommendations
Figure 14: Marking
EMIF yy - xxx zz Fx
EMI Filter
Number of lines
Information
Package
x = resistance value (Ohms)
z = capacitance value / 10(pF)
or
3 letters = application
2 digits = version
F = Flip-Chip
x
= 1: 500m, Bump = 315m
= 2: Leadfree Pitch = 500m, Bump = 315m
= 3: Leadfree Pitch = 400m, Bump = 250m
2.57mm 50m
2.57mm 50m
500m 50
315m 50
500m 50
250m 40
650m 65
Copper pad Diameter :
250m recommended , 300m max
Solder stencil opening : 330m
Solder mask opening recommendation :
340m min for 315m copper pad diameter
545
545
400
100
230
x
y
x
w
z
w
All dimensions in m
E
Dot, ST logo
xx = marking
yww = datecode
(y = year
ww = week)
z = packaging
location
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