Rev 2
August 2005
1/6
6
EMIF08-VID01C2
8 line low capacitance EMI filter
and ESD protection
Main product characteristics
Where EMI filtering in ESD sensitive equipment is
required :
LCD & camera for mobile phones
Computers and printers
Communication systems
MCU Boards
Description
The EMIF08-VID01C2 is an 8 line highly
integrated device designed to suppress EMI/RFI
noise in all systems subjected to electromagnetic
interference. The flip chip packaging means the
package size is equal to the die size.
This filter includes ESD protection circuitry, which
prevents damage to the application when it is
subjected to ESD surges up to 15kV.
Benefits
High efficiency EMI filter (-33 dB @ 900 Mhz)
Low line capacitance suitable for high speed
data bus
Low serial resistance for camera impedance
adaptation
Optimized PCB space consuming: 1.29 mm x
3.92 mm
Very thin package: 0.695 mm
Coating resin on back side and lead free
package
High efficiency in ESD suppression on inputs
pins (IEC61000-4-2 level 4).
High reliability offered by monolithic integration
High reducing of parasitic elements through
integration & wafer level packaging.
Pin configuration (Bumps side)
Complies with following standards:
IEC61000-4-2
MIL STD 883E - Method 3015-6 Class 3
level 4 input pins
15 kV
(air discharge)
8 kV
(contact discharge
level 1 output pins
2 kV
(air discharge)
2 kV
(contact discharge
Coated flip chip package
G N D
G N D
G N D
G N D
G N D
G N D
G N D
G N D
GND
GND
GND
GND
9 8 7
6 5 4
3 2 1
12 11 10
A
B
C
I8
O8
I7
O7
I6
O6
I5
O5
I4
O4
I3
O3
I2
O2
I1
O1
www.st.com
1 Electrical characteristics (T
amb
= 25C)
EMIF08-VID01C2
2/6
Figure 1.
Basic cell configuration
1
Electrical characteristics (T
amb
= 25C)
Table 1.
Absolute ratings (limiting values)
Symbol
Parameter
Value
Unit
Vpp
ESD discharge IEC61000-4-2 air discharge
ESD discharge IEC61000-4-2 contact discharge
15
8
kV
KV
Tj
Maximum junction temperature
125
C
T
op
Operating temperature range
-40 to +85
C
T
stg
Storage temperature range
-55 to +150
C
Symbol
Parameters
V
BR
Breakdown voltage
I
RM
Leakage current @ V
RM
V
RM
Stand-off voltage
R
Series resistance between Input &
Output
C
line
Input capacitance per line
Symbol
Test conditions
Min
Typ
Max
Unit
V
BR
I
R
= 1mA
6
8
10
V
I
RM
V
RM
= 3V per line
500
nA
R
I/O
I=10mA
80
100
120
C
line
V
R
= 3V DC, 1 MHz
16
19
pF
R
R
R
R
R
R
R
R = 100
Cline = 16 pF typ. @ 3 V
Input
Output
V
I
I
R M
V
R M
V
B R
V
I
I
R M
V
R M
V
B R
EMIF08-VID01C2
1 Electrical characteristics (T
amb
= 25C)
3/6
Figure 2.
S21 (dB) attenuation measurement
Figure 3.
Analog crosstalk measurement
Figure 4.
ESD response to IEC61000-4-2
(+15 kV air discharge) on one
input V
in
and one output V
out
Figure 5.
ESD response to IEC61000-4-2
(- 15 kV air discharge) on one
input V
in
and one output V
out
Figure 6.
Line capacitance versus applied
voltage
100k
1M
10M
100M
1G
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
100k
1M
10M
100M
1G
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
dB
f (Hz)
100k
1M
10M
100M
1G
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
100k
1M
10M
100M
1G
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
100k
1M
10M
100M
1G
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
100k
1M
10M
100M
1G
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
f (Hz)
dB
Input
10V/d
Output
10V/d
200ns/d
Input
10V/d
Output
10V/d
200ns/d
200ns/d
Output
10V/d
Output
10V/d
Input
10V/d
Input
10V/d
10
12
14
16
18
20
22
24
26
28
0
1
2
3
4
5
V
(V)
LINE
C
(pF)
LINE
2 Ordering information scheme
EMIF08-VID01C2
4/6
2 Ordering
information
scheme
3
Package mechanical data flip chip
Figure 7.
Marking
Figure 8.
Foot print receommendation
EMI Filter
Number of lines
X: resistance (Ohms)
Z: capacitance value / 10 pF
or
Application (3 letters) and
Version (2 digits)
C: Coated flip chip
1: Pitch = 500 m, Bump = 315 m
2: Lead free Pitch = 500 m, Bump = 315 m
EMIF vv - xxx zz C y
695m +/- 70
3.92 mm +/-50m
1.
29
m
m
+
/
-50
m
500m +/-50
315 m +/- 50
501
m
+/
-50
250m +/-50
435
m
+/
-50
695m +/- 70
695m +/- 70
3.92 mm +/-50m
1.
29
m
m
+
/
-50
m
500m +/-50
315 m +/- 50
501
m
+/
-50
250m +/-50
435
m
+/
-50
3.92 mm +/-50m
1.
29
m
m
+
/
-50
m
1.
29
m
m
+
/
-50
m
500m +/-50
500m +/-50
315 m +/- 50
501
m
+/
-50
250m +/-50
435
m
+/
-50
36
x x z
y w w
40
E
x x z
y w w
40
5
240
365
22
0
x x z
y w w
40
E
Dot, ST Logo
xx = marking
z = packaging
location
yww = date code
Dimensions in
Copper pad Diameter :
250m recommended , 300m max
Solder stencil opening : 330m
Solder mask opening recommendation :
340m min for 300m copper pad diameter
Copper pad Diameter :
250m recommended , 300m max
Solder stencil opening : 330m
Solder mask opening recommendation :
340m min for 300m copper pad diameter
EMIF08-VID01C2
4 Ordering information
5/6
Figure 9.
Flip chip tape and reel specification
4 Ordering
information
5 Revision
history
Ordering code
Marking
Package
Weight
Base qty
Delivery mode
EMIF08-VID01C2
GS
Flip Chip
7.4mg
5000
7" Tape and reel
Date
Revision
Changes
13-Jul-2005
1
Initial release.
11-Aug-2005
2
Fonts changed in Figures 7, 8, and 9.
4 +/- 0.1
1.75
+
/
-
0
.1
4 +/- 0.1
f 1.5 +/- 0.1
5.5
+
/-
0
.
5
User direction of unreeling
12
+
/
-
0
.3
0.73 +/- 0.05
Dot identifying Pin A1 location
ST
E
xx
z
yw
w
ST
E
xx
z
yw
w
ST
E
xx
z
yw
w
4 +/- 0.1
1.75
+
/
-
0
.1
4 +/- 0.1
f 1.5 +/- 0.1
5.5
+
/-
0
.
5
User direction of unreeling
12
+
/
-
0
.3
0.73 +/- 0.05
Dot identifying Pin A1 location
ST
E
xx
z
yw
w
ST
E
xx
z
yw
w
ST
E
xx
z
yw
w
ST
E
xx
z
yw
w
ST
E
xx
z
yw
w
ST
E
xx
z
yw
w
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