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Электронный компонент: HCF4095M013TR

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1/11
September 2002
s
16MHz TOGGLE RATE (Typ.) at
V
DD
- V
SS
= 10V
s
GATED INPUTS
s
QUIESCENT CURRENT SPECIFIED UP TO
20V
s
5V, 10V AND 15V PARAMETRIC RATINGS
s
INPUT LEAKAGE CURRENT
I
I
= 100nA (MAX) AT V
DD
= 18V T
A
= 25C
s
100% TESTED FOR QUIESCENT CURRENT
s
MEETS ALL REQUIREMENTS OF JEDEC
JESD13B "STANDARD SPECIFICATIONS
FOR DESCRIPTION OF B SERIES CMOS
DEVICES"
DESCRIPTION
HCF4095B is a monolithic integrated circuit
fabricated in Metal Oxide Semiconductor
technology available in DIP and SOP packages.
HCF4095B is J-K Master-Slave Flip-Flops
featuring separate AND gating of multiple J and K
inputs. The gated J-K input control transfers
information into the master section during clocked
operation. Information on the J-K inputs is
transferred to the Q and Q outputs on the positive
edge of the clock pulse. SET and RESET inputs
(active high) are provided for asynchronous
operation.
HCF4095B
GATED J-K MASTER SLAVE FLIP-FLOP
PIN CONNECTION
ORDER CODES
PACKAGE
TUBE
T & R
DIP
HCF4095BEY
SOP
HCF4095BM1
HCF4095M013TR
DIP
SOP
HCF4095B
2/11
INPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE : SYNCHRONOUS OPERATION (S=0 R=0)
(*) : J=J1 J2 J3, K=K1 K2 K3
TRUTH TABLE : ASYNCHRONOUS OPERATION (J and K DON'T CARE)
(*) : L = Vss, H = Vdd
PIN No
SYMBOL
NAME AND FUNCTION
3, 4, 5
J1 to J3
J Inputs
11, 10, 9
K1 to K3
K Inputs
8
Q
Q Output
6
Q
Q Output
13
SET (S)
Set Inputs(Active High)
2
RESET (R)
Reset Inputs(Active High)
12
CLOCK
Clock Inputs
1
NC
Not Connected
7
V
SS
Negative Supply Voltage
14
V
DD
Positive Supply Voltage
INPUTS BEFORE POSITIVE CLOCK TRANSITION
OUTPUTS AFTER POSITIVE CLOCK TRANSITION
J*
K*
Q
Q
L
L
NO CHANGE
L
H
L
H
H
L
H
L
H
H
TOGGLES
INPUTS BEFORE POSITIVE CLOCK TRANSITION
OUTPUTS AFTER POSITIVE CLOCK TRANSITION
S
R
Q
Q
L
L
NO CHANGE
L
H
L
H
H
L
H
L
H
H
L
L
HCF4095B
3/11
FUNCTIONAL DIAGRAM
LOGIC DIAGRAM
HCF4095B
4/11
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
All voltage values are referred to V
SS
pin voltage.
RECOMMENDED OPERATING CONDITIONS
DC SPECIFICATIONS
Symbol
Parameter
Value
Unit
V
DD
Supply Voltage
-0.5 to +22
V
V
I
DC Input Voltage
-0.5 to V
DD
+ 0.5
V
I
I
DC Input Current
10
mA
P
D
Power Dissipation per Package
200
mW
Power Dissipation per Output Transistor
100
mW
T
op
Operating Temperature
-55 to +125
C
T
stg
Storage Temperature
-65 to +150
C
Symbol
Parameter
Value
Unit
V
DD
Supply Voltage
3 to 20
V
V
I
Input Voltage
0 to V
DD
V
T
op
Operating Temperature
-55 to 125
C
Symbol
Parameter
Test Condition
Value
Unit
V
I
(V)
V
O
(V)
|I
O
|
(
A)
V
DD
(V)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
I
L
Quiescent Current
0/5
5
0.02
1
30
30
A
0/10
10
0.02
2
60
60
0/15
15
0.02
4
120
120
0/20
20
0.04
20
600
600
V
OH
High Level Output
Voltage
0/5
<1
5
4.95
4.95
4.95
V
0/10
<1
10
9.95
9.95
9.95
0/15
<1
15
14.95
14.95
14.95
V
OL
Low Level Output
Voltage
5/0
<1
5
0.05
0.05
0.05
V
10/0
<1
10
0.05
0.05
0.05
15/0
<1
15
0.05
0.05
0.05
V
IH
High Level Input
Voltage
0.5/4.5
<1
5
3.5
3.5
3.5
V
1/9
<1
10
7
7
7
1.5/13.5
<1
15
11
11
11
V
IL
Low Level Input
Voltage
4.5/0.5
<1
5
1.5
1.5
1.5
V
9/1
<1
10
3
3
3
13.5/1.5
<1
15
4
4
4
I
OH
Output Drive
Current
0/5
2.5
<1
5
-1.36
-3.2
-1.15
-1.1
mA
0/5
4.6
<1
5
-0.44
-1
-0.36
-0.36
0/10
9.5
<1
10
-1.1
-2.6
-0.9
-0.9
0/15
13.5
<1
15
-3.0
-6.8
-2.4
-2.4
I
OL
Output Sink
Current
0/5
0.4
<1
5
0.44
1
0.36
0.36
mA
0/10
0.5
<1
10
1.1
2.6
0.9
0.9
0/15
1.5
<1
15
3.0
6.8
2.4
2.4
HCF4095B
5/11
The Noise Margin for both "1" and "0" level is: 1V min. with V
DD
=5V, 2V min. with V
DD
=10V, 2.5V min. with V
DD
=15V
DYNAMIC ELECTRICAL CHARACTERISTICS (T
amb
= 25C, C
L
= 50pF, R
L
= 200K
, t
r
= t
f
= 20 ns)
(*) Typical temperature coefficient for all V
DD
value is 0.3 %/C.
I
I
Input Leakage
Current
0/18
Any Input
18
10
-5
0.1
1
1
A
C
I
Input Capacitance
Any Input
5
7.5
pF
Symbol
Parameter
Test Condition
Value (*)
Unit
V
DD
(V)
Min.
Typ.
Max.
t
PLH
t
PHL
Propagation Delay Time
5
250
500
ns
10
100
200
15
75
150
t
PLH
t
PHL
Propagation Delay Time
(Set or Reset)
5
150
300
ns
10
75
150
15
50
100
t
TLH
t
THL
Transition Time
5
100
200
ns
10
50
100
15
40
80
f
CL
Maximum Clock Input
Frequency
5
3.5
7
MHz
10
8
16
15
12
24
t
W
Clock Pulse Width
5
140
70
ns
10
60
30
15
40
20
t
r,
t
f
Clock input Rise or Fall Time
5
15
s
10
5
15
5
t
W
Set or Reset Pulse Width
5
200
100
ns
10
100
50
15
50
25
t
setup
Data Setup Time
5
400
200
ns
10
160
80
15
100
50
Symbol
Parameter
Test Condition
Value
Unit
V
I
(V)
V
O
(V)
|I
O
|
(
A)
V
DD
(V)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.