1/9
September 2002
s
QUIESCENT CURRENT SPECIF. UP TO 20V
s
STROBED INPUT LATCH
s
INHIBIT CONTROL
s
INPUT LEAKAGE CURRENT
I
I
= 100nA (MAX) AT V
DD
= 18V T
A
= 25C
s
100% TESTED FOR QUIESCENT CURRENT
s
MEETS ALL REQUIREMENTS OF JEDEC
JESD13B "STANDARD SPECIFICATIONS
FOR DESCRIPTION OF B SERIES CMOS
DEVICES"
DESCRIPTION
HCF4515B is a monolithic integrated circuit
fabricated in Metal Oxide Semiconductor
technology available in SOP package.
HCF4515B consists of a 4-bit strobed latch and a
4 to 16 line decoder. The latches hold the last
input data presented prior to the strobe transition
from 1 to 0. Inhibit control allows all outputs to be
placed at 1 regardless of the state of the data or
strobe inputs. The decode truth table indicates all
combinations of data inputs and appropriate
selected outputs.
HCF4515B
OUTPUT "LOW" ON SELECT
4-BIT LATCH/4-TO-16 LINE DECODER
PIN CONNECTION
ORDER CODES
PACKAGE
TUBE
T & R
SOP
HCF4515BM1
HCF4515M013TR
SOP
HCF4515B
2/9
IINPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
FUNCTIONAL DIAGRAM
PIN No
SYMBOL
NAME AND FUNCTION
1
STROBE
Strobe Input
2, 3, 21, 22
DATA 1 to 4 Address Inputs
11, 9, 10, 8,
7, 6, 5, 4, 18,
17, 20, 19,
14, 13, 16,
15
S0 to S15
Multiplexer Outputs
(Active HIGH)
23
INHIBIT
Enable Input
12
V
SS
Negative Supply Voltage
24
V
DD
Positive Supply Voltage
HCF4515B
3/9
LOGIC DIAGRAM
TRUTH TABLE
X : Don't Care
INPUTS
STROBE
SELECT OUTPUT
INHIBIT
A
B
C
D
L
L
L
L
L
STROBE = "H"
Refer to truth table
STROBE = "L"
Data at the negative going
transition of strobe shall
be provided on the each
output while strobe is held
low.
S0
L
H
L
L
L
S1
L
L
H
L
L
S2
L
H
H
L
L
S3
L
L
L
H
L
S4
L
H
L
H
L
S5
L
L
H
H
L
S6
L
H
H
H
L
S7
L
L
L
L
H
S8
L
H
L
L
H
S9
L
L
H
L
H
S10
L
H
H
L
H
S11
L
L
L
H
H
S12
L
H
L
H
H
S13
L
L
H
H
H
S14
L
H
H
H
H
S15
H
X
X
X
X
ALL OUTPUTS "L"
HCF4515B
4/9
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
All voltage values are referred to V
SS
pin voltage.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V
DD
Supply Voltage
-0.5 to +22
V
V
I
DC Input Voltage
-0.5 to V
DD
+ 0.5
V
I
I
DC Input Current
10
mA
P
D
Power Dissipation per Package
200
mW
Power Dissipation per Output Transistor
100
mW
T
op
Operating Temperature
-55 to +125
C
T
stg
Storage Temperature
-65 to +150
C
Symbol
Parameter
Value
Unit
V
DD
Supply Voltage
3 to 20
V
V
I
Input Voltage
0 to V
DD
V
T
op
Operating Temperature
-55 to 125
C
HCF4515B
5/9
DC SPECIFICATIONS
The Noise Margin for both "1" and "0" level is: 1V min. with V
DD
=5V, 2V min. with V
DD
=10V, 2.5V min. with V
DD
=15V
Symbol
Parameter
Test Condition
Value
Unit
V
I
(V)
V
O
(V)
|I
O
|
(
A)
V
DD
(V)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
I
L
Quiescent Current
0/5
5
0.04
5
150
150
A
0/10
10
0.04
10
300
300
0/15
15
0.04
20
600
600
0/20
20
0.08
100
3000
3000
V
OH
High Level Output
Voltage
0/5
<1
5
4.95
4.95
4.95
V
0/10
<1
10
9.95
9.95
9.95
0/15
<1
15
14.95
14.95
14.95
V
OL
Low Level Output
Voltage
5/0
<1
5
0.05
0.05
0.05
V
10/0
<1
10
0.05
0.05
0.05
15/0
<1
15
0.05
0.05
0.05
V
IH
High Level Input
Voltage
0.5/4.5
<1
5
3.5
3.5
3.5
V
1/9
<1
10
7
7
7
1.5/13.5
<1
15
11
11
11
V
IL
Low Level Input
Voltage
4.5/0.5
<1
5
1.5
1.5
1.5
V
9/1
<1
10
3
3
3
13.5/1.5
<1
15
4
4
4
I
OH
Output Drive
Current
0/5
2.5
<1
5
-1.36
-3.2
-1.1
-1.1
mA
0/5
4.6
<1
5
-0.44
-1
-0.36
-0.36
0/10
9.5
<1
10
-1.1
-2.6
-0.9
-0.9
0/15
13.5
<1
15
-3.0
-6.8
-2.4
-2.4
I
OL
Output Sink
Current
0/5
0.4
<1
5
0.44
1
0.36
0.36
mA
0/10
0.5
<1
10
1.1
2.6
0.9
0.9
0/15
1.5
<1
15
3.0
6.8
2.4
2.4
I
I
Input Leakage
Current
0/18
Any Input
18
10
-5
0.1
1
1
A
C
I
Input Capacitance
Any Input
5
7.5
pF
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