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L6561
June 2003
s
VERY PRECISE ADJUSTABLE OUTPUT
OVERVOLTAGE PROTECTION
s
MICRO POWER START-UP CURRENT (50
A
TYP.)
s
VERY LOW OPERATING SUPPLY
CURRENT(4mA TYP.)
s
INTERNAL START-UP TIMER
s
CURRENT SENSE FILTER ON CHIP
s
DISABLE FUNCTION
s
1% PRECISION (@ T
j
= 25C) INTERNAL
REFERENCE VOLTAGE
s
TRANSITION MODE OPERATION
s
TOTEM POLE OUTPUT CURRENT: 400mA
s
DIP8/SO8 PACKAGES
DESCRIPTION
L6561 is the improved version of the L6560 stan-
dard Power Factor Corrector. Fully compatible
with the standard version, it has a superior perfor-
mant multiplier making the device capable of work-
ing in wide input voltage range applications (from
85V to 265V) with an excellent THD. Furthermore
the start up current has been reduced at few tens
of
A and a disable function has been implement-
ed on the ZCD pin, guaranteeing lower current
consumption in stand by mode.
Realised in mixed BCD technology, the chip gives
the following benefits:
micro power start up current
1% precision internal reference voltage
(T
j
= 25C)
Soft Output Over Voltage Protection
no need for external low pass filter on the
current sense
very low operating quiescent current min-
imises power dissipation
The totem pole output stage is capable of driving
a Power MOS or IGBT with source and sink cur-
rents of 400mA. The device is operating in tran-
sition mode and it is optimised for Electronic Lamp
Ballast application, AC-DC adaptors and SMPS.
Minidip(DIP8)
SO8
ORDERING NUMBERS:
L6561
L6561D
L6561D013TR
POWER FACTOR CORRECTOR
BLOCK DIAGRAM
+
-
MULTIPLIER
V
REF2
OVER-VOLTAGE
DETECTION
VOLTAGE
REGULATOR
UVLO
INTERNAL
SUPPLY 7V
+
-
2.5V
R1
R2
R
S
Q
+
-
DRIVER
STARTER
+
-
ZERO CURRENT
DETECTOR
DISABLE
2.1V
1.6V
V
CC
8
1
2
3
4
ZCD
V
CC
INV
COMP
MULT
CS
GD
7
5
GND
6
D97IN547D
20V
40K
5pF
L6561
2/12
ABSOLUTE MAXIMUM RATINGS
PIN CONNECTION (Top view)
THERMAL DATA
PIN DESCRIPTION
Symbol
Pin
Parameter
Value
Unit
I
Vcc
8
I
q
+ I
Z
; (I
GD
= 0)
30
mA
I
GD
7
Output Totem Pole Peak Current (2
s)
700
mA
INV, COMP
MULT
1, 2, 3
Analog Inputs & Outputs
-0.3 to 7
V
CS
4
Current Sense Input
-0.3 to 7
V
ZCD
5
Zero Current Detector
50 (source)
-10 (sink)
mA
mA
P
tot
Power Dissipation @T
amb
= 50 C
(Minidip)
(SO8)
1
0.65
W
W
T
j
Junction Temperature Operating Range
-40 to 150
C
T
stg
Storage Temperature
-55 to 150
C
Symbol
Parameter
SO 8
MINIDIP
Unit
R
th j-amb
Thermal Resistance Junction to ambient
150
100
C/W
N.
Name
Function
1
INV
Inverting input of the error amplifier. A resistive divider is connected between the output
regulated voltage and this point, to provide voltage feedback.
2
COMP
Output of error amplifier. A feedback compensation network is placed between this pin and the
INV pin.
3
MULT
Input of the multiplier stage. A resistive divider connects to this pin the rectified mains. A voltage
signal, proportional to the rectified mains, appears on this pin.
4
CS
Input to the comparator of the control loop. The current is sensed by a resistor and the resulting
voltage is applied to this pin.
5
ZCD
Zero current detection input. If it is connected to GND, the device is disabled.
6
GND
Current return for driver and control circuits.
7
GD
Gate driver output. A push pull output stage is able to drive the Power MOS with peak current of
400mA (source and sink).
8
V
CC
Supply voltage of driver and control circuits.
INV
COMP
MULT
CS
1
3
2
4
ZCD
GND
GD
V
CC
8
7
6
5
DIP8
3/12
L6561
ELECTRICAL CHARACTERISTICS
(V
CC
= 14.5V; T
amb
= -25C to 125C;unless otherwise specified)
Symbol
Pin
Parameter
Test Condition
Min.
Typ.
Max.
Unit
SUPPLY VOLTAGE SECTION
V
CC
8
Operating Range
after turn-on
11
18
V
V
CC ON
8
Turn-on Threshold
11
12
13
V
V
CC OFF
8
Turn-off Threshold
8.7
9.5
10.3
V
Hys
8
Hysteresis
2.2
2.5
2.8
V
SUPPLY CURRENT SECTION
I
START-U
8
Start-up Current
before turn-on (V
CC
=11V)
20
50
90
A
I
q
8
Quiescent Current
2.6
4
mA
I
CC
8
Operating Supply Current
C
L
= 1nF @ 70KHz
4
5.5
mA
in OVP condition V
pin1
= 2.7V
1.4
2.1
mA
Iq
8
Quiescent Current
V
PIN5
150mV, V
CC
> V
CC
off
1.4
2.1
mA
8
V
PIN5
150mV, V
CC
< V
CC off
20
50
90
A
V
Z
8
Zener Voltage
I
CC
= 25mA
18
20
22
V
ERROR AMPLIFIER SECTION
V
INV
1
Voltage Feedback Input
Threshold
T
amb
= 25C
2.465
2.5
2.535
V
12V < V
CC
< 18V
2.44
2.56
V
Line Regulation
V
CC
= 12 to 18V
2
5
mV
I
INV
1
Input Bias Current
-0.1
-1
A
G
V
Voltage Gain
Open loop
60
80
dB
GB
Gain Bandwidth
1
MHz
I
COMP
2
Source Current
V
COMP
= 4V, V
INV
= 2.4V
-2
-4
-8
mA
Sink Current
V
COMP
= 4V, V
INV
= 2.6V
2.5
4.5
mA
V
COMP
2
Upper Clamp Voltage
I
SOURCE
= 0.5mA
5.8
V
Lower Clamp Voltage
I
Sink
= 0.5mA
2.25
V
MULTIPLIER SECTION
V
MULT
3
Linear Operating Voltage
0 to 3
0 to 3.5
V
Output Max. Slope
V
MULT
= from 0V to 0.5V
V
COMP
= Upper Clamp Voltage
1.65
1.9
K
Gain
V
MULT
= 1V V
COMP
= 4V
0.45
0.6
0.75
1/V
CURRENT SENSE COMPARATOR
V
CS
4
Current Sense Reference
Clamp
V
MULT
= 2.5V
V
COMP
= Upper Clamp Voltage
1.6
1.7
1.8
V
I
CS
4
Input Bias Current
V
OS
= 0
-0.05
-1
A
t
d (H-L)
4
Delay to Output
200
450
ns
4
Current Sense Offset
0
15
mV
ZERO CURRENT DETECTOR
V
ZCD
5
Input Threshold Voltage Rising
Edge
(1)
2.1
V
Hysteresis
(1)
0.3
0.5
0.7
V
V
ZCD
5
Upper Clamp Voltage
I
ZCD
= 20
A
4.5
5.1
5.9
V
V
ZCD
5
Upper Clamp Voltage
I
ZCD
= 3mA
4.7
5.2
6.1
V
V
C S
V
m ult
-----------------
L6561
4/12
(1) Parameter guaranteed by design, not tested in production.
OVER VOLTAGE PROTECTION OVP
The output voltage is expected to be kept by the operation of the PFC circuit close to its nominal value.
This is set by the ratio of the two external resistors R1 and R2 (see fig. 2), taking into consideration that
the non inverting input of the error amplifier is biased inside the L6561 at 2.5V.
In steady state conditions, the current through R1 and R2 is:
and, if the external compensation network is made only with a capacitor C
comp
, the current through C
comp
equals zero.When the output voltage increases abruptly the current through R1 becomes:
Since the current through R2 does not change,
I
R1
must flow through the capacitor C
comp
and enter the
error amplifier.
This current is monitored inside the L6561 and when reaches about 37
A the output voltage of the multi-
plier is forced to decrease, thus reducing the energy drawn from the mains. If the current exceeds 40
A,
the OVP protection is triggered (Dynamic OVP), and the external power transistor is switched off until the
current falls approximately below 10
A.
However, if the overvoltage persists, an internal comparator (Static OVP) confirms the OVP condition
keeping the external power switch turned off (see fig. 1).Finally, the overvoltage that triggers the OVP
function is:
V
out
= R
1
40
A.
V
ZCD
5
Lower Clamp Voltage
I
ZCD
= -3mA
0.3
0.65
1
V
I
ZCD
5
Sink Bias Current
1V
V
ZCD
4.5V
2
A
I
ZCD
5
Source Current Capability
-3
-10
mA
I
ZCD
5
Sink Current Capability
3
10
mA
V
DIS
5
Disable threshold
150
200
250
mV
I
ZCD
5
Restart Current After Disable
V
ZCD
< V
dis
; V
CC
> V
CCOFF
-100
-200
-300
A
OUTPUT SECTION
V
GD
7
Dropout Voltage
I
GDsource
= 200mA
1.2
2
V
I
GDsource
= 20mA
0.7
1
V
I
GDsink
= 200mA
1.5
V
I
GDsink
= 20mA
0.3
V
t
r
7
Output Voltage Rise Time
C
L
= 1nF
40
100
ns
t
f
7
Output Voltage Fall Time
C
L
= 1nF
40
100
ns
I
GD off
7
IGD Sink Current
V
CC
=3.5V V
GD
= 1V
5
10
-
mA
OUTPUT OVERVOLTAGE SECTION
I
OVP
2
OVP Triggering Current
35
40
45
A
Static OVP Threshold
2.1
2.25
2.4
V
RESTART TIMER
t
START
Start Timer
70
150
400
s
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= 14.5V; T
amb
= -25C to 125C;unless otherwise specified)
Symbol
Pin
Parameter
Test Condition
Min.
Typ.
Max.
Unit
I
R 1s c
V
o ut
2.5
R1
--------------------------
I
R 2
2.5 V
R2
------------
=
=
=
I
R 1
V
o utsc
V
out
2.5
+
R 1
-----------------------------------------------------
I
R 1 sc
I
R 1
+
=
=
5/12
L6561
Typical values for R
1
, R
2
and C are shown in the application circuits. The overvoltage can be set indepen-
dently from the average output voltage. The precision in setting the overvoltage threshold is 7% of the ov-
ervoltage value (for instance
V = 60V 4.2V).
Disable function
The zero current detector (ZCD) pin can be used for device disabling as well. By grounding the ZCD volt-
age the device is disabled reducing the supply current consumption at 1.4mA typical (@ 14.5V supply volt-
age).
Releasing the ZCD pin the internal start-up timer will restart the device.
Figure 1.
Figure 2. Overvoltage Protection Circuit
V
OUT nominal
I
SC
40
A
E/A OUTPUT
2.25V
DYNAMIC OVP
STATIC OVP
D97IN592A
OVER VOLTAGE
10
A
+Vo
D97IN591
-
+
2
R1
R2
Ccomp.
E/A
1
2.5V
I
-
+
X
PWM
DRIVER
2.25V
40
A
I
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