1/23
L6590
October 2000
s
WIDE-RANGE MAINS OPERATION
s
"ON-CHIP" 700V V(BR)DSS POWER MOS
s
65 kHz INTERNAL OSCILLATOR
s
2.5V 2% INTERNAL REFERENCE
s
STANDBY MODE FOR HIGH EFFICIENCY AT
LIGHT LOAD
s
OVERCURRENT AND LATCHED
OVERVOLTAGE PROTECTION
s
NON DISSIPATIVE BUILT-IN START-UP CIRCUIT
s
THERMAL SHUTDOWN WITH HYSTERESIS
s
BROWNOUT PROTECTION (SMD PACKAGE
ONLY)
MAIN APPLICATIONS
s
WALL PLUG POWER SUPPLIES UP TO 15 W
s
AC-DC ADAPTERS
s
AUXILIARY POWER SUPPLIES FOR:
- CRT AND LCD MONITOR (BLUE ANGEL)
- DESKTOP PC/SERVER
- FAX, TV, LASER PRINTER
- HOME APPLIANCES/LIGHTING
s
LINE CARD, DC-DC CONVERTERS
DESCRIPTION
The L6590 is a monolithic switching regulator de-
signed in BCD OFF-LINE technology, able to operate
with wide range input voltage and to deliver up to
15W output power. The internal power switch is a lat-
eral power MOSFET with a typical R
DS(on)
of 13
and a V
(BR)DSS
of 700V minimum.
MINIDIP
SO16W
ORDERING NUMBERS:
L6590N
L6590D
FULLY INTEGRATED POWER SUPPLY
TYPICAL APPLICATION CIRCUIT
3
1
5
6, 7, 8
L6590
AC line
88 to 264 Vac
4
Vcc
VFB
COMP
DRAIN
GND
Pout
up to 15W
Primary Feedback
3
1
5
6, 7, 8
L6590
AC line
88 to 264 Vac
4
Vcc
VFB
COMP
DRAIN
GND
Pout
up to 15W
Secondary Feedback
L6590
2/23
DESCRIPTION (continued)
The MOSFET is source-grounded, thus it is possible
to build flyback, boost and forward converters.
The device can work with secondary feedback and a
2.5V2% internal reference, in addition to a high gain
error amplifier, makes possible also the use in appli-
cations either with primary feedback or not isolated.
The internal fixed oscillator frequency and the integrated
non dissipative start-up generator minimize the external
component count and power consumption.
The device is equipped with a standby function that
automatically reduces the oscillator frequency from
65 to 22 kHz under light load conditions to enhance
efficiency (P
in
< 1W @ P
out
= 0.5W with wide range
mains).
Internal protections like cycle-by-cycle current limiting,
latched output overvoltage protection, mains undervolt-
age protection (SMD version only) and thermal shut-
down generate a 'robust' design solution.
The IC uses a special leadframe with the ground pins
(6, 7 and 8 in minidip, 9 to16 in SO16W package) in-
ternally connected in order for heat to be easily re-
moved from the silicon die. An heatsink can then be
realized by simply making provision of few cm
2
of
copper on the PCB. Furthermore, the pin(s) close to
the high-voltage one are not connected to ease com-
pliance with safety distances on the PCB.
BLOCK DIAGRAM
PIN CONNECTIONS (Top view)
SUPPLY
& UVLO
OVP
OCP
+
-
+
-
2.5V
+
-
DRAIN
(1)
[1]
VCC
(3)
[4]
BOK
[6]
COMP
(4)
[7]
GND
(6,7,8)
PGND
[9, ..., 16]
VREF
BROWNOUT
PWM
STANDBY
START-UP
OSC
65/22 kHz
THERMAL
SHUTDOWN
2.5V
-
+
VFB
(5)
[8]
VREF
SGND
[5]
[x] : L6590D (SO16W)
VFB
DRAIN
N.C.
Vcc
COMP
GND
GND
GND
MINIDIP
L6590
DRAIN
N.C.
N.C.
Vcc
SGND
BOK
COMP
VFB
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SO16W
L6590D
3/23
L6590
PIN FUNCTIONS
THERMAL DATA
(*) Value depending on PCB copper area and thickness
.
ABSOLUTE MAXIMUM RATINGS
Pin#
Name
Description
L6590
L6590D
1
1
DRAIN
Drain connection of the internal power MOSFET. The internal high voltage start-up
generator sinks current from this pin.
2
2, 3
N.C.
Not internally connected. Provision for clearance on the PCB.
3
4
V
CC
Supply pin of the IC. An electrolytic capacitor is connected between this pin and ground.
The internal start-up generator charges the capacitor until the voltage reaches the start-
up threshold. The PWM is stopped if the voltage at the pin exceeds a certain value.
4
7
COMP
Output of the Error Amplifier. Used for control loop compensation or to directly control
PWM with an optocoupler.
5
8
VFB
Inverting input of the Error Amplifier. The non-inverting one is internally connected to a
2.5V 2% reference. This pin can be grounded in some feedback schemes.
6 to 8
-
GND
Connection of both the source of the internal MOSFET and the return of the bias current
of the IC. Pins connected to the metal frame to facilitate heat dissipation.
-
6
BOK
Brownout Protection. If the voltage applied to this pin is lower than 2.5V the PWM is
disabled. This pin is typically used for sensing the input voltage of the converter through
a resistor divider. If not used, the pin can be either left floating or connected to Vcc
through a 15 k
resistor.
-
5
SGND
Current return for the bias current of the IC.
-
9 to 16
PGND
Connection of the source of the internal MOSFET. Pins connected to the metal frame to
facilitate heat dissipation.
Symbol
Parameter
Minidip
SO16W
Unit
R
thj-amb
Thermal Resistance Junction to ambient (*)
35 to 60
40 to 65
C/W
R
thj-pins
Thermal Resistance Junction to pins
15
20
C/W
Symbol
Parameter
Value
Unit
V
ds
Drain Source Voltage
-0.3 to 700
V
I
d
Drain Current
0.7
A
V
cc
IC Supply Voltage
18
V
I
clamp
V
cc
Zener Current
20
mA
Error Amplifier Ouput Sink Current
3
mA
Voltage on Feedback Input
5
V
BOK pin Sink Current
1
mA
P
tot
Power Dissipation at T
amb
< 50C (Minidip and SO16W)
3 cm
2
, 2 oz copper dissipating area on PCB
1.5
W
T
j
Operating Junction Temperature
-40 to 150
C
T
stg
Storage Temperature
-40 to 150
C
L6590
4/23
ELECTRICAL CHARACTERISTCS (T
j
= -25 to 125C, V
cc
= 10V; unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
POWER SECTION
V
(BR)DSS
Drain Source Voltage
I
d
< 200 A; T
j
= 25 C
700
V
I
dss
Off state drain current
V
ds
= 560V; T
j
= 125 C
200
A
R
DS(on)
Drain-to-Source on resistance
R
DS(on)
vs. T
j
: see fig. 20
I
d
= 120mA; T
j
= 25 C
13
16
I
d
= 120mA; T
j
= 125 C
23
28
ERROR AMP SECTION
V
FB
Input Voltage
T
j
= 25 C
2.45
2.5
2.55
V
T
j
= 125C
2.4
2.5
2.6
Ib
E/A Input Bias Current
V
FB
= 0 to 2.5 V
0.3
5
A
Avol
DC Gain
open loop
60
70
dB
B
Unity Gain Bandwidth
0.7
1
MHz
SVR
Supply voltage Rejection
f = 120 Hz
70
dB
I
sink
Output Sink Current
V
COMP
= 1V
1
mA
I
source
Output Source Current
V
COMP
= 3.5V; VFB = 2V
-0.5
-1
-2.5
mA
V
COMPH
Vout High
I
source
= -0.5mA; VFB=2V
3.8
4.50
V
V
COMPL
Vout Low
I
sink
= 1mA ; VFB=3V
1
V
OSCILLATOR SECTION
F
osc
Oscillator Frequency
T
j
= 25 C
58
65
72
kHz
52
65
74
D
min
Min. Duty Cycle
V
COMP
= 1V
0
%
D
max
Max. Duty Cycle
V
COMP
= 4V
67
70
73
%
DEVICE OPERATION SECTION
I
op
Operating Supply Current
fsw = Fosc
4.5
7
mA
I
Q
Quiescent Current
MOS disabled
3.5
6
mA
I
charge
V
CC
charge Current
V
cc
= 0V to V
ccon
- 0.5V;
V
ds
= 100 to 400V; T
j
= 25C
-3
-4.5
-7
mA
V
cc
= 0V to V
ccon
- 0.5V;
V
ds
= 100 to 400V
-2.5
-4.5
-7.5
mA
V
CCclamp
V
CC
clamp Voltage
I
clamp
= 10mA (*)
16.5
17
17.5
V
V
ccon
Start Threshold
voltage
(*)
14
14.5
15
V
V
ccoff
Min operating voltage after Turn
on
(*)
6
6.5
7
V
V
dsmin
Drain start voltage
40
V
5/23
L6590
(*) Parameters tracking one the other
(**) Parameter guaranteed by design, not tested in production
(***) Parameters guaranteed by design, functionality tested in production
CIRCUIT PROTECTIONS
I
pklim
Pulse-by-pulse Current Limit
di/dt = 120 mA/ s
550
625
700
mA
OVP
Overvoltage Protection
I
cc
= 10 mA (*)
16
16.5
17
V
LEB
Masking Time
After MOSFET turn-on (**)
120
ns
STANDBY SECTION
F
SB
Oscillator Frequency
19
22
25
kHz
I
pksb
Peak switch current for Standby
Operation
Transition from F
osc
to F
SB
80
mA
I
pkno
Peak switch current for Normal
Operation
Transition from F
SB
to F
osc
190
mA
BROWNOUT PROTECTION (L6590D only)
V
th
Threshold Voltage
Voltage either rising or falling
2.4
2.5
2.6
V
I
Hys
Current Hysteresis
V
pin
= 3V
-30
-50
-70
A
V
CL
Clamp Voltage
I
pin
= 0.5 mA
5.6
6.4
7.2
V
THERMAL SHUTDOWN (***)
Threshold
150
165
C
Hysteresis
40
C
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
ELECTRICAL CHARACTERISTICS (continued)
Figure 1. Start-up & UVLO Thresholds
Figure 2. Start-up Current Generator
Start-up
UVLO
-50
0
50
100
150
6
8
10
12
14
16
Tj [C]
Vcc [V]
Vdrain = 40 V
0
2
4
6
8
10
12
3
3.5
4
4.5
5
5.5
Vcc [V]
Icc [mA]
Tj = -25 C
Tj = 25 C
Tj = 125 C
L6590
6/23
Figure 3. Start-up Current Generator
Figure 4. IC Consumption Before Start-up
Figure 5. IC Quiescent Current
Figure 6. IC Operating Current
Figure 7. IC Operating Current
Figure 8. Switching Frequency vs.
Temperature
0
2
4
6
8
10
12
3
3.5
4
4.5
5
5.5
Vcc [V]
Icc [mA]
Tj = -25 C
Tj = 25 C
Tj = 125 C
Vdrain = 60 V
7
8
9
10
11
12
13
14
15
100
200
300
400
500
600
700
Vcc [V]
Icc [A]
Tj = -25 C
Tj = 25 C
Tj = 125 C
6
8
10
12
14
16
18
3
3.2
3.4
3.6
3.8
4
Vcc [V]
Icc [mA]
Tj = -25 C
Tj = 25 C
Tj = 125 C
VFB = 2.7 V
7
8
9
10
11
12
13
14
15
3
3.5
4
4.5
5
Vcc [V]
Icc [mA]
Tj = -25 C
Tj = 25 C
Tj = 125 C
VFB = 2.3 V
fsw = 65 kHz
7
8
9
10
11
12
13
14
15
3
3.2
3.4
3.6
3.8
4
4.2
4.4
Vcc [V]
Icc [mA]
Tj = -25 C
Tj = 25 C
Tj = 125 C
VFB = 2.3 V
fsw = 22 kHz
Normal operation
Standby
-50
0
50
100
150
10
20
30
40
50
60
70
80
Tj [C]
fsw [kHz]
7/23
L6590
Figure 9. Vcc clamp vs. Temperature
Figure 10. OVP Threshold vs. Temperature
Figure 11. OCP Threshold vs. Current Slope
Figure 12. OCP threshold vs. Temperature
Figure 13. Internal E/A Reference Voltage
Figure 14. Error Amplifier Slew Rate
-50
0
50
100
150
17
17.2
17.4
17.6
17.8
18
Tj [C]
VCCclamp [V]
I
clamp
= 20 mA
I
clamp
= 10 mA
-50
0
50
100
150
15
15.2
15.4
15.6
15.8
16
Tj [C]
Vth [V]
50
100
150
200
250
0.96
0.98
1
1.02
1.04
1.06
dI/dt [mA/s]
Ipklim / (Ipklim @ di/dt = 120 mA/s)
Tj = 25 C
-50
0
50
100
150
0.98
1
1.02
1.04
1.06
1.08
1.1
Tj [C]
Ipklim / (Ipklim @ Tj = 25C)
di/dt = 120 mA/s
-50
0
50
100
150
2.4
2.45
2.5
2.55
2.6
Tj [C]
Vref [V]
0
2
4
6
8
10
12
14
16
0
1
2
3
4
5
t [s]
VCOMP [V]
V
FB
V
COMP
R
L
= 10 k
C
L
= 100 pF
open loop
L6590
8/23
Figure 15. COMP pin Characteristic
Figure 16. COMP pin Dynamic Resistance vs.
Temperature
Figure 17. Error Amplifier Gain and Phase
Figure 18. Breakdown Voltage vs. Temperature
Figure 19. Drain Leakage vs. Drain Voltage
Figure 20. Rds(ON) vs. Temperature
0
0.2
0.4
0.6
0.8
1
1.2
1.4
0
1
2
3
4
5
6
ICOMP [mA]
VCOMP [V]
V
FB
= 0
Tj = 25 C
V
FB
= 0
-50
0
50
100
150
8
8.5
9
9.5
10
10.5
Tj [C]
RCOMP [kOhm]
1
10
100
1k
10k
100k
1M
f [Hz]
dB
100
50
0
0
90
180
Phase
Gain
m
-50
0
50
100
150
0.92
0.94
0.96
0.98
1
1.02
1.04
1.06
1.08
Tj [C]
BVDSS / (BVDSS @ Tj = 25C)
Idrain = 200 A
100
200
300
400
500
600
700
10
20
30
40
50
Vdrain [V]
Idrain [A]
Tj = -25 C
Tj = 25 C
Tj = 125 C
-50
0
50
100
150
0.6
0.8
1
1.2
1.4
1.6
1.8
Tj [C]
Rds(ON) / (Rds(ON) @ Tj=25C)
Idrain = 120 mA
9/23
L6590
Figure 21. Rds(ON) vs. Idrain
Figure 22. Coss vs. Drain Voltage
0
100
200
300
400
500
600
0.9
1
1.1
1.2
1.3
Idrain [mA]
Rds(ON) / (Rds(ON) @ Idrain=120 mA)
Tj = 25 C
0
100
200
300
400
500
600
700
0
50
100
150
200
250
Vdrain [V]
Coss [pF]
Tj = 25 C
Figure 23. Standby Function Thresholds
-50
0
50
100
150
60
80
100
120
140
160
180
200
220
Tj [C]
Drain Peak Current [mA]
22 kHz
65 kHz
65 kHz
22 kHz
L6590
10/23
Figure 24. Test Board (1) with Primary Feedback: Electrical Schematic
Figure 25. Test Board (1) Evaluation Data
C2
22 F
25 V
C4
100 nF
C7, C8
330 F
16 V
D1
BZW06-154
D3
1N4148
D4 BYW100-100
IC1
C9
100 F
16 V
R1 68
R4
1.5 k
D2
STTA106
L1
4.7 H
T1
C1
22 F
400 V
C7
2.2 nF
Y
C6
10 nF
BD1
DF06M
Vin
88 to 264 Vac
F1
2A/250V
R2
5.6 k
R3
1.1 k
T1 specification
Core E20/10/6, ferrite 3C85 or N67 or equivalent
0.5 mm gap for a primary inductance of 2.9 mH
L
leakage
<90 H
Primary : 180 T, 2 series windings 90T each, AWG33
(
0.22 mm)
Sec : 19 T, AWG30 (
0.3 mm)
Aux : 19 T, AWG33
Vo =12 V 10%
Po= 1 to 10 W
3
1
5
4
6, 7, 8
L6590
R5
110
C5
680 nF
Load & Line regulation
50
100
150
200
250
300
11.5
12
12.5
13
13.5
Input Voltage [Vac]
Output Voltage [V]
Efficiency
50
100
150
200
250
300
72
74
76
78
80
82
84
86
Input Voltage [Vac]
Efficiency [%]
P
out =
10 W
5 W
2.5 W
1 W
P
out =
10 W
5 W
2.5 W
1 W
11/23
L6590
Figure 26. Test Board (1) Main Waveforms
Figure 27. Test Board (2) with Secondary Feedback: Electrical Schematic
Ch2: Vdrain
Vin = 100 V
DC
Pout = 10 W
Vin = 400 V
DC
Pout = 10 W
Vin = 100 V
DC
Pout = 1 W
Vin = 400 V
DC
Pout = 1 W
Ch3: Idrain
Ch2: Vdrain
Ch3: Idrain
Ch2: Vdrain
Ch3: Idrain
Ch2: Vdrain
Ch3: Idrain
T1 specification
Core E20/10/6, ferrite 3C85 or N67 or equivalent
0.6 mm gap for a primary inductance of 1.4 mH
L
leakage
<30 H
Primary : 128 T, 2 series windings 64T each, AWG32
(
0.22 mm)
Sec : 6 T, 4xAWG32
Aux : 14 T, AWG32
5 Vdc / 2 A
C2
22 F
25V
C4
2.2 nF
Y1
class
C8
220 F
10V
Rubycon
ZL
C9
100 nF
R2
560
D1
BZW06-154
D3
1N4148
D4 1N5822
OP1
PC817
3
1
2
3
C5, C6, C7
470 F
16V
Rubycon ZL
R1 10
C3
22 nF
L1
4.7 H
T1
D2
STTA106
BD1
DF06M
Vin
88 to 264
Vac
F1
2A/250V
L
22 mH
Cx
A
100 nF
Cx
B
100 nF
C1
22 F
400 V
4
2
1
IC2
TL431
R3
2.43 k
R4
2.43 k
R5
2 k
3
1
5
4
6, 7, 8
L6590
IC1
R6
6.8 k
L6590
12/23
Figure 28. Test Board (2) evaluation data
Figure 29. Test Board (2) EMI Characterization
Load & Line regulation
0.003
0.01
0.03
0.1
0.3
1
3
4.9
4.92
4.94
4.96
4.98
5
Load Current [A]
Output Voltage [V]
264 V
AC
88 V
AC
110 V
AC
220 V
AC
Efficiency
0.003
0.01
0.03
0.1
0.3
1
3
20
30
40
50
60
70
80
Load Current [A]
Efficiency [%]
88 V
AC
264 V
AC
220 V
AC
110 V
AC
Light-load Consumption
50
100
150
200
250
300
350
400
450
0
200
400
600
800
1,000
DC Input Voltage [V]
Input Power [mW]
P
out
0.5W
0.25W
0.1W
0.05W
0 W
Device Power Dissipation
0.003
0.01
0.03
0.1
0.3
1
3
0.05
0.1
0.2
0.5
1
2
5
Load Current [A]
Pdiss [W]
88 V
AC
110 V
AC
264 V
AC
220 V
AC
Rthj-amb= 58 C/W @ 1.5W
13/23
L6590
Figure 30. Test Board (2) Main Waveforms
Figure 31. Test Board (2) Load Transient Response
A1: Idrain
Ch1: Vdrain
Vin = 100 V
DC
Iout = 2 A
Vin = 400 V
DC
Iout = 2 A
A1: Idrain
Ch1: Vdrain
A1: Idrain
Ch1: Vdrain
Vin = 100 V
DC
Iout = 50 mA
A1: Idrain
Ch1: Vdrain
Vin = 400 V
DC
Iout = 50 mA
Vin = 200 V
DC
Iout = 0.1
0.3 A
Vout
Iout
transition
22
65 kHz
transition
65
22 kHz
Standby Function
is tripped
Vin = 200 V
DC
Iout = 0.2
0.4 A
Vout
Iout
Standby Function
is not tripped
L6590
14/23
APPLICATION INFORMATION
In the following sections the functional blocks as well as the most important internal functions of the device will
be described.
Start-up Circuit
When power is first applied to the circuit and the voltage on the bulk capacitor is sufficiently high, an internal
high-voltage current generator is sufficiently biased to start operating and drawing about 4.5 mA through the
primary winding of the transformer and the drain pin. Most of this current charges the bypass capacitor connect-
ed between pin Vcc (3) and ground and makes its voltage rise linearly.
As the Vcc voltage reaches the start-up threshold (14.5V typ.) the chip, after resetting all its internal logic, starts
operating, the internal power MOSFET is enabled to switch and the internal high-voltage generator is discon-
nected. The IC is powered by the energy stored in the Vcc capacitor until the self-supply circuit (typically an
auxiliary winding of the transformer) develops a voltage high enough to sustain the operation.
As the IC is running, the supply voltage, typically generated by a self-supply winding, can range between 16 V
(Overvoltage protection limit, see the relevant section) and 7 V, threshold of the Undervoltage Lockout. Below
this value the device is switched off (and the internal start-up generator is activated). The two thresholds are in
tracking.
The voltage on the Vcc pin is limited at safe values by a clamp circuit. Its 17V threshold tracks the Overvoltage
protection threshold.
Figure 32. Start-up circuit internal schematic
Power MOSFET and Gate Driver
The power switch is implemented with a lateral N-channel MOSFET having a V
(BR)DSS
of 700V min. and a typ-
ical R
DS(on)
of 13
. It has a SenseFET structure to allow a virtually lossless current sensing (used only for pro-
tection).
During operation in Discontinuous Conduction Mode at low mains the drain voltage is likely to go below ground.
Any risk of injecting the substrate of the IC is prevented by an internal structure surrounding the switch.
The gate driver of the power MOSFET is designed to supply a controlled gate current during both turn-on and
turn-off in order to minimize common mode EMI.
Under UVLO conditions an internal pull-down circuit holds the gate low in order to ensure that the power MOS-
FET cannot be turned on accidentally.
17 V
DRAIN
Vcc
15 M
UVLO
150
GND
POWER
MOSFET
15/23
L6590
Figure 33. PWM Control internal schematic
Oscillator and PWM Control
PWM regulation is accomplished by implementing voltage mode control. As shown in fig. 33, this block includes
an oscillator, a PWM comparator, a PWM latch and an Error Amplifier.
The oscillator operates at a frequency internally fixed at 65 kHz with a precision of 10 %. The maximum duty
cycle is limited at 70% typ.
The PWM latch (reset dominant) is set by the clock pulses of the oscillator and is reset by either the PWM com-
parator or the Overcurrent comparator.
The Error Amplifier (E/A) is an op-amp with a MOS input stage and a class AB output stage. The amplifier is
compensated for closed loop stability at unity gain, has a small-signal DC gain of 70 dB (typ.) and a gain-band-
width product over 1 MHz.
In case of overcurrent the error amplifier output saturates high and the conduction of the power MOSFET is
stopped by the OCP comparator instead of the PWM comparator.
Under zero load conditions the error amplifier is close to its low saturation and the gate drive delivers as short
pulses as it can, limited by internal delays. They are however too long to maintain the long-term energy balance,
thus from time to time some cycles need being skipped and the operation becomes asynchronous. This is au-
tomatically done by the control loop.
Standby Function
The standby function, optimized for flyback topology, automatically detects a light load condition for the convert-
er and decreases the oscillator frequency. The normal oscillation frequency is automatically resumed when the
output load builds up and exceeds a defined threshold.
This function allows to minimize power losses related to switching frequency, which represent the majority of losses
in a lightly loaded flyback, without giving up the advantages of a higher switching frequency at heavy load.
The Standby function is realized by monitoring the peak current in the power switch. If the load is low that it does
not reach a threshold (80 mA typ.), the oscillator frequency will be set at 22 kHz typ.
When the load demands more power and the peak primary current exceeds a second threshold (190 mA typ.)
the oscillator frequency is reset at 65 kHz. This 110 mA hysteresis prevents undesired frequency change when
power is such that the peak current is close to either threshold.
The signal coming from the sense circuit is digitally filtered to avoid false triggering of this function as a result of
large load changes or noise.
Clock
+
-
from OCP
comparator
COMP
S
R
Q
Max. Duty cycle
OSCILLATOR
+
-
to gate
driver
E/A
VFB
PWM
L6590
16/23
Figure 34. Standby Function timing diagram
Brownout Protection (L6590D only)
Brownout Protection is basically a not-latched device shutdown functionality. It will typically be used to detect a
mains undervoltage (brownout). This condition may cause overheating of the primary power section due to an
excess of RMS current.
Figure 35. Brownout Protection Function internal schematic and timing diagram
Pout
Peak
Primary
Current
2 ms
1 ms
STANDBY
(filtered)
190 mA
80 mA
f
sw
65 kHz
22 kHz
0000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000
STANDBY
(before filter)
Vout
Load
regulation
small glitch
HV Input bus
VinOK
Vcc
V
ON
V
OFF
000000000000000000000
000000000000000000000
000000000000000000000
000000000000000000000
000000000000000000000
000000000000000000000
000000000000000000000
000000000000000000000
PWM
Vout
+
-
L6590D
2.5 V
VinOK
50 A
HV Input bus
6.4 V
BOK
Vcc
17/23
L6590
Another problem is the spurious restarts that are likely to occur during converter power down if the input voltage
decays slowly (e.g. with a large input bulk capacitor) and that cause the output voltage not to decay to zero
monothonically.
Converter shutdown can be accomplished with the L6590D by means of an internal comparator that can be
used to sense the voltage across the input bulk capacitor. This comparator is internally referenced to 2.5V and
disables the PWM if the voltage applied at its non-inverting input, externally available, is below the reference.
PWM operation is re-enabled as the voltage at the pin is more than 2.5V.
The brownout comparator is provided with current hysteresis instead of a more usual voltage hysteresis: an in-
ternal 50 A current generator is ON as long as the voltage applied at the non-inverting input exceeds 2.5V and
is OFF if the voltage is below 2.5V. This approach provides an additional degree of freedom: it is possible to set
the ON threshold and the OFF threshold separately by properly choosing the resistors of the external divider,
which is not possible with voltage hysteresis.
Overvoltage Protection
The IC incorporates an Overvoltage Protection (OVP) that can be particularly useful to protect the converter and
the load against voltage feedback loop failures. This kind of failure causes the output voltage to rise with no
control and easily leads to the destruction of the load and of the converter itself if not properly handled.
If such an event occurs, the voltage generated by the auxiliary winding that supplies the IC will fly up tracking
the output voltage. An internal comparator continuously monitors the Vcc voltage and stops the operation of the
IC if the voltage exceeds 16.5 V. This condition is latched and maintained until the Vcc voltage falls below the
UVLO threshold. The converter will then operate intermittently.
Figure 36. OVP internal schematic
Overcurrent Protection
The device uses pulse-by-pulse current limiting for Overcurrent Protection (OCP), in order to prevent overstress
of the internal MOSFET: its current during the ON-time is monitored and, if it exceeds a determined value, the
conduction is terminated immediately. The MOSFET will be turned on again in the subsequent switching cycle.
As previously mentioned, the internal powerMOSFET has a SenseFET structure: the source of a few cells are
connected together and kept separate from the other source connections so as to realize a 1:100 current divider.
The "sense" portion is connected to a ground referenced, sense resistor having a low thermal coefficient. The
OCP comparator senses the voltage drop across the sense resistor and resets the PWM latch if the drop ex-
ceeds a threshold, thus turning off the MOSFET. In this way the overcurrent threshold is set at about 0.65 A
(typical value).
Vcc
DRAIN
+
-
to OVP
latch
GND
to
MOSFET
OVP
L6590
18/23
At turn-on, there are large current spikes due to the discharge of parasitic capacitances and, in case of Contin-
uos Conduction Mode operation, to secondary diode reverse recovery as well, which could falsely trigger the
OCP comparator. To increase noise immunity the output of the OCP comparator is blanked for a short time
(about 120 ns) just after the MOSFET is turned on, so that any disturbance within this time slot is rejected (Lead-
ing Edge Blanking).
Figure 37. OCP internal schematic
Thermal Shutdown
Overheating of the device due to an excessive power throughput or insufficient heatsinking is avoided by the
Thermal Shutdown function. A thermal sensor monitors the junction temperature close to the power MOSFET
and, when the temperature exceeds 150 C (min.), sets an alarm signal that stops the operation of the device.
This is a not-latched function and the power MOSFET is re-enabled as the temperature falls about 40 C.
Clock
+
-
DRAIN
GND
1
1/100
S
R
Q
Max. Duty cycle
OSCILLATOR
PWM
Driver
Rsense
OCP
+
-
0.5 V
LEB
Clock
19/23
L6590
APPLICATION IDEAS
Figure 38. 10W AC-DC adapter with no isolation
Figure 39. 15W Auxiliary SMPS for PC
T1 specification
Core E20/10/6, ferrite 3C85 or N67 or equivalent
0.5 mm gap for a primary inductance of 1.6 mH
L
leakage
<30 H
Primary : 130 T, 2 series windings 65T each, AWG33
(
0.22 mm)
Sec : 14 T, AWG26 (
0.4 mm)
Vo =12 V 3%
Io= 0 to 0.8 A
C2
22 F
25 V
C4
100 nF
C7, C8
330 F
16 V
D1
BZW06-154
D3
1N4148
D4 STPS3L60S
IC1
C9
100 F
16 V
R1 10
R4
1 k
D2
STTA106
L1
4.7 H
T1
C1
22 F
400 V
C5
2.2 nF
BD1
DF06M
Vin
88 to 264 Vac
F1
2A/250V
L
22 mH
Cx
A
100 nF
Cx
B
100 nF
R2
3.9 k
R3
27 k
3 (4)
1
5 (8)
4
(7)
6, 7, 8
(9 to 16)
L6590
(L6590D)
T1 specification
Core E20/10/6, ferrite 3C85 or N67 or equivalent
0.9 mm gap for a primary inductance of 2 mH
L
leakage
<50 H
Primary : 200 T, 2 series windings 100T each, AWG33
(
0.22 mm)
Sec : 9 T, 2 x AWG23 (
0.64 mm)
Aux : 21 T, AWG33
4
1
6
7
9, ..., 16
5 Vdc / 3 A
C2
22 F
25 V
C8
100 F
10V
D1
BZW06-154
D3
1N4148
D4 STPS10L25D
OP1
PC817
L6590D
IC1
3
4
1
2
3
C5, C6, C7
470 F
10 V
R1 10
C3
47 nF
L1
4.7 H
T1
D2
STTA106
C9
470 nF
2
1
IC2
TL431
Vin = 200 to 375 Vdc
R2
1.8 M
R3
20 k
C1
10 nF
C4
2.2 nF
Y
R4
560
R5
2.43 k
R6
2.43 k
5
R7
240
8
L6590
20/23
Figure 40. 7.2V/7W Battery Charger
REFERENCES
[1] "Getting Familiar with the L6590 Family, High-voltage Fully Integrated Power Supply" (AN1261)
[2] "Offline Flyback Converters Design Methodology with the L6590 Family" (AN1262)
T1 specification
Core E20/10/6, ferrite 3C85 or N67 or equivalent
1 mm gap for a primary inductance of 2.6 mH
L
leakage
<60 H
Primary : 230 T, 2 series windings 115T each, AWG36
(
0.16 mm)
Sec : 13 T, AWG23 (
0.64 mm)
Aux : 60 T, AWG36
7.2 Vdc / 1 A
C3
10 F
25V
C4
2.2 nF
Y1 class
C8 680 nF
D1
BZW06-154
D3 BAV21
D4 1N5821
OP1
PC817
C5, C6
330 F
16V
R1
39
C3 10 nF
T1
16:1
D2
STTA106
BD1
DF06M
Vin
88 to 264 Vac
F1
2A/250V
L
22 mH
Cx
A
100 nF
Cx
B
100 nF
C1
22 F
400 V
R9
22.6 k
R13
12 k
C2
220 nF
R2
5.6 k
R3
1.5 k
R4 10 k
1
2
IC2
TSM103
3
8
4
2
1
D5
1N4148
D6
1N4148
D7
1N4148
D8
BZX79C12
C7
10 F
25V
C9 330 nF
R5
4.7 k
3
4
R6
0.1
R10
6.8 k
R7
620
R11
11.8 k
R8
560
R12
1 k
7
6
5
Q1
BC337
3 (4)
1
4 (7)
5
(8)
6, 7, 8
(9 to 16)
L6590
(L6590D)
21/23
L6590
L6590
22/23
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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23/23
L6590
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