L9610C
L9611C
October 2000
PWM POWER MOS CONTROLLER
.
HIGH EFFICIENCY DUE TO PWM CONTROL
AND POWERMOS DRIVER
.
LOAD DUMP PROTECTION
.
LOAD POWER LIMITATION
.
EXTERNAL POWERMOS PROTECTION
.
LIMITED OUTPUT VOLTAGE SLEW RATE
SO16
DESCRIPTION
The L9610C/11C is a monolithic integrated circuit
working in PWM mode as controller of an external
powerMOS transistor in High Side Driver configura-
tion.
Features of the device include controlled slope of
the leading and trailing edge of the gate driving vol-
tage, linear current limiting with protection timer, set-
table switching frequency fo, TTL compatible enable
function, protection status ouput pin. The device is
mounted in SO16 micropackage, and DIP16 pack-
age.
ORDERING NUMBERS: L9610C
L9611C
BLOCK DIAGRAM
DIP16
1/12
PIN CONNECTION (Top view)
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
S
Max. Supply Voltage
26
V
Transient Peak Supply Voltage (R1
100
):
Load Dump:
5ms
t
rise
10ms;
f
Fall Time Constant = 100ms; R
SOURCE
0.5
Field Decay:
5ms
t
fall
10ms;
r
Rise Time Constant = 33ms; R
SOURCE
10
Low Energy Spike: t
rise
=1
s, t
fall
= 2ms, R
SOURCE
10
60
80
100
V
V
V
I
S
Max. Supply Current (t < 300 ms)
0.3
A
V
IN
Input Voltage
0.3 < V
IN
< V
S
2.5
V
T
J
/T
stg
Junction and Storage Temperature Range
55 to 150
C
THERMAL DATA
Symbol
Parameter
SO16
DIP16
Value
R
th j-amb
Thermal Resistance Junction-alumina
Max
50
90
C/W
L9610C - L9611C
2/12
PIN FUNCTIONS
Pin
Name
Functions
1
INT
A Capacitor Connected Between this Pin and Out
G
Defines the GATE
Voltage Slew Rate.
2
IN
Analog Input Controlling the PWM Ratio. The operating range of the input
voltage is 0 to V
R
.
3
V
R
Output of an Internal Voltage Reference
4
EN
TTL Compatible Input for Switching off the Output.
5
PWL
If this Pin is Connected to GND and V
S
> 13 V, the Duty Cycle and the
Frequency f
o
are Reduced : this Allows to Transfer a Costant Power to the
Load.
6
Osc
Current Sink and Source Stage Connection of a Triangle Oscillator with
Definite Voltage Swing.
7
IND
Input of an Operational Amplifier for Short Current Sensing and Regulation.
8
NC
Not Connected.
9
V
S
Common Supply Voltage Input
10
GND
Common Ground Connection
11
TIM
A Capacitor Connected Between this Pin and GND Defines the Protection
Delay Time.
12
MON
Open Collector Monitoring Output off the PowerMOS Protection.
13,15
P2, P1
Connection for the Charge Pump Capacitor.
14
BS
The Capacitor Connected Between thisPin and theSource of the Power MOS
Allows to Bootstrap the Gate Driving Voltage.
16
Out G
Output for Driving the Gate of the External PowerMOS.
L9610C - L9611C
3/12
ELECTRICAL CHARACTERISITCS (T
amb
= 40
C to 85
C ; 6 V < V
S
< 16 V unless otherwise specified)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
S
Operating Supply Voltage
6
16
V
I
q
Quiescent Current
2.5
6
mA
V
SC
Internal Supply Voltage Clamp
I
S
= 200mA
28
32
36
V
V
SH
Supply Voltage High Threshold
16
18.5
21
V
V
SL
Supply Voltage Low Threshold
4
5
6
V
V
R
Reference Voltage
3.3
3.5
3.7
V
I
R
Reference Current
V
R
100mV
1
mA
V
INL
Input Low Threshold
0.13
0.15
0.2
V
IN
/V
R
K
F
Oscillator Freq. Constant
Note 1
800
2500
nF/s
K
S
Gate Voltage Slew Rate
Constant
Note 2
3
5
9
nFV/ms
K
T
Protection Time Delay Constant
Note 3
0.12
0.44
ms/nF
V
Si
Sense Input Volt.
80
100
120
mV
V
GON
Gate Driving Volt. above V
S
V
S
= 16V
8
16
V
V
GOFF
Gate Voltage in OFF Condition
I
G
= 100
A
1.2
V
I
IN
Input Current
5
1
A
V
ENL
Low Enable Voltage
0.8
V
V
ENH
High Enable Voltage
2.0
V
IEN
Enable Input Current
2
A
SR
Slew Rate
Without C
S
0.5
V/
s
V
MONsat
Saturation Voltage (pin 12)
I
MON = 2.5 mA
1.5
V
Notes :
1. f
o
= K
F
/C
F
.
2. dV
G
/dt = Ks/Cs.
3. t
prot
= K
T
C
T
.
FUNCTIONAL DESCRIPTION
PULSE WIDTH COMPARATOR
A ground compatible comparator generates the
PWM signal which controls the gate of the external
powerMOS.
The slopes of the leading and trailing edges of the
gate driving signal are defined by the external ca-
pacitor C
S
according to :
dV
G
/dt = K
S
/C
S
This feature allows to optimize the switching speed
for the power and RFI performance best suited for
the application.
The lower limit of the duty cycle is fixed at 15 % of
the ratio between the input and the reference vol-
tage (see fig. 1). Input voltages lower than this value
disable the internal oscillator signal and therefore
the gate driver.
GROUND COMPATIBLE TRIANGLE
OSCILLATOR
The triangle oscillator provides the switching fre-
quency f
o
set by the external capacitor C
F
according
to :
f
o
= K
F
/C
F
If the pin PWL (power limitation) is connected to
ground and Vs is higher than the PWL threshold
voltage, the duty cycle and the f
o
frequency are re-
duced : this allows to transfer a costant power to the
load (see fig. 2).
TIMER AND PROTECTION LATCH
When an overcurrent occurs, the device starts
charging the external capacitor C
T
; the protection
time is set according to :
t
prot
= K
T
.
C
T
L9610C - L9611C
4/12
After the overcurrent protection time is reached, the
powerMOS is switched-off ; this condition is latched
by setting an internal flip-flop and is externally moni-
tored by the low state of the MON pin.
To reset the latch the supply voltage has to fall below
V
SL
or the device must be switched off.
UNDER AND OVERVOLTAGE SENSE WITH
LOAD DUMP PROTECTION
The undervoltage detection feature resets the timer
and switches off the output driving signal when the
supply voltage is less than V
SL
.
If the supply voltage exceeds the max operating
supply voltage value, an internal comparator dis-
ables the charge pump, the oscillator and the exter-
nal powerMOS.
In both cases the thresholds are provided with suit-
able hysteresis values.
The load dump protection function allows the device
to withstand - for a limited time - high overvoltages.
It consists of an active clamping diode which limits
the circuit supply voltage to V
CLAMP
and an external
current limiting resistor R1. The maximum pulse
supply current (see abs. max. ratings is equal to
0.3A. Therefore the maximum load dump voltage is
given by :
V
DUMP
= V
SC
+ 0.3R
1
In this condition the gate of the powerMOS is held
at the GND pin potential and thus the load voltage
is :
V
L
= Vs - V
CLAMP
- V
GS
Figure 1 : Typical Transfer Curve.
L9610C - L9611C
5/12
Figure 2 : The Typical Waveforms for the Power Limitation Function.
SHORT CIRCUIT CURRENT REGULATION
The maximum load current in the short circuit con-
dition can be chosen by the value of the current
sensing resistor R
S
according to :
I
SC
= V
SI
/R
S
Two identical V
S
compatible comparators are pro-
vided to realize the short circuit protection.
After reaching the lower threshold voltage (typical
value V
SI
-10 mV), the first comparator enables the
timer and the gate is driven with the full continuous
pump voltage : when the upper threshold voltage
value is reached the second comparator maintains
the chosen I
SC
driving the NMOS gate in continuous
mode.
This function - showed in fig. 3 - speeds up the
switch on phase for a lamp as a load.
BANDGAP VOLTAGE REFERENCE
The circuit provides a reference voltage which may
be used as control input voltage through a resistive
divider. This reference is protected against the short
circuit current.
CHARGE PUMP
The charge pump circuit holds the N-MOS gate
above the supply voltage during the ON phase. This
circuit consists of an RC astable which drives a com-
parator with a push-pull output stage. The external
charge pump capacitor C
P
must be at least equal to
the NMOS parasitic input capacitance.
For fast gate voltage variation C
P
must be increased
or the bootstrap function can be used. The bootstrap
capacitor should be at least 10 times greater than
the powerMOS parasitic capacitance.
The charge pump voltage V
PUMP
can reach to :
V
PUMP
= 2 V
S
- V
BE
- V
CESAT
The circuit is disabled if the supply voltage is higher
than V
SH
.
L9610C - L9611C
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Figure 3 : The Typical Waveforms for Short Circuit Current Condition.
L9610C - L9611C
7/12
APPLICATION CIRCUIT
Figure 4.
Note : All node voltages are referred to ground pin (GND)
The currents flowing in the arrow direction are assumed positive
without C
BS
: C
P
= 1nF
without C
BS
: C
BS
must be at least 10 times higher than the gate capacitance : C
P
= 100 pF.
CONTROLLING A 120W HALOGEN LAMP WITH
THE L9610C/11C DIMMER
The L9610C/11C Lamp Dimmer is used to control
the brightness of vehicle headlamps using H4 type
lamps (see fig. 5). With switch S1 open the full sup-
ply voltage is applied to the lamps : closing the
switch it is a possible to reduce the average lamp
voltage as desired :
R3
VL = VS
R2 + R3
If pin 5 is connected to ground the average lamp
voltage is constant, even for supply voltages in ex-
cess of 13 V.
L9610C - L9611C
8/12
Figure 5 : Application Circuit.
The sensing resistor R
S
and timing capacitor C
t
should be dimensioned according to :
V
Si
R
S
=
2Inom (@Vs=14 V)
2 x limitation time
C
t
=
K
T
In normal conditions (V
CC
= 14 V, maximum bright-
ness) the voltage drop across the sense resistor
must be 50 mV. The current limiter intervenes
attwice the nominal current, I
nom
.
The timing capacitor C
t
(V
ct
= 3.5 V) must be chosen
so that the delay before intervention is twice the du-
ration of the current limitation at power-on.
The optimal value of the oscillator frequency, taking
tolerances into account, must be slightly higher than
the frequency at which lamp flicker is noticable (min
60 Hz).
The switching times are a compromise between
possible EMI and switching power losses. The rec-
ommended value for Cs is 47pF.
L9610C - L9611C
9/12
DIP16
DIM.
mm
inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
a1
0.51
0.020
B
0.77
1.65
0.030
0.065
b
0.5
0.020
b1
0.25
0.010
D
20
0.787
E
8.5
0.335
e
2.54
0.100
e3
17.78
0.700
F
7.1
0.280
I
5.1
0.201
L
3.3
0.130
Z
1.27
0.050
OUTLINE AND
MECHANICAL DATA
L9610C - L9611C
10/12
SO16 Narrow
DIM.
mm
inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
1.75
0.069
a1
0.1
0.25
0.004
0.009
a2
1.6
0.063
b
0.35
0.46
0.014
0.018
b1
0.19
0.25
0.007
0.010
C
0.5
0.020
c1
45 (typ.)
D (1)
9.8
10
0.386
0.394
E
5.8
6.2
0.228
0.244
e
1.27
0.050
e3
8.89
0.350
F (1)
3.8
4
0.150
0.157
G
4.6
5.3
0.181
0.209
L
0.4
1.27
0.016
0.050
M
0.62
0.024
S
(1) D and F do not include mold flash or protrusions. Mold flash or potrusions shall not exceed 0.15mm (.006inch).
OUTLINE AND
MECHANICAL DATA
8(max.)
L9610C - L9611C
11/12
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quences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No
license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this
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croelectronics products are not authorized for use as critical components in life support devices or systems without express written
approval of STMicroelectronics.
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L9610C - L9611C
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