LCP150S
PROGRAMMABLE TRANSIENT VOLTAGE
SUPPRESSOR FOR SLIC PROTECTION
Application Specific Discretes
A.S.D.
TM
February 1998 - Ed: 3
DUAL PROGRAMMABLE TRANSIENT
SUPPRESSOR
HIGH SURGE CURRENT CAPABILITY.
- I
PP
= 50A, 10/1000
s.
- I
PP
= 60 A, 5/310
s
.
-
I
PP
= 150 A, 2/10
s.
HOLDING CURRENT = 150 mA min.
LOW GATE TRIGGERING CURRENT :
I
GT
= 15 mA max.
FEATURES
This device has been especially designed to
protect a subscriber line card interface (SLIC)
against transient overvoltage.
Positive overloads are clipped with two diodes,
while negative surges are suppressed by two
protection thyristors, their breakdown voltage
being is referenced to the -Vbat.
This component presents a very low gate
triggering current (I
GT
) in order to reduce the
current consumption on the PC board during the
firing phase.
DESCRIPTION
CONNECTION DIAGRAM
SIP 4
CCITT - K20
10/700
s
1kV
5/310
s
25A
VDE 0433
10/700
s
2kV
5/200
s
50A
VDE 0878
1.2/50
s
1.5kV
1/20
s
40A
FCC part 68
2/10
s
2.5kV
2/10
s
150A(*)
BELLCORE
TR-NWT-001089 : 2/10
s
2.5kV
2/10
s
150A(*)
10/1000
s
1kV
10/1000
s
50A(*)
CNET
0.5/700
s
1kV
0.2/310
s
25A
(*) with series resistors or PTC.
COMPLIES WITH THE FOLLOWING STANDARDS:
SCHEMATIC DIAGRAM
TM: ASD is trademarks of SGS-THOMSON Microelectronics.
1/6
Symbol
Parameter
Value
Unit
R
th (j-a)
Junction-to-ambient
80
C/W
THERMAL RESISTANCE
Symbol
Parameter
Value
Unit
I
PP
Peak pulse current (see note 1)
10/1000
s
5/320
s
2/10
s
50
60
150
A
I
TSM
Non repetitivesurge peakon-statecurrent
F = 50 Hz
tp = 10 ms
t = 1 s
25
8
A
I
GSM
Maximum gate current (half sine wave tp = 10 ms)
2
A
V
MLG
V
MGL
Maximum Voltage LINE/GND
Maximum Voltage GATE/LINE
- 100
- 80
V
T
stg
T
j
Storage temperature range
Maximum operating junction temperature
- 55 to + 150
150
C
C
T
L
Maximum lead temperature for soldering during 10s
260
C
ABSOLUTE MAXIMUM RATINGS (T
amb
= 25
C)
100
50
% I
PP
t
t
r
p
0
t
Note 1: Pulse waveform
10/1000
s
tr = 10
s
tp = 1000
s
5/320
s
tr = 5
s
tp = 320
s
2/10
s
tr = 2
s,
tp = 10
s
LCP150S
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I
I
F
V
SGL
V
R
I
R
V
F
V
GL
I
pp
I
H
Symbol
Parameter
I
GT
Gate Trigger Current
I
H
Holding Current
I
R
Reverse Leakage Current LINE/GND
I
RG
Reverse Leakage Current GATE/LINE
V
R
Reverse Voltage LINE/GND
V
F
Forward Voltage LINE/GND
V
GT
Gate Trigger Voltage
V
FP
Peak Forward Voltage LINE/GND
V
SGL
Dynamic Switching Voltage
GND/LINE
V
gate
GATE/GND Voltage
V
LG
LINE/GND Voltage
C
Off State Capacitance LINE/GND
Symbol
Test Conditions
Max.
Unit
V
F
Square pulse, Tp = 500
s, I
F
= 5 A
3
V
V
FP
Ipp = 40 A, 10/1000
s.
15
V
1 - PARAMETERS RELATED TO THE DIODE LINE/GND
Symbol
Tests Conditions
Min.
Max.
Unit
I
GT
V
GND/LINE
= -48 V
0.2
15
mA
I
H
V
GATE
= -48 V
Note 2
150
mA
V
GT
at I
GT
2.5
V
I
RG
Tc = 25
C
V
RG
= -75 V
Tc = 70
C
V
RG
= -75 V
5
50
A
A
V
SGL
V
GATE
= -48 V
Note 2
- 63
V
2 - PARAMETERS RELATED TO PROTECTION THYRISTOR
Symbol
Tests Conditions
Min.
Max.
Unit
I
R
Tc = 25
C
-1 < V
GL
< -Vbat
V
R
= - 85 V
Tc = 70
C
-1 < V
GL
< -Vbat
V
R
= - 85 V
5
50
A
A
C
V
R
= - 3 V
F < 1MHz
V
R
= - 48 V
F < 1MHz
150
80
pF
pF
3 - PARAMETERS RELATIVE TO DIODE AND PROTECTION THYRISTOR
Note 2 : See test circuit for IH and VSGL.
ELECTRICAL CHARACTERITICS (T
amb
= 25
C, unless otherwise specified)
LCP150S
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FUNCTIONAL HOLDING CURRENT (I
H
) TEST CIRCUIT = GO - NOGO TEST.
R
- Vpp
Vbat = - 48V
Ipp = 10A,10/1000 s
V
SGL
This is a GO-NOGO Test which allows to confirm the holding current (I
H
) level in a functional
test circuit.
This test can be performedif the reference test circuit can't be implemented.
TEST PROCEDURE :
1) Adjust the current level at the IH value by short circuiting the AK of the D.U.T.
2) Fire the D.U.T with a surge Current : Ipp = 10A , 10/1000
s.
3) The D.U.T will come back to the OFF-State within a duration of 50 ms max.
The V
SGL
is measured just before firing
1E-2
1E-1
1E+0
1E+1
1E+2
1E+3
0
5
10
15
20
25
30
I
(A)
TSM
t(s)
Tj initial = 25
C
Fig. 1 : Surge peak current versus overload
duration (typical values).
LCP150S
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Typical SLIC Protection Concept.
APPLICATION CIRCUIT
RING
RELAY
RING GENERATOR
PTC
PTC
LINE A
LINE B
THBT200S
LCP150S
- V
BAT
SLIC
T
E
S
T
R
E
L
A
Y
220
nF
S
FUNCTIONAL DESCRIPTION
LINE A PROTECTION:
- For positive surges versus GND, the diode D1
will conduct.
- For negative surges versus GND, the protec-
tion device P1 will trigger at a voltage fixed by
the -VBAT reference.
LINE B PROTECTION:
- For surges on Line B, the operating mode is the
same , D2 or P2 is activated.
A capacitor (C = 220nF) can be added close to
the gate of the LCP15xx, in order to speed up
the triggering.
LCP150S
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