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June 2002
s
RF REGULATOR
s
VERY LOW DROPOUT VOLTAGE : 30mV
s
ULTRA LOW OUTPUT VOLTAGE NOISE
s
HIGH PSRR : 70dB
s
LOW STAND-BY CURRENT : 20A
s
LOW QUIESCENT CURRENT : 150A FULL
LOAD
s
NO CURRENT IN POWER DOWN MODE
s
SHORT CIRCUIT PROTECTION
s
SMALL DECOUPLING CERAMIC CAPACITOR
s
BIPOLAR INPUT STAGE
TYPICAL APPLICATIONS
Cellular and Cordless phones supplied by 1 cell
Lithium-ion battery / 3 cells Ni-MH or Ni-Cd
battery
PDA (Personal Digital Assistant)
Smart phone
Portable equipment
Supply for RF devices for cellular phone
APPLICATION NOTE
An external capacitor (C
OUT
= 1F) with an
equivalent serial resistance (ESR) in the range
0.02 to 0.6
is used for regulator stability.
Figure 1 : Block Diagram
?
V
REF
?
?
?
LDO_512
OUT
IN
PWRDWN
STDBY
Figure 2 : Typical Application Circuit
1
F
ESR
V
OUT
C
OUT
?
?
OUT
GND
?
?
?
V
IN
IN
PWRDWN
Power Down Mode
OFF
ON
Stand-by Mode
STDBY
Active Mode
LDO_512
Stand-by Mode
LDO_512
IP Library: Ultra Low Noise, High PSRR, Low Power,
30mA Very Low Dropout Voltage Regulators
This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
PRODUCT PREVIEW
LDO_512
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ELECTRICAL CHARACTERISTICS
3V < V
IN
< 5.5V, -30C < T
A
< +85C, V
REF
= 2.8V, 0.8F < C
OUT
< 1.2F, 20m
< ESR < 0.6
.
100A < I
LOAD
< 30mA.
Typical case : V
IN
= 4V, T = 25C, I
OUT
= 15mA.
Notes: 1. Above characteristics are given for 3V minimum input operating range voltage, but regulator is
operational with 2.7V minimum input voltage.
2. All parameters are guaranteed with 170mV Dropout voltage.
Parameter
Symbol
Test Condition
Min.
Typ.
Max.
Unit
Input Voltage Range (Note 1)
V
IN
3
5.5
V
Output Voltage
V
OUT
2.8
V
Output current
I
OUT
30
mA
PMOS Output Resistance
R
ON
0.4
Input Current
I
IN
200
600
nA
Dropout Voltage
V
DO
I
LOAD
= 30mA,
V
OUT
= 50mV
30
mV
(Note 2)
170
Quiescent current
I
Q
I
LOAD
= 100A
100
150
A
I
LOAD
= 30mA
150
280
Stand-by current
I
STDBY
I
LOAD
= 100A
20
30
A
Power down mode quiescent current
I
PDN
Power down active
0.1
A
Power Supply Rejection Ratio
PSRR
f < 100KHz
55
70
dB
Power Supply Rejection Ratio in
stand-by mode
PSRR
STY
f < 100kHz
60
65
dB
Load Regulation
L
DR
10
12
mV
Line Regulation
L
IR
I
LOAD
= 30mA,
V
IN
= 3V to 5.1V,
V
OUT
= 2.8V
0.5
1
mV
Line Transcient
L
IRT
V
OUT
= 2.8V,
I
OUT
= 30mA,
V
IN
= 300mV
t
RISE
= t
FALL
= 10s
0.5
1.5
mV
Load Transcient
L
DTR
V
OUT
= 2.8V,
t
RISE
= t
FALL
= 10s
100A < I
LOAD
< 30mA
3
mV
Recovery time
10
20
s
Output Voltage Noise
en
100Hz < f
1KHz
30
70
1KHz < f
100KHz
20
35
f > 100KHz
20
30
Output Decoupling Capacitor
C
OUT
1
F
Settling Time (from power down to active
mode)
V
OUT
= 2.8V,
C
OUT
= 1F
20
50
s
Short Circuit Current Limit
I
SHORT
200
mA
nV
Hz
------------
LDO_512
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100
1000
10000
100000
0
50
100
150
FREQUENCY (Hz)
NO
I
S
E
(
n
Vr
m
s
)
100
1000
10000
100000
60
65
70
75
FREQUENCY (Hz)
PS
RR
(
d
B
)
TYPICAL CHARACTERISTICS
Figure 3 : PSRR vs Frequency
(Iload max - Vin min)
Figure 4 : Noise vs Frequency
(Iload max - Vin min)
Figure 5 : Load Transient (rising egde)
Figure 6 : Load Transient (falling egde)
Figure 7 : Load Transient in Std-by mode
(rising egde)
Figure 8 : Load Transient in Std-by mode
(falling egde)
LDO_512
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0
20
40
60
80
100
2810
2811
2812
2813
OUTPUT CURRENT (A)
O
U
TP
U
T
V
O
LTA
G
E
(
m
V
)
Vin=5.1V
Vin=3.0V
0
10
20
30
2790
2795
2800
2805
OUTPUT CURRENT (mA)
O
U
TP
U
T
V
O
LTA
G
E
(
m
V
)
Vin=5.1V
Vin=3.0V
2810
2811
2812
2813
INPUT VOLTAGE (V)
O
U
TP
U
T
V
O
LTA
G
E
(
m
V
)
3.0
3.5
4.0
4.5
5.1
no load
Iload=100A
2790
2795
2800
2805
2810
INPUT VOLTAGE (V)
O
U
TP
U
T
V
O
LTA
G
E
(
m
V
)
3.0
3.5
4.0
4.5
5.1
no load
Iload=15mA
Iload=30mA
Figure 9 : Output Voltage vs Input Voltage
(Line Regulation)
Figure 10 : Output Voltage vs Input Voltage
(Line Regulation - Stand-by mode)
Figure 13 : Output Voltage vs Output Current
(Load Regulation)
Figure 14 : Output Voltage vs Output Current
(Load Regulation - Stand-by mode)
Figure 11 : Line Transient
(rising egde ; Vin min ; Iload max)
Figure 12 : Line Transient
(falling egde ; Vin min ; Iload max)
LDO_512
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