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June 2002
IP Library: Ultra Low Noise, High PSRR, Low Power,
20mA Low Dropout Voltage Regulator
s
RF REGULATOR
s
VERY LOW DROPOUT VOLTAGE : 60mV
s
ULTRA LOW OUTPUT VOLTAGE NOISE
s
HIGH PSRR : 70dB
s
LOW QUIESCENT CURRENT : 70
A FULL
LOAD
s
NO CURRENT IN POWER DOWN MODE
s
SHORT CIRCUIT PROTECTION
s
SMALL DECOUPLING CERAMIC CAPACITOR
s
MOS INPUT STAGE
APPLICATIONS
Cellular and Cordless phones supplied by 1 cell
Lithium-ion battery / 3 cells Ni-MH or Ni-Cd
battery.
PDA (Personal Digital Assistant), Smart phone.
Portable equipment.
Supply for RF devices for cellular phone.
APPLICATION NOTE
An external capacitor (C
OUT
= 1
F typical) with an
equivalent serial resistance (ESR) in the range
0.02 to 0.6
is used to ensure stability.
Figure 1 : Block Diagram
?
V
REF
?
?
LDO_59
OUT
IN
PWRDWN
Figure 2 : Typical Application Circuit
1
F
ESR
V
OUT
C
OUT
?
?
OUT
GND
?
?
V
IN
IN
Power Down Mode
OFF
ON
LDO_59
PWRDWN
LDO_59
This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
PRODUCT PREVIEW
LDO_59
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ELECTRICAL CHARACTERISTICS
3V < V
IN
< 5.5V, -30C < T < 125C, 0.8
F < C
OUT
< 1.2
F, 20m
< ESR < 0.6
, 100
A < I
LOAD
< 20mA.
Typical case : V
IN
= 4V, T = 25C, I
OUT
= 10mA.
Notes: 1. Above characteristics are given for 3V minimum input operating range voltage, but regulator is
operational with 2.7V minimum input voltage.
2. All parameters are guaranteed with 170mV min dropout voltage.
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Input Voltage Range (Note 1)
V
IN
3
5,5
V
Output Voltage
V
OUT
2,8
V
Output Voltage Accuracy
3
%
Output current
I
LOAD
20
mA
P
MOS
Output Resistance
R
ON
0,6
Dropout Voltage
V
DO
V
OUT
= 50mV,
I
LOAD
= 20mA
60
mV
(Note 2)
170
Quiescent current
I
Q
I
LOAD
= 100
A
50
70
A
I
LOAD
= 20mA
70
150
A
Power down mode quiescent
current
I
QPRWDWN
Power down active
100
nA
Power Supply Rejection Ratio
PSRR
DC to 10KHz
55
70
dB
f < 100KHz
40
50
Load Regulation
Ldr
6
9
mV
Line Regulation
Lir
I
LOAD
= 20mA,
V
OUT
= 2.8V
0,5
1
mV
Line Transient
Lirt
V
OUT
= 2.8V,
I
LOAD
= 20mA,
V
IN
= 300mV
t
RISE
= t
FALL
= 10
s
0,5
1
mV
Load Transient
Ldtr
V
OUT
= 2.8V
t
FALL
= t
RISE
= 10
s
0,3
1
mV
Recovery time
4
6
s
Output Noise Voltage
en
V
OUT
= 2.8V
100Hz < f < 1KHz
160
200
1KHz < f < 100KHz
60
Output decoupling capacitor
C
OUT
1
F
Settling time (from power down
to active mode)
V
OUT
= 2.8V,
C
OUT
= 1.2
F
20
50
s
Short Circuit Current Limit
I
SHORT
200
mA
nV
Hz
------------
LDO_59
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100
1000
10000
100000
50
55
60
65
70
Frequency (Hz)
PSRR
(
d
B)
TYPCIAL CHARACTERISTICS
Figure 5 : Load transient (rising edge)
Figure 6 : Load transient (falling edge)
Figure 7 : Settling time
Figure 8 : PSRR vs Frequency
(I
LOAD
= 20mA ; V
IN
min)
Figure 3 : Line transient (rising edge)
Figure 4 : Line transient (falling edge)
LDO_59
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
2002 STMicroelectronics - All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
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