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Электронный компонент: M27C1001-10B1X

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1/17
June 2002
M27C1001
1 Mbit (128Kb x8) UV EPROM and OTP EPROM
s
5V 10% SUPPLY VOLTAGE in READ
OPERATION
s
ACCESS TIME: 35ns
s
LOW POWER CONSUMPTION:
Active Current 30mA at 5Mhz
Standby Current 100A
s
PROGRAMMING VOLTAGE: 12.75V 0.25V
s
PROGRAMMING TIME: 100s/word
s
ELECTRONIC SIGNATURE
Manufacturer Code: 20h
Device Code: 05h
DESCRIPTION
The M27C1001 is a 1 Mbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It is ideally suited for micro-
processor systems requiring large programs and
is organized as 131,072 words of 8 bits.
The FDIP32W (window ceramic frit-seal package)
and the LCCC32W (leadless chip carrier package)
have a transparent lids which allow the user to ex-
pose the chip to ultraviolet light to erase the bit pat-
tern. A new pattern can then be written to the
device by following the programming procedure.
For applications where the content is programmed
only one time and erasure is not required, the
M27C1001 is offered in PDIP32, PLCC32 and
TSOP32 (8 x 20 mm) packages.
Figure 1. Logic Diagram
AI00710B
17
A0-A16
P
Q0-Q7
VPP
VCC
M27C1001
G
E
VSS
8
1
32
32
1
FDIP32W (F)
PDIP32 (B)
PLCC32 (C)
TSOP32 (N)
8 x 20 mm
LCCC32W (L)
M27C1001
2/17
Figure 2B. LCC Connections
AI00712
NC
A8
A10
Q5
17
A1
A0
Q0
Q1
Q2
Q3
Q4
A7
A4
A3
A2
A6
A5
9
P
A9
1
A16
A11
A13
A12
Q7
32
V
PP
V
CC
M27C1001
A15
A14
Q6
G
E
25
V
SS
Figure 2A. DIP Connections
A1
A0
Q0
A7
A4
A3
A2
A6
A5
A13
A10
A8
A9
Q7
A14
A11
G
E
Q5
Q1
Q2
Q3
VSS
Q4
Q6
NC
P
A16
A12
VPP
VCC
A15
AI00711
M27C1001
8
1
2
3
4
5
6
7
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Figure 2C. TSOP Connections
A1
A0
Q0
A7
A4
A3
A2
A6
A5
A13
A10
A8
A9
Q7
A14
A11
G
E
Q5
Q1
Q2
Q3
Q4
Q6
NC
P
A16
A12
VPP
VCC
A15
AI01151B
M27C1001
(Normal)
8
1
9
16
17
24
25
32
VSS
Table 1. Signal Names
A0-A16
Address Inputs
Q0-Q7
Data Outputs
E
Chip Enable
G
Output Enable
P
Program
V
PP
Program Supply
V
CC
Supply Voltage
V
SS
Ground
NC
Not Connected Internally
3/17
M27C1001
Table 2. Absolute Maximum Ratings
(1)
Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant qual-
ity documents.
2. Minimum DC voltage on Input or Output is 0.5V with possible undershoot to 2.0V for a period less than 20ns. Maximum DC
voltage on Output is V
CC
+0.5V with possible overshoot to V
CC
+2V for a period less than 20ns.
3. Depends on range.
Table 3. Operating Modes
Note: X = V
IH
or V
IL
, V
ID
= 12V 0.5V.
Table 4. Electronic Signature
Symbol
Parameter
Value
Unit
T
A
Ambient Operating Temperature
(3)
40 to 125
C
T
BIAS
Temperature Under Bias
50 to 125
C
T
STG
Storage Temperature
65 to 150
C
V
IO
(2)
Input or Output Voltage (except A9)
2 to 7
V
V
CC
Supply Voltage
2 to 7
V
V
A9
(2)
A9 Voltage
2 to 13.5
V
V
PP
Program Supply Voltage
2 to 14
V
Mode
E
G
P
A9
V
PP
Q7-Q0
Read
V
IL
V
IL
X
X
V
CC
or V
SS
Data Out
Output Disable
V
IL
V
IH
X
X
V
CC
or V
SS
Hi-Z
Program
V
IL
V
IH
V
IL
Pulse
X
V
PP
Data In
Verify
V
IL
V
IL
V
IH
X
V
PP
Data Out
Program Inhibit
V
IH
X
X
X
V
PP
Hi-Z
Standby
V
IH
X
X
X
V
CC
or V
SS
Hi-Z
Electronic Signature
V
IL
V
IL
V
IH
V
ID
V
CC
Codes
Identifier
A0
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
Hex Data
Manufacturer's Code
V
IL
0
0
1
0
0
0
0
0
20h
Device Code
V
IH
0
0
0
0
0
1
0
1
05h
M27C1001
4/17
DEVICE OPERATION
The operating modes of the M27C1001 are listed
in the Operating Modes table. A single power sup-
ply is required in the read mode. All inputs are TTL
levels except for V
PP
and 12V on A9 for Electronic
Signature.
Read Mode
The M27C1001 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, indepen-
dent of device selection. Assuming that the ad-
dresses are stable, the address access time
(t
AVQV
) is equal to the delay from E to output
(t
ELQV
). Data is available at the output after a delay
of t
GLQV
from the falling edge of G, assuming that
E has been low and the addresses have been sta-
ble for at least t
AVQV
-t
GLQV
.
Standby Mode
The M27C1001 has a standby mode which reduc-
es the supply current from 30mA to 100A. The
M27C1001 is placed in the standby mode by ap-
plying a CMOS high signal to the E input. When in
the standby mode, the outputs are in a high imped-
ance state, independent of the G input.
Table 5. AC Measurement Conditions
High Speed
Standard
Input Rise and Fall Times
10ns
20ns
Input Pulse Voltages
0 to 3V
0.4V to 2.4V
Input and Output Timing Ref. Voltages
1.5V
0.8V and 2V
Figure 3. AC Testing Input Output Waveform
AI01822
3V
High Speed
0V
1.5V
2.4V
Standard
0.4V
2.0V
0.8V
Figure 4. AC Testing Load Circuit
AI01823B
1.3V
OUT
CL
CL = 30pF for High Speed
CL = 100pF for Standard
CL includes JIG capacitance
3.3k
1N914
DEVICE
UNDER
TEST
Table 6. Capacitance
(1)
(T
A
= 25 C, f = 1 MHz)
Note: 1. Sampled only, not 100% tested.
Symbol
Parameter
Test Condition
Min
Max
Unit
C
IN
Input Capacitance
V
IN
= 0V
6
pF
C
OUT
Output Capacitance
V
OUT
= 0V
12
pF
5/17
M27C1001
Table 7. Read Mode DC Characteristics
(1)
(TA = 0 to 70C, 40 to 85C or 40 to 125C; V
CC
= 5V 5% or 5V 10%; V
PP
= V
CC
)
Note: 1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously or after V
PP
.
2. Maximum DC voltage on Output is V
CC
+0.5V.
Table 8A. Read Mode AC Characteristics
(1)
(TA = 0 to 70C, 40 to 85C or 40 to 125C; V
CC
= 5V 5% or 5V 10%; V
PP
= V
CC
)
Note: 1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously or after V
PP
.
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed AC measurement conditions.
Symbol
Parameter
Test Condition
Min
Max
Unit
I
LI
Input Leakage Current
0V
V
IN
V
CC
10
A
I
LO
Output Leakage Current
0V
V
OUT
V
CC
10
A
I
CC
Supply Current
E = V
IL
, G = V
IL
,
I
OUT
= 0mA, f = 5MHz
30
mA
I
CC1
Supply Current (Standby) TTL
E = V
IH
1
mA
I
CC2
Supply Current (Standby) CMOS
E > V
CC
0.2V
100
A
I
PP
Program Current
V
PP
= V
CC
10
A
V
IL
Input Low Voltage
0.3
0.8
V
V
IH
(2)
Input High Voltage
2
V
CC
+ 1
V
V
OL
Output Low Voltage
I
OL
= 2.1mA
0.4
V
V
OH
Output High Voltage TTL
I
OH
= 400A
2.4
V
Output High Voltage CMOS
I
OH
= 100A
V
CC
0.7V
V
Symbol
Alt
Parameter
Test Condition
M27C1001
Unit
-35
(3)
-45
-60
-70
Min
Max
Min
Max
Min
Max
Min
Max
t
AVQV
t
ACC
Address Valid to
Output Valid
E = V
IL
, G = V
IL
35
45
60
70
ns
t
ELQV
t
CE
Chip Enable Low to
Output Valid
G = V
IL
35
45
60
70
ns
t
GLQV
t
OE
Output Enable Low
to Output Valid
E = V
IL
25
25
30
35
ns
t
EHQZ
(2)
t
DF
Chip Enable High to
Output Hi-Z
G = V
IL
0
25
0
25
0
30
0
30
ns
t
GHQZ
(2)
t
DF
Output Enable High
to Output Hi-Z
E = V
IL
0
25
0
25
0
30
0
30
ns
t
AXQX
t
OH
Address Transition
to Output Transition
E = V
IL
, G = V
IL
0
0
0
0
ns
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, this product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.