M27C516
512 Kbit (32Kb x16) OTP EPROM
September 1998
1/12
5V
10% SUPPLY VOLTAGE in READ
OPERATION
FAST ACCESS TIME: 35ns
LOW POWER CONSUMPTION:
Active Current 30mA at 5MHz
Stand-by Current 100
A
PROGRAMMING VOLTAGE: 12.75V
0.25V
PROGRAMMING TIME: 100
s/word (typical)
ELECTRONIC SIGNATURE
Manufacturer Code: 0020h
Device Code: 000Fh
DESCRIPTION
The M27C516 is a 512 Kbit EPROM offered in the
OTP range (one time programmable). It is ideally
suited for microprocessor systems requiring large
data or program storage and is organized as
32,768 words of 16 bits.
The M27C516 is offered in a PLCC44 and TSOP40
(10 x 14mm) packages.
AI00932
15
A0-A14
P
Q0-Q15
VPP
VCC
M27C516
G
E
VSS
16
Figure 1. Logic Diagram
A0-A14
Address Inputs
Q0-Q15
Data Outputs
E
Chip Enable
G
Output Enable
P
Program Enable
V
CC
Supply Voltage
V
PP
Program Supply
V
SS
Ground
Table 1. Signal Names
PLCC44 (C)
TSOP40 (N)
10 x 14mm
Symbol
Parameter
Value
Unit
T
A
Ambient Operating Temperature
(3)
40 to 125
C
T
BIAS
Temperature Under Bias
50 to 125
C
T
STG
Storage Temperature
65 to 150
C
V
IO
(2)
Input or Output Voltages (except A9)
2 to 7
V
V
CC
Supply Voltage
2 to 7
V
V
A9
(2)
A9 Voltage
2 to 13.5
V
V
PP
Program Supply Voltage
2 to 14
V
Notes: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings"
may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not i mplied. Exposure to Absolute Maximum
Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other
relevant quality documents.
2. Minimum DC voltage on Input or Output is 0.5V with possible undershoot to 2.0V for a period less than 20ns. Maximum DC
voltage on Output is V
CC
+0.5V with possible overshoot to V
CC
+2V for a period less than 20ns.
3. Depends on range.
Table 2. Absolute Maximum Ratings
(1)
AI00934
A14
A11
A7
A3
23
Q6
Q5
Q4
Q3
Q2
NC
A2
Q12
Q8
VSS
NC
Q11
Q10
12
NC
A9
1
Q15
VSS
A12
Q13
A5
44
NC
NC
M27C516
Q14
A13
A4
NC
A6
34
Q1
Q9
A10
A8
Q7
Q0
G
A0
A1
V
PP
E
P
V
CC
Figure 2A. LCC Pin Connections
Warning: NC = Not Connected.
DQ6
DQ3
DQ2
DQ13
DQ8
DQ7
DQ10
DQ9
A14
A8
A11
A10
A4
NC
A9
G
A7
A2
DQ1
DQ0
A0
A1
A3
NC
P
E
DQ14
VPP
VCC
DQ15
AI01600
M27C516
(Normal)
10
1
11
20
21
30
31
40
VSS
A12
A6
A13
A5
DQ12
DQ4
DQ11
DQ5
VSS
Figure 2B. TSOP Pin Connections
Warning: NC = Not Connected.
2/12
M27C516
Mode
E
G
P
A9
V
PP
Q0 - Q15
Read
V
IL
V
IL
V
IH
X
V
CC
Data Out
Output Disable
V
IL
V
IH
X
X
V
CC
Hi-Z
Program
V
IL
X
V
IL
Pulse
X
V
PP
Data In
Verify
V
IL
V
IL
V
IH
X
V
PP
Data Out
Program Inhibit
V
IH
X
X
X
V
PP
Hi-Z
Standby
V
IH
X
X
X
V
CC
Hi-Z
Electronic Signature
V
IL
V
IL
V
IH
V
ID
V
CC
Codes
Notes: X = V
IH
or V
IL
, V
ID
= 12V
0.5V
Table 3. Operating Modes
Identifier
A0
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
Hex Data
Manufacturer's Code
V
IL
0
0
1
0
0
0
0
0
20h
Device Code
V
IH
0
0
0
0
1
1
1
1
0Fh
Note: Outputs Q8-Q15 are set to '0'.
Table 4. Electronic Signature
DEVICE OPERATION
The operating modes of the M27C516 are listed in
the Operating Modes table. A single power supply
is required in the read mode. All inputs are TTL
levels except for G and 12V on A9 for Electronic
Signature.
Read Mode
The M27C516 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, inde-
pendent of device selection. Assuming that the
addresses are stable, the address access time
(t
AVQV
) is equal to the delay from E to output(t
ELQV
).
Data is available at the output after a delay of t
GLQV
from the falling edge of G, assuming that E has
been low and the addresses have been stable for
at least t
AVQV
-t
GLQV
.
Standby Mode
The M27C516 has a standby mode which reduces
the supply current from 30mA to 100
A. The
M27C516 is placed in the standby mode by apply-
ing a CMOS high signal to the E input. When in the
standbymode, the outputs are in a high impedance
state, independent of the G input.
Two Line Output Control
Because OTP EPROMs are usually used in larger
memory arrays, the product featuresa 2 line control
function which accommodates the use of multiple
memory connection. The two line control function
allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
For the most efficient use of these two control lines,
E should be decoded and used as the primary
device selecting function, while G should be made
a common connection to all devices in the array
and connected to the READ line from the system
control bus. This ensures that all deselected mem-
ory devices are in their low power standby mode
and that the output pins are only active when data
is required from a particular memory device.
3/12
M27C516
AI02024B
1.3V
OUT
CL = 30pF or 60pF or 100pF
CL includes JIG capacitance
3.3k
1N914
DEVICE
UNDER
TEST
Figure 4. AC Testing Load Circuit
Symbol
Parameter
Test Condition
Min
Max
Unit
C
IN
Input Capacitance
V
IN
= 0V
6
pF
C
OUT
Output Capacitance
V
OUT
= 0V
12
pF
Notes. 1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously with or after V
PP
.
2. This parameter is sampled only and not tested 100%.
Table 6. Capacitance (T
A
= 25
C, f = 1 MHz )
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, I
CC
, has three seg-
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
capacitiveand inductiveloading of the device at the
output. The associated transient voltage peaks can
be suppressed by complying with the two line
output control and by properly selected decoupling
capacitors. It is recommended that a 1
F ceramic
capacitor be used on every device between V
CC
and V
SS
. This should be a high frequencycapacitor
of low inherent inductance and should be placed
as close to the device as possible. In addition, a
4.7
F bulk electrolytic capacitor should be used
between V
CC
and V
SS
for every eight devices. The
bulk capacitor should be located near the power
supplyconnection point.The purpose of the bulk
capacitor is to overcome the voltage drop caused
by the inductive effects of PCB traces.
AI01822
3V
High Speed
0V
1.5V
2.4V
Standard
0.4V
2.0V
0.8V
Figure 3. AC Testing Input Output Waveform
High Speed
Standard
Input Rise and Fall Times
10ns
20ns (10% to 90%)
Input Pulse Voltages
0 to 3V
0.4V to 2.4V
Input and Output Timing Ref. Voltages
1.5V
0.8V and 2V
Table 5. AC Measurement Conditions
4/12
M27C516
Symbol
Parameter
Test Condition
Min
Max
Unit
I
LI
Input Leakage Current
0V
V
IN
V
CC
1
A
I
LO
Output Leakage Current
0V
V
OUT
V
CC
5
A
I
CC
Supply Current
E = V
IL
, G = V
IL
, f = 5MHz
30
mA
I
CC1
Supply Current (Standby) TTL
E = V
IH
1
mA
I
CC2
Supply Current (Standby) CMOS
E > V
CC
0.3V
100
A
I
PP
Program Current
V
PP
= V
CC
10
A
V
IL
Input Low Voltage
0.3
0.8
V
V
IH
(2)
Input High Voltage
2
V
CC
+ 1
V
V
OL
Output Low Voltage
I
OL
= 2.1mA
0.4
V
V
OH
Output High Voltage TTL
I
OH
= 400
A
2.4
V
Output High Voltage CMOS
I
OH
= 100
A
V
CC
0.7V
V
Notes: 1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously or after V
PP
.
2. Maximum DC Voltage on Output is V
CC
+0.5V.
Table 7. Read Mode DC Characteristics
(1)
(T
A
= 0 to 70
C or 40 to 85
C; V
CC
= 5V
5% or 5V
10%; V
PP
= V
CC
)
Symbol
Alt
Parameter
Test Condition
M27C516
Unit
-35
(3)
-45
(3)
-55
(4)
Min
Max
Min
Max
Min
Max
t
AVQV
t
ACC
Address Valid to Output
Valid
E = V
IL
, G = V
IL
35
45
55
ns
t
ELQV
t
CE
Chip Enable Low to
Output Valid
G = V
IL
35
45
55
ns
t
GLQV
t
OE
Output Enable Low to
Output Valid
E = V
IL
18
23
25
ns
t
EHQZ
(2)
t
DF
Chip Enable High to
Output Hi-Z
G = V
IL
0
18
0
18
0
20
ns
t
GHQZ
(2)
t
DF
Output Enable High to
Output Hi-Z
E = V
IL
0
18
0
18
0
20
ns
t
AXQX
t
OH
Address Transition to
Output Transition
E = V
IL
, G = V
IL
0
0
0
ns
Notes: 1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously with or after V
PP.
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed measurement conditions and a load capacitance of 30pF.
4. Speed obtained with a load capacitance of 60pF.
Table 8A. Read Mode AC Characteristics
(1)
(T
A
= 0 to 70
C or 40 to 85
C; V
CC
= 5V
5% or 5V
10%; V
PP
= V
CC
)
5/12
M27C516
Programming
When delivered, all bits of the M27C516 are in the
'1' state. Data is introduced by selectively program-
ming '0's into the desired bit locations. Although
only '0's will be programmed, both '1's and '0's can
be present in the data word. The M27C516 is in the
programming mode when V
PP
input is at 12.75V,E
is at V
IL
and P is pulsed to V
IL
. The data to be
programmed is applied to 16 bits in parallel to the
data output pins. The evels required for the ad-
dress and data inputs are TTL. V
CC
is specified to
be 6.25V
0.25V.
AI00935B
tAXQX
tEHQZ
A0-A14
E
G
Q0-Q15
tAVQV
tGHQZ
tGLQV
tELQV
VALID
Hi-Z
VALID
Figure 5. Read Mode AC Waveforms
Symbol
Alt
Parameter
Test Condition
M27C516
Unit
-70
(3)
-85/-10
Min
Max
Min
Max
t
AVQV
t
ACC
Address Valid to Output Valid
E = V
IL
, G = V
IL
70
85
ns
t
ELQV
t
CE
Chip Enable Low to Output Valid
G = V
IL
70
85
ns
t
GLQV
t
OE
Output Enable Low to Output Valid
E = V
IL
35
35
ns
t
EHQZ
(2)
t
DF
Chip Enable High to Output Hi-Z
G = V
IL
0
20
0
30
ns
t
GHQZ
(2)
t
DF
Output Enable High to Output Hi-Z
E = V
IL
0
20
0
30
ns
t
AXQX
t
OH
Address Transition to
Output Transition
E = V
IL
, G = V
IL
0
0
ns
Notes: 1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously with or after V
PP.
2. Sampled only, not 100% tested.
3. Speed obtained with a load capacitance of 60pF
Table 8B. Read Mode AC Characteristics
(1)
(T
A
= 0 to 70
C or 40 to 85
C; V
CC
= 5V
5% or 5V
10%; V
PP
= V
CC
)
6/12
M27C516
Symbol
Parameter
Test Condition
Min
Max
Unit
I
LI
Input Leakage Current
V
IL
V
IN
V
IH
10
A
I
CC
Supply Current
50
mA
I
PP
Program Current
E = V
IL
50
mA
V
IL
Input Low Voltage
0.3
0.8
V
V
IH
Input High Voltage
2
V
CC
+ 0.5
V
V
OL
Output Low Voltage
I
OL
= 2.1mA
0.4
V
V
OH
Output High Voltage TTL
I
OH
= 400
A
2.4
V
V
ID
A9 Voltage
11.5
12.5
V
Note: 1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously or after V
PP
.
Table 9. Programming Mode DC Characteristics
(1)
(T
A
= 25
C; V
CC
= 6.25V
0.25V; V
PP
= 12.75V
0.25V)
Symbol
Alt
Parameter
Test Condition
Min
Max
Unit
t
AVPL
t
AS
Address Valid to Program Low
2
s
t
QVPL
t
DS
Input Valid to Program Low
2
s
t
VPHPL
t
VPS
V
PP
High to Program Low
2
s
t
VCHPL
t
VCS
V
CC
High to Program Low
2
s
t
ELPL
t
CES
Chip Enable Low to
Program Low
2
s
t
PLPH
t
PW
Program Pulse Width
95
105
s
t
PHQX
t
DH
Program High to Input
Transition
2
s
t
QXGL
t
OES
Input Transition to Output
Enable Low
2
s
t
GLQV
t
OE
Output Enable Low to
Output Valid
100
ns
t
GHQZ
(2)
t
DFP
Output Enable High to
Output Hi-Z
0
130
ns
t
GHAX
t
AH
Output Enable High to
Address Transition
0
s
Notes: 1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously or after V
PP
.
2. Sampled only and not 100% tested.
Table 10. Programming Mode AC Characteristics
(1)
(T
A
= 25
C; V
CC
= 6.25V
0.25V; V
PP
= 12.75V
0.25V)
7/12
M27C516
tAVPL
VALID
AI00936
A0-A14
Q0-Q15
VPP
VCC
P
G
DATA IN
DATA OUT
E
tQVPL
tVPHPL
tVCHPL
tPHQX
tPLPH
tGLQV
tQXGL
tELPL
tGHQZ
tGHAX
PROGRAM
VERIFY
Figure 6. Programming and Verify Modes AC Waveforms
AI00707C
n = 0
Last
Addr
VERIFY
P = 100
s Pulse
++n
= 25
++ Addr
VCC = 6.25V, VPP = 12.75V
FAIL
CHECK ALL WORDS
1st: VCC = 6V
2nd: VCC = 4.2V
YES
NO
YES
NO
YES
NO
Figure 7. Programming Flowchart
PRESTO II Programming Algorithm
PRESTO II Programming Algorithm allows to pro-
gram the whole array with a guaranteedmargin, in
a typical time of 3 seconds. Programming with
PRESTO II involves the application of a sequence
of 100
s programpulses to each byte until a correct
verify occurs (see Figure 7). During programming
and verify operation, a MARGIN MODE circuit is
automatically activated in order to guarantee that
each cell is programmed with enough margin. No
overprogram pulse is applied since the verify in
MARGIN MODE provides necessary margin to
each programmed cell.
Program Inhibit
Programming of multiple M27C516s in parallelwith
different data is also easily accomplished. Except
for E, all like inputs including G of the parallel
M27C516 may be common. A TTL low level pulse
applied to a M27C516's P input, with E low and V
PP
at 12.75V,will program that M27C516. A high level
E input inhibits the other M27C516s from being
programmed.
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determine that they were correctly
programmed. The verify is accomplished with E
and G at V
IL
, P at V
IH
, V
PP
at 12.75V and V
CC
at
6.25V.
8/12
M27C516
On-Board Programming
The M27C516 can be directly programmed in the
application circuit. See the relevant Application
Note AN620.
Electronic Signature
The Electronic Signature (ES) mode allows the
reading out of a binary code from an EPROM that
will identify its manufacturer and type. This mode
is intended for use by programming equipment to
automatically match the device to be programmed
with its correspondingprogramming algorithm. The
ES mode is functional in the 25
C
5
C ambient
temperature range that is required when program-
ming the M27C516. To activate the ES mode, the
programming equipmentmust force 11.5V to 12.5V
on address line A9 of the M27C516.
Two identifier bytes may then be sequenced from
the device outputs by toggling address line A0 from
V
IL
to V
IH
. All other address lines must be held at
V
IL
during Electronic Signature mode. Byte 0
(A0=V
IL
) represents the manufacturer code and
byte 1 (A0=V
IH
) the device identifier code. For the
STMicroelectronics M27C516, these two identifier
bytes are given in Table 4 and can be read-out on
outputs Q0 to Q7.
Speed
-35
(1)
35 ns
-45
(1)
45 ns
-55
(2)
55 ns
-70
(2)
70 ns
-85
85 ns
-10
100 ns
V
CC
Tolerance
blank
10%
X
5%
Package
C
PLCC44
N
TSOP40
10 x 14mm
Temperature Range
1
0 to 70
C
6
40 to 85
C
Option
TR Tape & Reel
Packing
Example:
M27C516
-70 X
N
1 TR
ORDERING INFORMATION SCHEME
Notes: 1. High Speed, see AC Characteristics section for further information.
2. Speed obtained with a load capacitance of 60pF.
For a list of availableoptions (Speed, Package, etc...) or for further information on any aspect of this device,
please contact the STMicroelectronics Sales Office nearest to you.
9/12
M27C516
PLCC44 - 44 lead Plastic Leaded Chip Carrier, square
PLCC
D
Ne
E1 E
1 N
D1
Nd
CP
B
D2/E2
e
B1
A1
A
R
0.51 (.020)
1.14 (.045)
F
A2
Symb
mm
inches
Typ
Min
Max
Typ
Min
Max
A
4.20
4.70
0.165
0.185
A1
2.29
3.04
0.090
0.120
A2
0.51
0.020
B
0.33
0.53
0.013
0.021
B1
0.66
0.81
0.026
0.032
D
17.40
17.65
0.685
0.695
D1
16.51
16.66
0.650
0.656
D2
14.99
16.00
0.590
0.630
E
17.40
17.65
0.685
0.695
E1
16.51
16.66
0.650
0.656
E2
14.99
16.00
0.590
0.630
e
1.27
0.050
F
0.00
0.25
0.000
0.010
R
0.89
0.035
N
44
44
CP
0.10
0.004
Drawing is not to scale
10/12
M27C516
TSOP40 - 40 lead Plastic Thin Small Outline, 10 x 14mm
TSOP-a
D1
E
1
N
CP
B
e
A2
A
N/2
D
DIE
C
L
A1
Symb
mm
inches
Typ
Min
Max
Typ
Min
Max
A
1.20
0.047
A1
0.05
0.15
0.002
0.006
A2
0.95
1.05
0.037
0.041
B
0.17
0.27
0.007
0.011
C
0.10
0.21
0.004
0.008
D
13.80
14.20
0.543
0.559
D1
12.30
12.50
0.484
0.492
E
9.90
10.10
0.390
0.398
e
0.50
0.020
L
0.50
0.70
0.020
0.028
0
5
0
5
N
40
40
CP
0.10
0.004
Drawing is not to scale
11/12
M27C516
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Spec ifications mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
1998 STMicroelectronics - All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
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12/12
M27C516
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