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Электронный компонент: M27C800-100

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1/18
December 2001
M27C800
8 Mbit (1Mb x8 or 512Kb x16) UV EPROM and OTP EPROM
s
5V 10% SUPPLY VOLTAGE in READ
OPERATION
s
ACCESS TIME: 50ns
s
BYTE-WIDE or WORD-WIDE
CONFIGURABLE
s
8 Mbit MASK ROM REPLACEMENT
s
LOW POWER CONSUMPTION
Active Current 70mA at 8MHz
Stand-by Current 50A
s
PROGRAMMING VOLTAGE: 12.5V 0.25V
s
PROGRAMMING TIME: 50s/word
s
ELECTRONIC SIGNATURE
Manufacturer Code: 20h
Device Code: B2h
DESCRIPTION
The M27C800 is an 8 Mbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It is ideally suited for micro-
processor systems requiring large data or program
storage. It is organised as either 1 Mwords of 8 bit
or 512 Kwords of 16 bit. The pin-out is compatible
with the most common 8 Mbit Mask ROM.
The FDIP42W (window ceramic frit-seal package)
has a transparent lid which allows the user to ex-
pose the chip to ultraviolet light to erase the bit pat-
tern.
A new pattern can then be written rapidly to the de-
vice by following the programming procedure.
For applications where the content is programmed
only one time and erasure is not required, the
M27C800 is offered in PDIP42, PLCC44 and
SO44 packages.
1
42
1
42
44
1
FDIP42W (F)
PDIP42 (B)
SO44 (M)
PLCC44 (K)
Figure 1. Logic Diagram
AI01593
19
A0-A18
BYTEVPP
Q0-Q14
VCC
M27C800
G
E
VSS
15
Q15A1
M27C800
2/18
Figure 2B. LCC Connections
AI02042
A11
A14
Q7
Q5
23
Q0
Q8
Q1
Q9
Q2
NC
Q12
A4
A0
E
VSS
A3
A2
12
A10
A16
1
A7
BYTEVPP
A13
A5
Q6
44
V
SS
A9
M27C800
A6
A12
Q13
VSS
Q14
34
Q10
A1
A15
Q15A1
G
Q3
Q11
V
CC
Q4
A18
A17
A8
NC
Figure 2A. DIP Connections
G
Q0
Q8
A3
A0
E
VSS
A2
A1
A13
VSS
A14
A15
Q7
A12
A16
BYTEVPP
Q15A1
Q5
Q2
Q3
VCC
Q11
Q4
Q14
A9
A8
A17
A4
A18
NC
A7
AI01594
M27C800
8
1
2
3
4
5
6
7
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
20
19
18
17
Q1
Q9
A6
A5
Q6
Q13
42
39
38
37
36
35
34
33
A11
A10
Q10
21
Q12
40
41
Figure 2C. SO Connections
G
Q0
Q8
A3
A0
E
VSS
A2
A1
A13
VSS
A14
A15
Q7
A12
A16
BYTEVPP
Q15A1
Q5
Q2
Q3
VCC
Q11
Q4
Q14
A9
NC
A18
A4
NC
NC
A7
AI01595
M27C800
8
2
3
4
5
6
7
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
20
19
18
17
Q1
Q9
A6
A5
Q6
Q13
44
39
38
37
36
35
34
33
A11
A10
Q10
21
Q12
40
43
1
42
41
A17
A8
Table 1. Signal Names
A0-A18
Address Inputs
Q0-Q7
Data Outputs
Q8-Q14
Data Outputs
Q15A1
Data Output / Address Input
E
Chip Enable
G
Output Enable
BYTEV
PP
Byte Mode / Program Supply
V
CC
Supply Voltage
V
SS
Ground
NC
Not Connected Internally
3/18
M27C800
Table 2. Absolute Maximum Ratings
(1)
Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant qual-
ity documents.
2. Minimum DC voltage on Input or Output is 0.5V with possible undershoot to 2.0V for a period less than 20ns. Maximum DC
voltage on Output is V
CC
+0.5V with possible overshoot to V
CC
+2V for a period less than 20ns.
3. Depends on range.
Table 3. Operating Modes
Note: X = V
IH
or V
IL
, V
ID
= 12V 0.5V.
Table 4. Electronic Signature
Symbol
Parameter
Value
Unit
T
A
Ambient Operating Temperature
(3)
40 to 125
C
T
BIAS
Temperature Under Bias
50 to 125
C
T
STG
Storage Temperature
65 to 150
C
V
IO
(2)
Input or Output Voltage (except A9)
2 to 7
V
V
CC
Supply Voltage
2 to 7
V
V
A9
(2)
A9 Voltage
2 to 13.5
V
V
PP
Program Supply Voltage
2 to 14
V
Mode
E
G
BYTEV
PP
A9
Q15A1
Q14-Q8
Q7-Q0
Read Word-wide
V
IL
V
IL
V
IH
X
Data Out
Data Out
Data Out
Read Byte-wide Upper
V
IL
V
IL
V
IL
X
V
IH
Hi-Z
Data Out
Read Byte-wide Lower
V
IL
V
IL
V
IL
X
V
IL
Hi-Z
Data Out
Output Disable
V
IL
V
IH
X
X
Hi-Z
Hi-Z
Hi-Z
Program
V
IL
Pulse
V
IH
V
PP
X
Data In
Data In
Data In
Verify
V
IH
V
IL
V
PP
X
Data Out
Data Out
Data Out
Program Inhibit
V
IH
V
IH
V
PP
X
Hi-Z
Hi-Z
Hi-Z
Standby
V
IH
X
X
X
Hi-Z
Hi-Z
Hi-Z
Electronic Signature
V
IL
V
IL
V
IH
V
ID
Code
Codes
Codes
Identifier
A0
Q15
and
Q7
Q14
and
Q6
Q13
and
Q5
Q12
and
Q4
Q11
and
Q3
Q10
and
Q2
Q9
and
Q1
Q8
and
Q0
Hex Data
Manufacturer's Code
V
IL
0
0
1
0
0
0
0
0
20h
Device Code
V
IH
1
0
1
1
0
0
1
0
B2h
M27C800
4/18
DEVICE OPERATION
The operating modes of the M27C800 are listed in
the Operating Modes Table. A single power supply
is required in the read mode. All inputs are TTL
compatible except for V
PP
and 12V on A9 for the
Electronic Signature.
Read Mode
The M27C800 has two organisations, Word-wide
and Byte-wide. The organisation is selected by the
signal level on the BYTEV
PP
pin. When BYTEV
PP
is at V
IH
the Word-wide organisation is selected
and the Q15A1 pin is used for Q15 Data Output.
When the BYTEV
PP
pin is at V
IL
the Byte-wide or-
ganisation is selected and the Q15A1 pin is used
for the Address Input A1. When the memory is
logically regarded as 16 bit wide, but read in the
Byte-wide organisation, then with A1 at V
IL
the
lower 8 bits of the 16 bit data are selected and with
A1 at V
IH
the upper 8 bits of the 16 bit data are
selected.
The M27C800 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. In addition the Word-wide or
Byte- wide organisation must be selected.
Chip Enable (E) is the power control and should be
used for device selection. Output Enable (G) is the
output control and should be used to gate data to
the output pins independent of device selection.
Assuming that the addresses are stable, the ad-
dress access time (t
AVQV
) is equal to the delay
from E to output (t
ELQV
). Data is available at the
output after a delay of t
GLQV
from the falling edge
of G, assuming that E has been low and the ad-
dresses have been stable for at least t
AVQV
-t
GLQV
.
Table 5. AC Measurement Conditions
High Speed
Standard
Input Rise and Fall Times
10ns
20ns
Input Pulse Voltages
0 to 3V
0.4V to 2.4V
Input and Output Timing Ref. Voltages
1.5V
0.8V and 2V
Figure 3. AC Testing Input Output Waveform
AI01822
3V
High Speed
0V
1.5V
2.4V
Standard
0.4V
2.0V
0.8V
Figure 4. AC Testing Load Circuit
AI01823B
1.3V
OUT
CL
CL = 30pF for High Speed
CL = 100pF for Standard
CL includes JIG capacitance
3.3k
1N914
DEVICE
UNDER
TEST
5/18
M27C800
Table 7. Read Mode DC Characteristics
(1)
(T
A
= 0 to 70 C or 40 to 85 C; V
CC
= 5V 5% or 5V 10%; V
PP
= V
CC
)
Note: 1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously or after V
PP
.
2. Maximum DC voltage on Output is V
CC
+ 0.5V.
Symbol
Parameter
Test Condition
Min
Max
Unit
I
LI
Input Leakage Current
0V
V
IN
V
CC
1
A
I
LO
Output Leakage Current
0V
V
OUT
V
CC
10
A
I
CC
Supply Current
E = V
IL
, G = V
IL
,
I
OUT
= 0mA, f = 8MHz
70
mA
E = V
IL
, G = V
IL
,
I
OUT
= 0mA, f = 5MHz
50
mA
I
CC1
Supply Current (Standby) TTL
E = V
IH
1
mA
I
CC2
Supply Current (Standby) CMOS
E > V
CC
0.2V
50
A
I
PP
Program Current
V
PP
= V
CC
10
A
V
IL
Input Low Voltage
0.3
0.8
V
V
IH
(2)
Input High Voltage
2
V
CC
+ 1
V
V
OL
Output Low Voltage
I
OL
= 2.1mA
0.4
V
V
OH
Output High Voltage TTL
I
OH
= 400A
2.4
V
Table 6. Capacitance
(1)
(T
A
= 25 C, f = 1 MHz)
Note: 1. Sampled only, not 100% tested.
Symbol
Parameter
Test Condition
Min
Max
Unit
C
IN
Input Capacitance (except BYTEV
PP
)
V
IN
= 0V
10
pF
Input Capacitance (BYTEV
PP
)
V
IN
= 0V
120
pF
C
OUT
Output Capacitance
V
OUT
= 0V
12
pF
Standby Mode
The M27C800 has a standby mode which reduces
the supply current from 50mA to 100A. The
M27C800 is placed in the standby mode by apply-
ing a CMOS high signal to the E input. When in the
standby mode, the outputs are in a high imped-
ance state, independent of the G input.