M28F201

2 Mb (256K x 8, Chip Erase) FLASH MEMORY

April 1997

1/21

AI00637C

A0-A17

DQ0-DQ7

VPP

VCC

M28F201

VSS

Figure 1. Logic Diagram

A0-A17

Address Inputs

DQ0-DQ7

Data Inputs / Outputs

Chip Enable

Output Enable

Write Enable

Program Supply

Supply Voltage

Ground

Table 1. Signal Names

PLCC32 (K)

TSOP32 (N)

8 x 20 mm

10% SUPPLY VOLTAGE

12V PROGRAMMING VOLTAGE
FAST ACCESS TIME: 70ns
BYTE PROGRAMMING TIME: 10

s typical

ELECTRICAL CHIP ERASE in 1s RANGE
LOW POWER CONSUMPTION

Active Current: 15mA typical
Stand-by Current: 10

A typical

10,000 PROGRAM/ERASE CYCLES
INTEGRATED ERASE/PROGRAM-STOP
TIMER
OTP COMPATIBLE PACKAGES and PINOUTS
ELECTRONIC SIGNATURE

Manufacturer Code: 20h
Device Code: F4h

DESCRIPTION
The M28F201 FLASH Memory product is a non-
volatile memories which may be erased electrically
at the chip level and programmed byte-by-byte. It
is organised as 256K bytes. It uses a command
register architecture to select the operating modes
and thus provide a simple microprocessor inter-
face. The M28F201 FLASH Memory product is
suitable for applications where the memory has to
be reprogrammed in the equipment. The access
time of 70ns makes the device suitable for use in
high speed microprocessor systems.

AI00638C

A17

A13

A10

DQ5

DQ0

DQ1

DQ2

DQ3

DQ4

A16

DQ7

A12

A14

M28F201

A15

A11

DQ6

Figure 2A. LCC Pin Connections

DQ0

A13

A10

DQ7

A14

A11

DQ5

DQ1

DQ2

DQ3

DQ4

DQ6

A17

A16

A12

VPP

VCC

A15

AI00639C

M28F201

(Normal)

VSS

Figure 2B. TSOP Pin Connections

DEVICE OPERATION

The M28F201 FLASH Memory product employs a
technology similar to a 2 Megabit EPROM but add
to the device functionality by providing electrical
erasure and programming. These functions are
managed by a command register. The functions
that are addressed via the command register de-
pend on the voltage applied to the V

, program

voltage, input. When V

is less than or equal to

6.5V, the command register is disabled and the
M28F201 functions as a read only memory provid-
ing operating modes similar to an EPROM (Read,
Output Disable, Electronic Signature Read and
Standby). When V

is raised to 12V the command

READ ONLY MODES, V

6.5V

For all Read Only Modes, except Standby Mode,
the Write Enable input W should be High. In the
Standby Mode this input is 'don't care'.

Read Mode. The M28F201 has two enable inputs,
E and G, both of which must be Low in order to
output data from the memory. The Chip Enable (E)
is the power control and should be used for device
selection. Output Enable (G) is the output control
and should be used to gate data on to the output,
independant of the device selection.

DQ0

A13

A10

DQ7

A14

A11

DQ5

DQ1

DQ2

DQ3

DQ4

DQ6

A17

A16

A12

VPP

VCC

A15

AI00640D

M28F201

(Reverse)

VSS

Figure 2C. TSOP Reverse Pin Connections

2/21

M28F201

Symbol

Parameter

Value

Unit

Ambient Operating Temperature

40 to 125

STG

Storage Temperature

65 to 150

Input or Output Voltages

0.6 to 7

Supply Voltage

0.6 to 7

A9 Voltage

0.6 to 13.5

Program Supply Voltage, during Erase
or Programming

0.6 to 14

Note: Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above
those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended
periods may affect device reliability. Refer also to the SGS-THOMSON SURE Program and other relevant quality documents.

Table 2. Absolute Maximum Ratings

Identifier

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

Hex Data

Manufacturer's Code

20h

Device Code

F4h

Table 4. Electronic Signature

Operation

DQ0 - DQ7

Read Only

PPL

Read

Data Output

Output Disable

Hi-Z

Standby

Hi-Z

Electronic Signature

Codes

Read/Write

(2)

PPH

Read

Data Output

Write

Pulse

Data Input

Output Disable

Hi-Z

Standby

Hi-Z

Notes: 1. X = V

or V

2. Refer also to the Command table.

Table 3. Operations

(1)

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M28F201

Command

Cycles

1st Cycle

2nd Cycle

Operation

A0-A17

DQ0-DQ7

Operation

A0-A17

DQ0-DQ7

Read

Write

00h

Electronic
Signature

(2)

Write

80h or 90h

Read

00000h

20h

Read

00001h

F4h

Setup Erase/

Write

20h

Erase

Write

20h

Erase Verify

Write

A0-A17

A0h

Read

Data Output

Setup Program/

Write

40h

Program

Write

A0-A17

Data Input

Program Verify

Write

C0h

Read

Data Output

Reset

Write

FFh

Write

FFh

Notes: 1. X = V

or V

2. Refer also to the Electronic Signature table.

Table 5. Commands

(1)

Standby Mode. In the Standby Mode the maxi-
mum supply current is reduced. The device is
placed in the Standby Mode by applying a High
level to the Chip Enable (E) input. When in the
Standby Mode the outputs are in a high impedance
state, independant of the Output Enable (G) input.

Output Disable Mode. When the Output Enable
(G) is High the outputs are in a high impedance
state.

Electronic Signature Mode. This mode allows the
read out of two binary codes from the device which
identify the manufacturer and device type. This
mode is intended for use by programming equip-
ment to automatically select the correct erase and
programming algorithms. The Electronic Signature
Mode is active when a high voltage (11.5V to 13V)
is applied to address line A9 with E and G Low. With
A0 Low the output data is the manufacturer code,
when A0 is High the output is the device code. All
other address lines should be maintained Low
while reading the codes. The electronic signature
can also be accessed in Read/Write modes.

READ/WRITE MODES, 11.4V

12.6V

When V

is High both read and write operations

may be performed. These are defined by the con-
tents of an internal command register. Commands
may be written to this register to set-up and exe-
cute, Erase, Erase Verify, Program, Program Verify
and Reset modes. Each of these modes needs 2
cycles. Each mode starts with a write operation to
set-up the command, this is followed by either read
or write operations. The device expects the first
cycle to be a write operation and does not corrupt

data at any location in the memory. Read mode is
set-up with one cycle only and may be followed by
any number of read operations to output data.
Electronic Signature Read mode is set-up with one
cycle and followed by a read cycle to output the
manufacturer or device codes.

Awrite to the command register is made by bringing
W Low while E is Low. The falling edge of W latches
Addresses, while the rising edge latches Data,
which are used for those commands that require
address inputs, command input or provide data
output. The supply voltage V

and the program

voltage V

can be applied in any order. When the

device is powered up or when V

6.5V the

contents of the command register defaults to 00h,
thus automatically setting-up Read operations. In
addition a specific command may be used to set
the command register to 00h for reading the mem-
ory. The system designer may chose to provide a
constant high V

and use the register commands

for all operations, or to switch the V

from low to

high only when needing to erase or program the
memory. All command register access is inhibited
when V

falls below the Erase/Write Lockout Volt-

age (V

LKO

) of 2.5V.

If the device is deselected during Erasure, Pro-
gramming or verifying it will draw active supply
currents until the operations are terminated.
The device is protected against stress caused by
long erase or program times. If the end of Erase or
Programming operations are not terminated by a
Verify cycle within a maximum time permitted, an
internal stop timer automatically stops the opera-
tion. The device remains in an inactive state, ready
to start a Verify or Reset Mode operation.

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M28F201

SRAM Interface Levels

EPROM Interface Levels

Input Rise and Fall Times

10ns

Input Pulse Voltages

0 to 3V

0.45V to 2.4V

Input and Output Timing Ref. Voltages

1.5V

0.8V and 2V

Table 6. AC Measurement Conditions

AI01275

SRAM Interface

1.5V

2.4V

EPROM Interface

0.45V

2.0V

0.8V

Figure 3. AC Testing Input Output Waveform

AI01276

1.3V

OUT

CL = 30pF or 100pF

CL = 30pF for SRAM Interface
CL = 100pF for EPROM Interface
CL includes JIG capacitance

3.3k

1N914

DEVICE

UNDER

TEST

Figure 4. AC Testing Load Circuit

Symbol

Parameter

Test Condition

Min

Max

Unit

Input Capacitance

= 0V

OUT

Output Capacitance

OUT

= 0V

Note: 1. Sampled only, not 100% tested.

Table 7. Capacitance

(1)

= 25

C, f = 1 MHz )

Read Mode. The Read Mode is the default at
power up or may be set-up by writing 00h to the
command register. Subsequent read operations
output data from the memory. The memory remains
in the Read Mode until a new command is written
to the command register.
Electronic Signature Mode. In order to select the
correct erase and programming algorithms for on-
board programming, the manufacturer and device

codes may be read directly. It is not neccessary to
apply a high voltage to A9 when using the com-
mand register. The Electronic Signature Mode is
set-up by writing 80h or 90h to the command
register. The following read cycles, with address
inputs 00000h or 00001h, output the manufacturer
or device codes. The command is terminated by
writing another valid command to the command
register (for example Reset).

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M28F201

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