M54/74HCT160/161
M54/74HCT162/163
October 1993
SYNCHRONOUS PRESETTABLE 4-BIT COUNTER
B1R
(Plastic Package)
ORDER CODES :
M54HCTXXXF1R
M74HCTXXXM1R
M74HCTXXXB1R
M74HCTXXXC1R
F1R
(Ceramic Package)
M1R
(Micro Package)
C1R
(Chip Carrier)
PIN CONNECTIONS (top view)
NC =
No Inter-
nal Con-
DESCRIPTION
.
HIGH SPEED
f
MAX
= 50 MHz (TYP.) AT V
CC
= 5 V
.
LOW POWER DISSIPATION
I
CC
= 4
A (MAX.) AT 25
C
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
BALANCED PROPAGATION DELAYS
t
PLH
= t
PHL
.
SYMMETRICAL OUTPUT IMPEDANCE
I
OH
= I
OL
= 4 mA (MIN.)
.
COMPATIBLE WITH TTL OUTPUTS
V
IH
= 2V (MIN.); V
IL
= 0.8V (MAX.)
.
PIN AND FUNCTION COMPATIBLE
WITH 54/74LS160
163
M54/74HCT160 Decade, Asynchronous Clear
M54/74HCT161 Binary, Asynchronous Clear
M54/74HCT162 Decade, Synchronous Clear
M54/74HCT163 Binary, Synchronous Clear
The M54/74HCT160, 161, 162 and 163 are high
speed CMOS SYNCHRONOUS PRESETTABLE
COUNTERS fabricated with silicon gate C
2
MOS
technology. They have the same high speed oper-
ation similar to equivalent LSTTL while maintaining
the CMOS low power dissipation.
The M54/74HCT160/162 are BCD Decade counter-
s and the M54/74HCT161/163 are 4 bit binary
counters. The CLOCK input is active on the rising
edge. Both LOAD and CLEAR inputs are active
Low.
Presetting of all four IC's is synchronous on the ris-
ing edge of the CLOCK. The function on the
M54/74HCT162/163 is synchronous to CLOCK,
while the M54/74HCT160/161 counters are cleared
asynchronously. Two enable inputs (TE and PE)
and CARRY output are provided to enable easy cas-
cading of counters, which facilities easy implemen-
tation of N-bit counters without using external gates.
This integrated circuit has input and output charac-
teristics that are fully compatible with 54/74 LSTTL
logic families. M54/74HCT devices are designed to
directly interface HSC
2
MOS systems with TTL and
NMOS components. They are also plug in replace-
ments for LSTTL devices giving a reduction of
power consumption. All inputs are equipped with
1/16
INPUT AND OUTPUT EQUIVALENT CIRCUIT
IEC LOGIC SYMBOL (HCT161)
IEC LOGIC SYMBOL (HCT160)
IEC LOGIC SYMBOL (HCT162)
IEC LOGIC SYMBOL (HCT163)
PIN DESCRIPTION
PIN No
SYMBOL
NAME AND FUNCTION
1
CLEAR
Master Reset
2
CLOCK
Clock Input (LOW to
HIGH, Edge-triggered)
3, 4, 5, 6
A, B, C, D
Data Inputs
7
ENABLE P
Count Enable Input
10
ENABLET
Count Enable Carry Input
9
LOAD
Parallel Enable Input
14, 13, 12,
11
QA to QD
Flip Flop Outputs
15
CARRY
OUTPUT
Terminal Count Output
8
GND
Ground (0V)
16
V
CC
Positive Supply Voltage
M54/M74HCT160/161/162/163
2/16
TRUTH TABLE
M54/74HCT160/161
M54/74HCT162/163
OUTPUTS
FUNCTION
INPUTS
INPUTS
CLR
LD
PE
TE
CK
CLR
LD
PE
TE
CK
QA
QB
QC
QD
L
X
X
X
X
L
X
X
X
L
L
L
L
RESET TO "0"
H
L
X
X
H
L
X
X
A
B
C
D
PRESET DATA
H
H
X
L
H
H
X
L
NO CHANGE
NO COUNT
H
H
L
X
H
H
L
X
NO CHANGE
NO COUNT
H
H
H
H
H
H
H
H
COUNT UP
COUNT
H
X
X
X
X
X
X
X
NO CHANGE
NO COUNT
Note:
X
: Don't Care
A, B, C, D : Logi level of data inputs
Carry
: CARRY = TE
Q
A
Q
B
Q
C
Q
D
............ (M54/74HCT160/162)
: CARRY = TE
Q
A
Q
B
Q
C
Q
D
............ (M54/74HCT161/163)
TIMING CHART (HCT160/162 : decade counter)
M54/M74HCT160/161/162/163
3/16
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