1/8
June 2003
STS1NK60Z
N-CHANNEL 600V - 13
- 0.25A - SO-8
Zener-Protected SuperMESHTM Power MOSFET
TYPICAL R
DS
(on) = 13
EXTREMELY HIGH dv/dt CAPABILITY
ESD IMPROVED CAPABILITY
100% AVALANCHE TESTED
NEW HIGH VOLTAGE BENCHMARK
GATE CHARGE MINIMIZED
DESCRIPTION
The SuperMESHTM series is obtained through an
extreme optimization of ST's well established strip-
based PowerMESHTM layout. In addition to pushing
on-resistance significantly down, special care is tak-
en to ensure a very good dv/dt capability for the
most demanding applications. Such series comple-
ments ST full range of high voltage MOSFETs in-
cluding revolutionary MDmeshTM products.
APPLICATIONS
AC ADAPTORS AND BATTERY CHARGERS
SWITH MODE POWER SUPPLIES (SMPS)
ORDERING INFORMATION
TYPE
V
DSS
R
DS(on)
I
D
Pw
STS1NK60Z
600 V
< 15
0.25 A
2 W
SALES TYPE
MARKING
PACKAGE
PACKAGING
STS1NK60Z
S1NK60Z
SO-8
TAPE & REEL
SO-8
INTERNAL SCHEMATIC DIAGRAM
STS1NK60Z
2/8
ABSOLUTE MAXIMUM RATINGS
( ) Pulse width limited by safe operating area
(1) I
SD
0.3A, di/dt
200A/s, V
DD
V
(BR)DSS
, T
j
T
JMAX.
THERMAL DATA
GATE-SOURCE ZENER DIODE
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the
usage of external components.
Symbol
Parameter
Value
Unit
V
DS
Drain-source Voltage (V
GS
= 0)
600
V
V
DGR
Drain-gate Voltage (R
GS
= 20 k
)
600
V
V
GS
Gate- source Voltage
30
V
I
D
Drain Current (continuous) at T
C
= 25C
0.25
A
I
D
Drain Current (continuous) at T
C
= 100C
0.16
A
I
DM
( )
Drain Current (pulsed)
1
A
P
TOT
Total Dissipation at T
C
= 25C
2
W
Derating Factor
0.016
W/C
V
ESD(G-S)
Gate source ESD(HBM-C=100pF, R=1.5K
)
800
V
dv/dt (1)
Peak Diode Recovery voltage slope
4.5
V/ns
T
j
T
stg
Operating Junction Temperature
Storage Temperature
-55 to 150
-55 to 150
C
C
Rthj-amb
Thermal Resistance Junction-ambient Max
62.5
C/W
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
BV
GSO
Gate-Source Breakdown
Voltage
Igs= 1mA (Open Drain)
30
V
3/8
STS1NK60Z
ELECTRICAL CHARACTERISTICS (T
CASE
=25C UNLESS OTHERWISE SPECIFIED)
ON/OFF
DYNAMIC
SWITCHING ON
SWITCHING OFF
SOURCE DRAIN DIODE
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
increases from 0 to 80%
V
DSS
.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
I
D
= 1 mA, V
GS
= 0
600
V
I
DSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating, T
C
= 125 C
1
50
A
A
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
GS
= 20V
10
A
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 50 A
3
3.75
4.5
V
R
DS(on)
Static Drain-source On
Resistance
V
GS
= 10V, I
D
= 0.4 A
13
15
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
g
fs
(1)
Forward Transconductance
V
DS
= V
,
I
D
= 0.4 A
0.5
S
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
DS
= 25V, f = 1 MHz, V
GS
= 0
94
17.6
2.8
pF
pF
pF
C
oss eq.
(3)
Equivalent Output
Capacitance
V
GS
= 0V, V
DS
= 0V to 480V
11
pF
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
d(on)
t
r
Turn-on Delay Time
Rise Time
V
DD
= 300V, I
D
= 0.4 A
R
G
= 4.7
V
GS
= 10 V
(Resistive Load see, Figure 3)
5.5
5
ns
ns
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 480V, I
D
= 0.8 A,
V
GS
= 10V
4.9
1
2.7
6.9
nC
nC
nC
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
d(off)
t
f
Turn-off Delay Time
Fall Time
V
DD
= 300V, I
D
= 0.4A
R
G
= 4.7
V
GS
= 10 V
(Resistive Load see, Figure 3)
13
28
ns
ns
t
r(Voff)
t
f
t
c
Off-voltage Rise Time
Fall Time
Cross-over Time
V
DD
=480V, I
D
= 0.8A,
R
G
= 4.7
,
V
GS
= 10V
(Inductive Load see, Figure 5)
28
12.5
48
ns
ns
ns
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
I
SD
I
SDM
(2)
Source-drain Current
Source-drain Current (pulsed)
0.25
1
A
A
V
SD
(1)
Forward On Voltage
I
SD
= 0.25A, V
GS
= 0
1.6
V
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 0.8 A, di/dt = 100A/s
V
DD
= 20V, T
j
= 150C
(see test circuit, Figure 5)
140
224
3.2
ns
nC
A
STS1NK60Z
4/8
Static Drain-source On Resistance
Thermal Impedance
Safe Operating Area
Transfer Characteristics
Output Characteristics
Transconductance
5/8
STS1NK60Z
Source-drain Diode Forward Characteristics
Normalized On Resistance vs Temperature
Gate Charge vs Gate-source Voltage
Capacitance Variations
Normalized Gate Threshold Voltage vs Temp.
Normalized BVDSS vs Temperature
STS1NK60Z
6/8
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
7/8
STS1NK60Z
DIM.
mm
inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
1.75
0.068
a1
0.1
0.25
0.003
0.009
a2
1.65
0.064
a3
0.65
0.85
0.025
0.033
b
0.35
0.48
0.013
0.018
b1
0.19
0.25
0.007
0.010
C
0.25
0.5
0.010
0.019
c1
45 (typ.)
D
4.8
5.0
0.188
0.196
E
5.8
6.2
0.228
0.244
e
1.27
0.050
e3
3.81
0.150
F
3.8
4.0
0.14
0.157
L
0.4
1.27
0.015
0.050
M
0.6
0.023
S
8 (max.)
0016023
SO-8 MECHANICAL DATA
STS1NK60Z
8/8
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
2003 STMicroelectronics - Printed in Italy - All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco
Singapore - Spain - Sweden - Switzerland - United Kingdom - United States.
http://www.st.com
PDF 
ZIP