1/30

ST7538

September 2003

HALF DUPLEX FREQUENCY SHIFT KEYING
(FSK) TRANSCEIVER

INTEGRATED POWER LINE DRIVER WITH
PROGRAMMABLE VOLTAGE AND CURRENT
CONTROL

PROGRAMMABLE INTERFACE:
SYNCHRONOUS
ASYNCHRONOUS

SINGLE SUPPLY VOLTAGE (FROM 7.5 UP TO 12.5V)

VERY LOW POWER CONSUMPTION (Iq=5 mA)

INTEGRATED 5V VOLTAGE REGULATOR
(UP TO 100mA) WITH SHORT CIRCUIT
PROTECTION

8 PROGRAMMABLE TRANSMISSION
FREQUENCIES

PROGRAMMABLE BAUD RATE UP TO 4800BPS

RECEIVING SENSITIVITY 1 mVRMS

SUITABLE TO APPLICATION IN ACCORDANCE
WITH EN 50065 CENELEC SPECIFICATIONS

CARRIER OR PREAMBLE DETECTION

BAND IN USE DETECTION

PROGRAMMABLE REGISTER WITH
SECURITY CHECKSUM

MAINS ZERO CROSSING DETECTION AND
SYNCHRONIZATION

WATCHDOG TIMER

DESCRIPTION

The ST7538 is a Half Duplex synchronous/asyn-
chronous FSK Modem designed for power line
communication network applications. It operates
from a single supply voltage and integrates a line
driver and a 5V linear regulator. The device oper-
ation is controlled by means of an internal register,
programmable through the synchronous serial in-
terface. Additional functions as watchdog, clock
output, output voltage and current control, pream-
ble detection, time-out, band in use are included.
Realized in Multipower BCDV technology that al-
lows to integrate DMOS, Bipolar and CMOS struc-
tures in the same chip.

TQFP44 Slug Down

ORDERING NUMBER: ST7538P

POWER LINE FSK TRANSCEIVER

BLOCK DIAGRAM

SERIAL

INTERFACE

CARRIER

DETECTION

PLL

CD/PD

RxD

CLR/T

REG/DATA

RxTx

TxD

REGOK

Vdc

PAVcc

ATOP2

ATOP1

ATO

Vsense

RAI

RxFo

TEST2 TEST3

TEST1

AVdd

DVdd

AVss

DVss

XOut

TOUT

RSTO

MCLK

ZCin

ZCout

C_OUT

CMINUS

CPLUS

XIn

DIGITAL

FILTER

FSK

DEMOD

FILTER

DAC

OSC

AGC

AMPL

TEST

ALC

OP-AMP

PLI

VREG

CURRENT
CONTROL

VOLTAGE

CONTROL

FSK

MODULATOR

TIME BASE

CONTROL

D03IN1407

ST7538

2/30

PIN CONNECTION (Top view)

PIN DESCRIPTION

N°

Name

Type

Description

CD_PD

Digital/Output

Carrier or Preamble Detect Output.
"1" No Carrier or Preamble Detected
"0" Carrier or Preamble Detected

DVss

Supply

Digital Ground

RxD

Digital/Output

RX Data Output.

RxTx

Digital/Input
with internal pull-up

Rx or Tx mode selection input.
"1" - RX Session
"0" - TX Session

TxD

Digital/Input
with internal pull-down

TX Data Input.

GND

Supply

Substrate Ground (same function as PIN 41)

TOUT

Digital/Output

TX Time Out Event Detection
"1" - Time Out Event Occurred
"0" - No Time-out Event Occurred

CLR/T

Digital/Output

Synchronous Mains Access Clock or
Control Register Access Clock

Digital/Output

Band in use Output.
"1" Signal within the Programmed Band
"0" No Signal within the Programmed Band

DVdd

Supply

Digital Supply Voltage

MCLK

Digital/Output

Master Clock Output

RSTO

Digital/Output

Power On or Watchdog Reset Output

TEST 3

Digital/Input
with internal pull-down

Test Input. Must be connected to DVss during Normal Operation

CD_PD

DVSS

RXD

RxTx

TXD

GND

TOUT

CLR/T

DVDD

MCLK

RSTO

TEST3

ZCOUT

ZCIN

N.C.

DVSS

ATOP1

PAVSS

ATOP2

PAVCC

N.C.

TEST1

REG_OK

C_MINUS

C_PLUS

N.C.

C_OUT

GND

REG_DATA

N.C.

ATO

SGND

XOUT

XIN

AVDD

VSENSE

TEST2

RXFO

RAI

VDC

D01IN1312

3/30

ST7538

Digital/Input
with internal pull-up

Watchdog input. The Internal Watchdog Counter is cleared on the
falling edges.

ZCOUT

Digital/Output

Zero Crossing Detection Output

ZCIN

Analog/Input

Zero Crossing AC Input.

Floating

Must be connected to DVss.

DVss

Supply

Digital Ground

ATOP1

Power/Output

Power Line Driver Output

PAVss

Supply

Power Analog Ground

ATOP2

Power/Output

Power Line Driver Output

PAV

Supply

Power Supply Voltage

Analog/Input

Current Limiting Feedback.
A resistor between CL and AVss sets the PLI Current Limiting Value

ATO

Analog/Output

Small Signal Analog Transmit Output

SGND

Supply

Analog Signal Ground

XOUT

Analog I/O

Crystal Output- External Clock Input

XIN

Analog Input

Crystal Oscillator Input

AVdd

Supply

Analog Power supply.

Vsense

Analog/Input

Output Voltage Sensing input for the voltage control loop

TEST2

Analog/Input

Test Input must be connected SGND

RxFO

Analog/Output

Receiving Filter Output

RAI

Analog/Input

Receiving Analog Input

VDC

Power

5V Voltage Regulator Output

floating

Must Be connected to DVss.

TEST1

Digital/Input
with internal pull-down

Test input. Must Be connected to DVss.

REGOK

Digital/Output

Security checksum logic output
"1" - Stored data Corrupted
"0" - Stored data OK

C_MINUS

Analog/Input

Op-amp Inverting Input.

C_PLUS

Analog/Input

Op-amp Not Inverting Input.

floating

Must Be connected to DVss

C_OUT

Analog/Output

Op-amp Output

GND

Supply

Substrate Ground (same function as PIN 6)

Digital/Output

Power Good logic Output
"1" - VDC is above 4.5V
"0" - VDC is below 4.25V

REG_DATA

Digital/Input
with internal pull-down

Mains or Control Register Access Selector
"1" - Control Register Access
"0" - Mains Access

floating

Must be connected to DVss.

<1>

If not used this pin must be connected to VDC

<2>

Cannot be left floating

<3>

Cannot be left floating

<4>

If not used this pin must be connected to VDC

<5>

If not used this pin must be tied low (SGND or PAVss or DVss)

PIN DESCRIPTION (continued)

N°

Name

Type

Description

ST7538

4/30

ABSOLUTE MAXIMUM RATINGS

THERMAL DATA

(*) Mounted on Multilayer PCB with a dissipating surface on the bottom side of the PCB
(**) It's the same condition of the point above, without any heatsinking surface on the board.

Symbol

Parameter

Value

Unit

PAV

Power Supply Voltage

-0.3 to +14

Analog Supply Voltage

-0.3 to +5.5

Digital Supply Voltage

-0.3 to +5.5

/DV

Voltage between AV

and DV

-0.3 to +0.3

Digital input Voltage

- 0.3 to DV

+0.3

Digital output Voltage

- 0.3 to DV

+0.3

Digital Output Current

-2 to +2

sense

Voltage Range at Vsense Input

- 0.3 to AV

+0.3

RAI

Voltage Range at RAI Input

-AV

- 0.3 to AV

+0.3

ATO

Output Current at ATO Output

-2 to +2

ATO

Voltage range at ATO Output

- 0.3 to AV

+0.3

ATOP1,2

Voltage range at Powered ATO Output

- 0.3 to +PAV

+0.3

ATOP

Powered ATO Output Current

400

mARms

amb

Operating ambient Temperature

-40 to +85

°C

stg

Storage Temperature

-50 to 150

°C

ATOP1 Pin

Maximum Withstanding Voltage Range
Test Condition: CDF-AEC-Q100-002- "Human Body Model"
Acceptance Criteria: "Normal Performance"

±1500

ATOP2 Pin

±1000

Other pins

±2000

Symbol

Parameter

TQFP44

with slug

Unit

th-j-amb1

Maximum Thermal Resistance Junction-Ambient Steady State(*)

C/W

th-j-amb2

Maximum Thermal Resistance Junction-Ambient Steady State(**)

C/W

5/30

ST7538

ELECTRICAL CHARACTERISTCS
(AVcc = DVcc = +5V, PAVcc =+9 V, PAVss, SGND = DVss = 0V,-40°C

Tamb

85°C, unless otherwise specified)

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

Supply Voltages

4.75

5.25

PAV

- DV

PAV

and DV

Relation

during Power-Up Sequence

< 4.75V

0.1

1.2

PAV

- AV

PAV

and DV

Relation

during Power-Up Sequence

< 4.75V

0.1

1.2

PAV

Power Supply Voltage

7.5

12.5

Max allowed slope during
Power-Up

V/ms

+ DI

Input Supply Current

Transmission & Receiving mode

I PAV

Powered Analog Supply
Current

TX mode (no load)

mArms

RX mode

500

1000

Maximum total current

370

mArms

Digital I/O

High Logic Level Input Voltage

Low Logic Level input Voltage

0.8

High Logic Level Output Voltage I

= -2mA

3.5

Low Logic Level Output Voltage I

= 2mA

0.4

Oscillator

IHX

XIN High Level Input Voltage

External Clock

ILX

XIN Low Level Input Voltage

External Clock

XTAL Clock Duty Cycle

External Clock

Xtal

Crystal Oscillator frequency

MHz

Tclock

Oscillator Period (1/Xtal)

62.5

Xtal

ESR

External Oscillator Esr
Resistance

Ohm

Xtal

External Oscillator Stabilization
Capacitance

Transmitter

IATOP

Output Transmitting Current in
programmable current limiting

Vsense connected though a
100pF cap to GND; Rcl=1.85k

;

LOAD

(as in fig. 13)

250

310

370

mArms

ATO

Max Carrier Output AC Voltage R

= 1.85k

Vsense=0V

1.75

2.3

3.5

ATODC

Output DC Voltage on ATO

1.7

2.1

2.5

HD2

ATO

Second Harmonic Distortion on
ATO

ATO

= 2V

; Fc=86KHz

-55

-42

HD3

ATO

Third Harmonic Distortion on
ATO

ATO

= 2V

; Fc=86KHz

-52

-49

ATOP(AC)

Max Carrier Output AC Voltage
for each ATOP1 and ATOP2
pins

= 1.85k

Vsense=0V

3.5

4.6

ATOP(DC)

Output DC Voltage on ATOP1
and ATOP2 pins

3.5

4.2

PAVcc

VAT OP A C

(

)

------------------------------------

7.5V

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