STD17N05L
STD17N06L
N - CHANNEL ENHANCEMENT MODE
LOW THRESHOLD POWER MOS TRANSISTOR
s
TYPICAL R
DS(on)
= 0.065
s
AVALANCHE RUGGED TECHNOLOGY
s
100% AVALANCHE TESTED
s
REPETITIVE AVALANCHE DATA AT 100
o
C
s
LOW GATE CHARGE
s
LOGIC LEVEL COMPATIBLE INPUT
s
175
o
C OPERATING TEMPERATURE
s
APPLICATION ORIENTED
CHARACTERIZATION
s
THROUGH-HOLE IPAK (TO-251) POWER
PACKAGE IN TUBE (SUFFIX "-1")
s
SURFACE-MOUNTING DPAK (TO-252)
POWER PACKAGE IN TAPE & REEL
(SUFFIX "T4")
APPLICATIONS
s
HIGH CURRENT, HIGH SPEED SWITCHING
s
SOLENOID AND RELAY DRIVERS
s
REGULATORS
s
DC-DC & DC-AC CONVERTERS
s
MOTOR CONTROL, AUDIO AMPLIFIERS
s
AUTOMOTIVE ENVIRONMENT (INJECTION,
ABS, AIR-BAG, LAMPDRIVERS, Etc.)
INTERNAL SCHEMATIC DIAGRAM
January 1995
TYPE
V
DSS
R
DS ( on)
I
D
STD17N05L
50 V
< 0.085
17 A
STD17N06L
60 V
< 0.085
17 A
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Val ue
Unit
STD17N05L
STD17N06L
V
D S
Drain-source Voltage (V
GS
= 0)
50
60
V
V
DG R
Drain- gate Voltage (R
GS
= 20 k
)
50
60
V
V
GS
Gate-source Voltage
15
V
I
D
Drain Current (cont inuous) at T
c
= 25
o
C
17
A
I
D
Drain Current (cont inuous) at T
c
= 100
o
C
12
A
I
D M
(
)
Drain Current (pulsed)
68
A
P
tot
Total Dissipation at T
c
= 25
o
C
55
W
Derating Factor
0.37
W/
o
C
T
stg
St orage Temperat ure
-65 to 175
o
C
T
j
Max. Operat ing Junction Temperature
175
o
C
(
) Pulse width limited by safe operating area
1
3
2
IPAK
TO-251
(Suffix "-1")
1
3
DPAK
TO-252
(Suffix "T4")
1/10
THERMAL DATA
R
thj-cas e
R
thj- amb
R
t hc- sin k
T
l
Thermal Resist ance Junct ion-case
Max
Thermal Resist ance Junct ion-ambient
Max
Thermal Resist ance Case-sink
Typ
Maximum Lead Temperature For Soldering Purpose
2.73
100
1.5
275
o
C/W
o
C/W
o
C/W
o
C
AVALANCHE CHARACTERISTICS
Symbol
Parameter
Max Value
Uni t
I
A R
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
j
max,
< 1%)
17
A
E
AS
Single Pulse Avalanche Energy
(st arting T
j
= 25
o
C, I
D
= I
AR
, V
D D
= 25 V)
60
mJ
E
AR
Repet itive Avalanche Energy
(pulse width limited by T
j
max,
< 1%)
15
mJ
I
A R
Avalanche Current, Repetitive or Not-Repetitive
(T
c
= 100
o
C, pulse width limited by T
j
max,
< 1%)
12
A
ELECTRICAL CHARACTERISTICS (T
case
= 25
o
C unless otherwise specified)
OFF
Symbol
Parameter
Test Condi tions
Mi n.
Typ.
Max.
Unit
V
( BR)DSS
Drain-source
Breakdown Voltage
I
D
= 250
A
V
G S
= 0
for STD17N05L
for STD17N06L
50
60
V
V
I
DS S
Zero Gate Volt age
Drain Current (V
GS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating x 0.8
T
c
= 125
o
C
250
1000
A
A
I
G SS
Gate-body Leakage
Current (V
D S
= 0)
V
GS
=
15 V
100
nA
ON (
)
Symbol
Parameter
Test Condi tions
Mi n.
Typ.
Max.
Unit
V
G S(th)
Gate Threshold Voltage V
DS
= V
GS
I
D
= 250
A
1
1.6
2.5
V
R
DS( on)
St atic Drain-source On
Resist ance
V
GS
= 5 V
I
D
= 8.5 A
V
GS
= 5 V
I
D
= 8. 5 A
T
c
= 100
o
C
0. 065
0.085
0. 17
I
D( on)
On St ate Drain Current
V
DS
> I
D( on)
x R
D S(on) max
V
GS
= 10 V
17
A
DYNAMIC
Symbol
Parameter
Test Condi tions
Mi n.
Typ.
Max.
Unit
g
fs
(
)
Forward
Transconductance
V
DS
> I
D( on)
x R
D S(on) max
I
D
= 8. 5 A
5
12
S
C
iss
C
oss
C
rss
I nput Capacitance
Output Capacit ance
Reverse Transfer
Capacitance
V
DS
= 25 V
f = 1 MHz
V
G S
= 0
700
250
70
1000
350
100
pF
pF
pF
STD17N05L/STD17N06L
2/10
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING RESISTIVE LOAD
Symbol
Parameter
Test Condi tions
Mi n.
Typ.
Max.
Unit
t
d(on)
t
r
Turn-on Time
Rise Time
V
DD
= 30 V
I
D
= 8. 5 A
R
GS
= 50
V
GS
= 5 V
(see test circuit, figure 3)
60
350
90
500
ns
ns
(di/dt)
on
Turn-on Current Slope
V
DD
= 40 V
I
D
= 17 A
R
GS
= 50
V
GS
= 5 V
(see test circuit, figure 5)
130
A/
s
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 40 V
I
D
= 17 A
V
GS
= 5 V
18
6
9
26
nC
nC
nC
SWITCHING INDUCTIVE LOAD
Symbol
Parameter
Test Condi tions
Mi n.
Typ.
Max.
Unit
t
r(Vof f)
t
f
t
c
Of f-voltage Rise Time
Fall Time
Cross-over Time
V
DD
= 40 V
I
D
= 17 A
R
GS
= 50
V
GS
= 5 V
(see test circuit, figure 5)
70
100
180
100
150
260
ns
ns
ns
SOURCE DRAIN DIODE
Symbol
Parameter
Test Condi tions
Mi n.
Typ.
Max.
Unit
I
S D
I
SD M
(
)
Source-drain Current
Source-drain Current
(pulsed)
17
68
A
A
V
S D
(
)
Forward On Volt age
I
SD
= 17 A
V
G S
= 0
1.5
V
t
rr
Q
rr
I
RRM
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
I
SD
= 17 A
di/dt = 100 A/
s
V
DD
= 30 V
T
j
= 150
o
C
(see test circuit, figure 5)
65
0.13
4
ns
C
A
(
) Pulsed: Pulse duration = 300
s, duty cycle 1.5 %
(
) Pulse width limited by safe operating area
Safe Operating Area
Thermal Impedance
STD17N05L/STD17N06L
3/10
Derating Curve
Transfer Characteristics
Static Drain-source On Resistance
Output Characteristics
Transconductance
Gate Charge vs Gate-source Voltage
STD17N05L/STD17N06L
4/10
Capacitance Variations
Normalized Gate Threshold Voltage vs
Temperature
Normalized On Resistance vs Temperature
Turn-on Current Slope
Cross-over Time
Turn-off Drain-source Voltage Slope
STD17N05L/STD17N06L
5/10
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