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Электронный компонент: STE101P

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Data Brief
For further information contact your local STMicroelectronics sales office.
February 2006
Rev 1
1/5
5
STE101P
10/100 Fast ethernet 3.3V transceiver
Feature summary
IEEE802.3u 100Base-TX and IEEE802.3
10Base-T transceiver
Support for IEEE802.3x flow control
MII /RMII / SMII interface
Auto MDIX supported
Provides Full-duplex operation on both
100Mbps and 10Mbps modes
Provides MLT-3 transceiver with DC
restoration for Base-line wander compensation
Provides loop-back modes for diagnostics
Supports external transformer with turn ratio
1.414:1 on Tx/Rx side.
Five LED display for operating mode and
functionaliity signalling
Operation from single 3.3V supply
High Cable ESD tolerance
Standard 64-pin QFP package pinout
Industrial temperature compliant
Self termination transceiver for external
components and power saving
Power dissipation < 200mW
Applications
Switches/Routers/Hubs
Nic adapters
Game consoles
VoIP gateways/phones
Network Printers
DTVs/DVD-Rs
Description
The STE101P is a high performance Fast
Ethernet physical layer interface for 10Base-T and
100Base-TX applications.
It was designed with advanced CMOS technology
to provide MII, RMII and SMII interfaces for easy
attachment to 10/100 Media Access Controllers
(MAC) and a physical media interface for
100Base-TX of IEEE802.3u and 10Base-T of
IEEE802.3.
The STE101P supports both half-duplex and full-
duplex operation at 10 and 100 Mbps operation.
Its operating mode can be set using auto-
negotiation, parallel detection or manual control. It
also allows for the support of auto-negotiation
functions for speed and duplex detection. The
Automatic MDI / MDIX feature compensates for
using a cross over cable. With Auto MDIX, the
STE101P automatically detects what is on the
other end of the network cable and switches the
TX & RX pins accordingly.
Order codes
TQFP64
(10x10x1.4mm)
Part number
Temp range,
C
Package
Packing
E-STE101P
(1)
(1) E-: ECOPACK (see
Chapter 2
)
-40 to 85
TQFP64 (14x14x1.4mm)
Tube
www.st.com
System diagram of the STE101P application
STE101P
2/5
1
System diagram of the STE101P application
Figure 1.
System diagram of the STE101P application
Boot ROM
25 MHz
Crystal
RJ-45
STE101P
Serial
EEPROM
LEDs
P
C
I
In
t
e
rfa
c
e
MA C
Device
Tr
a
n
s
f
o
r
m
e
r
STE101P
Package information
3/5
2 Package
information
In order to meet environmental requirements, ST offers these devices in ECOPACK
packages. These packages have a Lead-free second level interconnect. The category of
second Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
Figure 2.
TQFP64 (10 x 10 x 1.4mm) Mechanical Data & Package Dimensions
OUTLINE AND
MECHANICAL DATA
A
A2
A1
B
C
16
17
32
33
48
49
64
E3
D3
E1
E
D1
D
e
1
K
B
TQFP64
L
L1
Seating Plane
0.08mm
DIM.
mm
inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
1.60
0.063
A1
0.05
0.15
0.002
0.006
A2
1.35
1.40
1.45
0.053
0.055
0.057
B
0.17
0.22
0.27
0.0066 0.0086 0.0106
C
0.09
0.0035
D
11.80
12.00
12.20
0.464
0.472
0.480
D1
9.80
10.00
10.20
0.386
0.394
0.401
D3
7.50
0.295
e
0.50
0.0197
E
11.80
12.00
12.20
0.464
0.472
0.480
E1
9.80
10.00
10.20
0.386
0.394
0.401
E3
7.50
0.295
L
0.45
0.60
0.75
0.0177 0.0236 0.0295
L1
1.00
0.0393
K
0 (min.), 3.5 (min.), 7(max.)
ccc
0.080
0.0031
TQFP64 (10 x 10 x 1.4mm)
0051434 E
ccc
Revision history
STE101P
4/5
3 Revision
history
Table 1.
Document revision history
Date
Revision
Changes
10-Feb-2006
1
Initial release.
STE101P
5/5
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