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PRELIMINARY DATA
October 2003
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
Rev. 1.2
STM809, STM810
STM811, STM812
RESET CIRCUIT
FEATURES SUMMARY
s
PRECISION MONITORING OF 3V, 3.3V, and
5V SUPPLY VOLTAGES
s
TWO OUTPUT CONFIGURATIONS
Push-pull RST Output (STM809/811)
Push-pull RST Output (STM810/812)
s
140ms RESET PULSE WIDTH (MIN)
s
LOW SUPPLY CURRENT - 6A (TYP)
s
GUARANTEED RST/RST ASSERTION DOWN
TO V
CC
= 1.0V
s
OPERATING TEMPERATURE:
40C to 85C (Industrial Grade)
s
LEAD-FREE, SMALL SOT23 and SOT143
PACKAGE
Table 1. Device Options
Figure 1. Packages
Active-
Low
RESET
Active-
High
RESET
Manual
RESET
Input
Package
STM809
SOT23-3
STM810
SOT23-3
STM811
SOT143-4
STM812
SOT143-4
SOT23-3 (WX)
SOT143-4 (W1)
STM809/810/811/812
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TABLE OF CONTENTS
SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Figure 2. Logic Diagram (STM809/810) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Figure 3. Logic Diagram (STM811/812) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Table 2. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Figure 4. SOT23-3 Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Figure 5. SOT143-4 Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Figure 6. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 7. Hardware Hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Reset Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Push-Button Reset Input (STM811/812) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 8. /MR Timing Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Negative-Going V
CC
Transients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Valid /RST Output Down to V
CC
= 0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
TYPICAL OPERATING CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 9. Supply Current vs. Temperature, L/M/R/S/T (no load). . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 10. Power-down RESET Delay vs. Temperature - V
OD
= V
TH
V
CC
(L/M) . . . . . . . . . . . . . . 6
Figure 11. Power-down RESET Delay vs. Temperature - V
OD
= V
TH
V
CC
(R/S/T) . . . . . . . . . . . . 7
Figure 12. Power-up t
REC
vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 13. Normalized RESET Threshold vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 14. Max Transient Duration NOT Causing Reset Pulse vs. Reset Comparator Overdrive . . 8
Table 3. Marking Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 4. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
DC and AC PARAMETERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 5. Operating and AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 15. AC Testing Input/Output Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 6. DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 9. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
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STM809/810/811/812
SUMMARY DESCRIPTION
The STM809/810/811/812 MICROPROCESSOR
RESET Circuits are low-power supervisory devic-
es used to monitor power supplies. They perform
a single function: asserting a reset signal whenev-
er the V
CC
supply voltage drops below a preset
value and keeping it asserted until V
CC
has risen
above the preset threshold for a minimum period
of time (t
REC
). The STM811/812 also provide a
push-button reset input (MR).
Figure 2. Logic Diagram (STM809/810)
Note: 1. For STM810
Figure 3. Logic Diagram (STM811/812)
Note: 1. For STM812
Table 2. Signal Names
Note: 1. STM810/812 only
2. STM811/812 only
Figure 4. SOT23-3 Connections
Figure 5. SOT143-4 Connections
AI07832
V
CC
STM809/810
V
SS
RST (RST)
(1)
AI07831
V
CC
STM811/812
V
SS
RST (RST)
(1)
MR
V
SS
Ground
RST
Active-Low RESET Output
RST
(1)
Active-High RESET Output
V
CC
Supply Voltage
MR
(2)
Manual Reset Input
AI07833
2
3
1
RST (RST)
V
SS
(For STM810)
V
CC
AI07834
2
4
3
1
RST (RST)
V
SS
(For STM812)
V
CC
MR
STM809/810/811/812
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Figure 6. Block Diagram
Note: 1. STM811/812 only
2. RST for STM810/812
Figure 7. Hardware Hookup
Note: 1. STM809/811 only (RST for STM810/812)
2. STM811/812 only
AI07835
COMPARE
V
RST
V
CC
DEBOUNCE
t
REC
Generator
MR
(1)
RST
(2)
AI07836
V
CC
V
SS
V
CC
MCU
STM809/810/
811/812
RST
(1)
Push-button
RESET
V
CC
MR
(2)
V
SS
RESET
Input
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STM809/810/811/812
OPERATION
Reset Output
The STM809/810/811/812 MICROPROCESSOR
RESET CIRCUIT asserts a reset signal to the
MCU whenever V
CC
goes below the reset thresh-
old (V
RST
), or when the push-button reset input
(MR) is taken low. RST (active high for STM810/
812) is guaranteed valid down to V
CC
= 1V (0 to
70C).
During power-up, once V
CC
exceeds the reset
threshold an internal timer keeps RST low for the
reset time-out period, t
REC
. After this interval, RST
returns high.
If V
CC
drops below the reset threshold, RST goes
low. Each time RST is asserted, it stays low for at
least the reset time-out period. Any time V
CC
goes
below the reset threshold, the internal timer clears.
The reset timer starts when V
CC
returns above the
reset threshold. The active-low reset (RST) and
active-high reset (RST) both source and sink cur-
rent.
Push-Button Reset Input (STM811/812)
A logic low on MR asserts RST. RST remains as-
serted while MR is low, and for t
REC
after it returns
high. The MR input has an internal 20k
pull-up
resistor, allowing it to be left open if not used. This
input can be driven with TTL/CMOS-logic levels or
with open-drain/collector outputs. Connect a nor-
mally open push-button switch from MR to GND to
create a manual reset function; external debounce
circuitry is not required. If the device is used in a
noisy environment, connect a 0.1F capacitor
from MR to GND to provide additional noise immu-
nity.
Figure 8. /MR Timing Waveform
Note: 1. RST for STM810/812
Negative-Going V
CC
Transients
The STM809/810/811/812 are relatively immune
to negative-going V
CC
transients (glitches). Figure
14, page 8 shows typical transient duration versus
reset comparator overdrive (for which the
STM809/810/811/812 will NOT generate a reset
pulse). The graph was generated using a negative
pulse applied to V
CC
, starting at 0.5V above the
actual reset threshold and ending below it by the
magnitude indicated (comparator overdrive). The
graph indicates the maximum pulse width a nega-
tive V
CC
transient can have without causing a re-
set pulse. As the magnitude of the transient
increases (further below the threshold), the maxi-
mum allowable pulse width decreases. Any com-
bination of duration and overdrive which lies under
the curve will NOT generate a reset signal. Typi-
cally, a V
CC
transient that goes 100mV below the
reset threshold and lasts 20s or less will not
cause a reset pulse. A 0.1F bypass capacitor
mounted as close as possible to the V
CC
pin pro-
vides additional transient immunity.
Valid /RST Output Down to V
CC
= 0V
When V
CC
falls below 1V, the RST (STM809/811)
output no longer sinks current, but becomes an
open circuit. In most systems this is not a problem,
as most MCUs do not operate below 1V. However,
in applications where RST output must be valid
down to 0V, a pull-down resistor may be added to
hold the RST output low. This resistor must be
large enough to not load the RST output, and still
be small enough to pull the output to ground. A
100K
resistor is recommended.
Note: The same situation applies for the active-
high RST of the STM810/812. A 100K
pull-up re-
sistor to V
CC
should be used if RST must remain
valid for V
CC
< 1.0V.
AI07837
RST
(1)
MR
tMRD
tREC
tMR
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