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Электронный компонент: STP100NF04L

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February 2002
.
STP100NF04L
N-CHANNEL 40V - 0.0036
- 100A TO-220
STripFETTM II POWER MOSFET
s
TYPICAL R
DS
(on) = 0.0036
s
LOW THRESHOLD DRIVE
s
100% AVALANCHE TESTED
s
LOGIC LEVEL DEVICE
DESCRIPTION
This Power MOSFET is the latest development of
STMicroelectronis unique "Single Feature SizeTM"
strip-based process. The resulting transistor
shows extremely high packing density for low on-
resistance, rugged avalanche characteristics and
less critical alignment steps therefore a remark-
able manufacturing reproducibility.
APPLICATIONS
s
HIGH CURRENT, HIGH SWITCHING SPEED
s
MOTOR CONTROL, AUDIO AMPLIFIERS
s
DC-DC & DC-AC CONVERTERS
s
SOLENOID AND RELAY DRIVERS
TYPE
V
DSS
R
DS(on)
I
D
STP100NF04L
40 V
<0.0042
100 A
1
2
3
TO-220
ABSOLUTE MAXIMUM RATINGS
(
)
Pulse width limited by safe operating area.
(*) Current Limited by package
(1) I
SD
100A, di/dt
240A/s, V
DD
32V, T
j
T
JMAX
(2) Starting T
j
= 25
o
C, I
AR
= 50A, V
DD
= 30V
Symbol
Parameter
Value
Unit
V
DS
Drain-source Voltage (V
GS
= 0)
40
V
V
DGR
Drain-gate Voltage (R
GS
= 20 k
)
40
V
V
GS
Gate- source Voltage
16
V
I
D
(*)
Drain Current (continuos) at T
C
= 25C
100
A
I
D
Drain Current (continuos) at T
C
= 100C
70
A
I
DM
(
)
Drain Current (pulsed)
400
A
P
tot
Total Dissipation at T
C
= 25C
300
W
Derating Factor
2
W/C
dv/dt
(1)
Peak Diode Recovery voltage slope
3.6
V/ns
E
AS (2)
Single Pulse Avalanche Energy
1.4
J
T
stg
Storage Temperature
-65 to 175
C
T
j
Max. Operating Junction Temperature
175
C
INTERNAL SCHEMATIC DIAGRAM
STP100NF04L
2/8
THERMAL DATA
ELECTRICAL CHARACTERISTICS (T
case
= 25 C unless otherwise specified)
OFF
ON
(*)
DYNAMIC
Rthj-case
Rthj-amb
T
j
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Maximum Lead Temperature For Soldering Purpose
Max
Max
Typ
0.5
62.5
300
C/W
C/W
C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
I
D
= 250 A, V
GS
= 0
40
V
I
DSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating T
C
= 125C
1
10
A
A
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
GS
= 16 V
100
nA
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
I
D
= 250 A
1
V
R
DS(on)
Static Drain-source On
Resistance
V
GS
= 10 V
I
D
= 50 A
V
GS
= 4.5 V
I
D
= 50 A
0.0036
0.0040
0.0042
0.0065
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
g
fs (*)
Forward Transconductance
V
DS
= 15 V
I
D
= 20 A
50
S
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
DS
= 25V, f = 1 MHz, V
GS
= 0
6400
1300
190
pF
pF
pF
3/8
STP100NF04L
SWITCHING ON
SWITCHING OFF
SOURCE DRAIN DIODE
(*)
Pulsed: Pulse duration = 300 s, duty cycle 1.5 %.
(
)
Pulse width limited by safe operating area.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
d(on)
t
r
Turn-on Delay Time
Rise Time
V
DD
= 20 V
I
D
= 50 A
R
G
= 4.7
V
GS
= 4.5 V
(Resistive Load, Figure 3)
37
270
ns
ns
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 32V I
D
= 100A V
GS
= 4.5V
72
20
28.5
90
nC
nC
nC
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
d(off)
t
f
Turn-off Delay Time
Fall Time
V
DD
= 20 V
D
= 50 A
R
G
= 4.7
,
V
GS
= 4.5 V
(Resistive Load, Figure 3)
90
80
ns
ns
t
r(Voff)
t
f
t
c
Off-voltage Rise Time
Fall Time
Cross-over Time
V
clamp
= 32 V
I
D
= 100 A
R
G
= 4.7
,
V
GS
= 4.5 V
(Inductive Load, Figure 5)
85
125
160
ns
ns
ns
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
I
SD
I
SDM
(
)
Source-drain Current
Source-drain Current (pulsed)
100
400
A
A
V
SD
(*)
Forward On Voltage
I
SD
= 100A
V
GS
= 0
1.3
V
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 100 A
di/dt = 100A/s
V
DD
= 20 V
T
j
= 150C
(see test circuit, Figure 5)
88
240
5.5
ns
nC
A
ELECTRICAL CHARACTERISTICS (continued)
Thermal Impedance
Safe Operating Area
STP100NF04L
4/8
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
5/8
STP100NF04L
Normalized Gate Threshold Voltage vs Temperature
Normalized
on Resistance vs Temperature
Source-drain Diode Forward Characteristics
Normalized Breakdown Voltage Temperature
.
.
.
STP100NF04L
6/8
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive
Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
7/8
STP100NF04L
DIM.
mm
inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
4.40
4.60
0.173
0.181
C
1.23
1.32
0.048
0.051
D
2.40
2.72
0.094
0.107
D1
1.27
0.050
E
0.49
0.70
0.019
0.027
F
0.61
0.88
0.024
0.034
F1
1.14
1.70
0.044
0.067
F2
1.14
1.70
0.044
0.067
G
4.95
5.15
0.194
0.203
G1
2.4
2.7
0.094
0.106
H2
10.0
10.40
0.393
0.409
L2
16.4
0.645
L4
13.0
14.0
0.511
0.551
L5
2.65
2.95
0.104
0.116
L6
15.25
15.75
0.600
0.620
L7
6.2
6.6
0.244
0.260
L9
3.5
3.93
0.137
0.154
DIA.
3.75
3.85
0.147
0.151
L6
A
C
D
E
D1
F
G
L7
L2
Dia.
F1
L5
L4
H2
L9
F2
G1
TO-220 MECHANICAL DATA
P011C
STP100NF04L
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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