1/9
August 2003
STP20NM50FD
STB20NM50FD-1
N-CHANNEL 500V - 0.22
- 20A TO-220/I
2
PAK
FDmeshTM Power MOSFET (with FAST DIODE)
s
TYPICAL R
DS
(on) = 0.22
s
HIGH dv/dt AND AVALANCHE CAPABILITIES
s
100% AVALANCHE TESTED
s
LOW INPUT CAPACITANCE AND GATE CHARGE
s
LOW GATE INPUT RESISTANCE
s
TIGHT PROCESS CONTROL AND HIGH
MANUFACTURING YIELDS
DESCRIPTION
The FDmeshTM associates all advantages of reduced
on-resistance and fast switching with an intrinsic fast-
recovery body diode. It is therefore strongly recom-
mended for bridge topologies, in particular ZVS phase-
shift converters.
APPLICATIONS
s
ZVS PHASE-SHIFT FULL BRIDGE CONVERTERS
FOR SMPS AND WELDING EQUIPMENT
ORDERING INFORMATION
TYPE
V
DSS
R
DS(on)
R
ds(on)
*Q
g
I
D
STP20NM50FD
STB20NM50FD-1
500V
500V
<0.25
<0.25
8.36
*nC
8.36
*nC
20 A
20 A
SALES TYPE
MARKING
PACKAGE
PACKAGING
STP20NM50FD
P20NM50FD
TO-220
TUBE
STB20NM50FD-1
B20NM50FD-1
I
2
PAK
TUBE
TO-220
1
2
3
I
2
PAK
(Tabless TO-220)
1
2
3
INTERNAL SCHEMATIC DIAGRAM
STP20NM50FD/STB20NM50FD-1
2/9
ABSOLUTE MAXIMUM RATINGS
( ) Pulse width limited by safe operating area
(1) I
SD
20A, di/dt
200 A/s, V
DD
V
(BR)DSS
, T
j
T
JMAX.
THERMAL DATA
AVALANCHE CHARACTERISTICS
ELECTRICAL CHARACTERISTICS (TCASE = 25 C UNLESS OTHERWISE SPECIFIED)
ON/OFF
Symbol
Parameter
Value
Unit
V
DS
Drain-source Voltage (V
GS
= 0)
500
V
V
DGR
Drain-gate Voltage (R
GS
= 20 k
)
500
V
V
GS
Gate- source Voltage
30
V
I
D
Drain Current (continuous) at T
C
= 25C
20
A
I
D
Drain Current (continuous) at T
C
= 100C
14
A
I
DM
( )
Drain Current (pulsed)
80
A
P
TOT
Total Dissipation at T
C
= 25C
192
W
Derating Factor
1.2
W/C
dv/dt (1)
Peak Diode Recovery voltage slope
20
V/ns
T
stg
Storage Temperature
65 to 150
C
T
j
Max. Operating Junction Temperature
150
C
Rthj-case
Thermal Resistance Junction-case
Max
0.65
C/W
Rthj-amb
Thermal Resistance Junction-ambient
Max
62.5
C/W
T
l
Maximum Lead Temperature For Soldering Purpose
300
C
Symbol
Parameter
Max Value
Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
j
max)
10
A
E
AS
Single Pulse Avalanche Energy
(starting T
j
= 25 C, I
D
= I
AR
, V
DD
= 35 V)
700
mJ
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
I
D
= 250 A, V
GS
= 0
500
V
I
DSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
1
A
V
DS
= Max Rating, T
C
= 125 C
10
A
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
GS
= 30V
100
nA
V
GS(th
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250 A
3
4
5
V
R
DS(on)
Static Drain-source On
Resistance
V
GS
= 10V, I
D
= 10A
0.22
0.25
3/9
STP20NM50FD/STB20NM50FD-1
ELECTRICAL CHARACTERISTICS (CONTINUED)
DYNAMIC
(1) Pulsed: Pulse duration = 300 s, duty cycle 1.5 %.
(2) C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
increases from 0 to 80% V
DSS
.
SWITCHING ON
SWITCHING OFF
SOURCE DRAIN DIODE
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
g
fs
(1)
Forward Transconductance
V
DS
> I
D(on)
x R
DS(on)max,
I
D
= 10A
9
S
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
DS
= 25V, f = 1 MHz, V
GS
= 0
1380
290
40
pF
pF
pF
C
oss eq.
(2)
Equivalent Output
Capacitance
V
GS
= 0V, V
DS
= 0V to 400V
130
pF
R
g
Gate Input Resistance
f=1 MHz Gate DC Bias=0
Test Signal Level=20mV
Open Drain
2.8
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
d(on)
Turn-on Delay Time
V
DD
= 250V, I
D
= 10 A
R
G
= 4.7
V
GS
= 10V
(see test circuit, Figure 3)
22
ns
t
r
Rise Time
20
ns
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 400V, I
D
= 20A,
V
GS
= 10V
38
18
10
53
nC
nC
nC
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
r(Voff)
Off-voltage Rise Time
V
DD
= 400V, I
D
= 20 A,
R
G
= 4.7
,
V
GS
= 10V
(see test circuit, Figure 5)
6
ns
t
f
Fall Time
15
ns
t
c
Cross-over Time
30
ns
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
I
SD
Source-drain Current
20
A
I
SDM
(2)
Source-drain Current (pulsed)
80
A
V
SD
(1)
Forward On Voltage
I
SD
= 20 A, V
GS
= 0
1.5
V
t
rr
Reverse Recovery Time
I
SD
= 20 A, di/dt = 100A/s,
V
DD
= 60V, T
j
= 150C
(see test circuit, Figure 5)
245
ns
Q
rr
Reverse Recovery Charge
2
C
I
RRM
Reverse Recovery Current
16
A
STP20NM50FD/STB20NM50FD-1
4/9
Safe Operating Area For TO-220 / IPAK
Thermal Impedance For TO-220 / IPAK
Output Characteristics
Transconductance
Transfer Characteristics
Static Drain-source On Resistance
5/9
STP20NM50FD/STB20NM50FD-1
Capacitance Variations
Gate Charge vs Gate-source Voltage
Source-drain Diode Forward Characteristics
Normalized On Resistance vs Temperature
Normalized Gate Thereshold Voltage vs Temp.
STP20NM50FD/STB20NM50FD-1
6/9
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
7/9
STP20NM50FD/STB20NM50FD-1
DIM.
mm.
inch
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
4.40
4.60
0.173
0.181
b
0.61
0.88
0.024
0.034
b1
1.15
1.70
0.045
0.066
c
0.49
0.70
0.019
0.027
D
15.25
15.75
0.60
0.620
E
10
10.40
0.393
0.409
e
2.40
2.70
0.094
0.106
e1
4.95
5.15
0.194
0.202
F
1.23
1.32
0.048
0.052
H1
6.20
6.60
0.244
0.256
J1
2.40
2.72
0.094
0.107
L
13
14
0.511
0.551
L1
3.50
3.93
0.137
0.154
L20
16.40
0.645
L30
28.90
1.137
P
3.75
3.85
0.147
0.151
Q
2.65
2.95
0.104
0.116
TO-220 MECHANICAL DATA
STP20NM50FD/STB20NM50FD-1
8/9
DIM.
mm.
inch
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
4.40
4.60
0.173
0.181
A1
2.40
2.72
0.094
0.107
b
0.61
0.88
0.024
0.034
b1
1.14
1.70
0.044
0.066
c
0.49
0.70
0.019
0.027
c2
1.23
1.32
0.048
0.052
D
8.95
9.35
0.352
0.368
e
2.40
2.70
0.094
0.106
e1
4.95
5.15
0.194
0.202
E
10
10.40
0.393
0.410
L
13
14
0.511
0.551
L1
3.50
3.93
0.137
0.154
L2
1.27
1.40
0.050
0.055
TO-262 (I
2
PAK) MECHANICAL DATA
9/9
STP20NM50FD/STB20NM50FD-1
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
2003 STMicroelectronics - Printed in Italy - All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco
Singapore - Spain - Sweden - Switzerland - United Kingdom - United States.
http://www.st.com
PDF 
ZIP