ChipFind - документация

Электронный компонент: STSJ2NM60

Скачать:  PDF   ZIP
1/8
August 2002
STSJ2NM60
N-CHANNEL 600V - 2.8
- 2A PowerSO-8
Zener-Protected MDmeshTM POWER MOSFET
s
TYPICAL R
DS
(on) = 2.8
s
HIGH dv/dt AND AVALANCHE CAPABILITIES
s
IMPROVED ESD CAPABILITY
s
LOW INPUT CAPACITANCE AND GATE
CHARGE
s
LOW GATE INPUT RESISTANCE
s
TIGHT PROCESS CONTROL AND HIGH
MANUFACTORING YIELDS
DESCRIPTION
The MDmeshTM
is a new revolutionary MOSFET
technology that associates the Multiple Drain pro-
cess with the Company's PowerMESHTM horizontal
layout. The resulting product has an outstanding low
on-resistance, impressively high dv/dt and excellent
avalanche characteristics. The adoption of the
Company's proprietary strip technique yields overall
dynamic performance that is significantly better than
that of similar completition's products.
APPLICATIONS
The MDmeshTM family is very suitable for increase
the power density of high voltage converters allow-
ing system miniaturization and higher efficiencies.
ABSOLUTE MAXIMUM RATINGS
TYPE
V
DSS
R
DS(on)
I
D
STSJ2NM60
600 V
< 3.2
2 A
Symbol
Parameter
Value
Unit
V
DS
Drain-source Voltage (V
GS
= 0)
600
V
V
DGR
Drain-gate Voltage (R
GS
= 20 k
)
600
V
V
GS
Gate- source Voltage
30
V
I
D
Drain Current (continuous) at T
C
= 25C
Drain Current (continuous) at T
A
= 25C (1)
Drain Current (continuous) at T
C
= 100C
2
0.37
1.26
A
A
A
I
DM
(2)
Drain Current (pulsed)
8
A
P
TOT
P
TOT
Total Dissipation at T
C
= 25C
Total Dissipation at T
A
= 25C (1)
70
3
W
W
Derating Factor (1)
0.02
W/C
dv/dt (3)
Peak Diode Recovery voltage slope
15
V/ns
T
stg
Storage Temperature
65 to 150
C
T
j
Max. Operating Junction Temperature
PowerSO-8
INTERNAL SCHEMATIC DIAGRAM
DRAIN CONTACT ALSO ON THE BACKSIDE
STSJ2NM60
2/8
THERMAL DATA
ELECTRICAL CHARACTERISTICS (T
CASE
= 25 C UNLESS OTHERWISE SPECIFIED)
OFF
ON
(1)
DYNAMIC
Rthj-c
Thermal Resistance Junction-case Max
1.78
C/W
Rthj-amb
Thermal Resistance Junction-ambient Max (1)
42
C/W
T
j
Max. Operating Junction Temperature
150
C
T
stg
Storage Temperature
65 to 150
C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
I
D
= 1 mA, V
GS
= 0
600
V
I
DSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
1
A
V
DS
= Max Rating, T
C
= 125 C
10
A
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
GS
= 20V
5
A
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250A
3
4
5
V
R
DS(on)
Static Drain-source On
Resistance
V
GS
= 10 V, I
D
= 1 A
2.8
3.2
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
g
fs
(4)
Forward Transconductance
V
DS
> I
D(on)
x R
DS(on)max,
I
D
= 2 A
1.4
S
C
iss
Input Capacitance
V
DS
= 25 V, f = 1 MHz, V
GS
= 0
160
pF
C
oss
Output Capacitance
67
pF
C
rss
Reverse Transfer
Capacitance
4
pF
R
G
Gate Input Resistance
f=1 MHz Gate DC Bias = 0
Test Signal Level = 20mV
Open Drain
3.5
3/8
STSJ2NM60
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
SWITCHING OFF
SOURCE DRAIN DIODE
Note: 1. When mounted on 1inch FR4 Board, 2oz of Cu, t
10 sec.
2. Pulse width limited by safe operating area
3. I
SD
<3.3A, di/dt<400A/s, V
DD
<V
(BR)DSS
, T
J
<T
JMAX
4. Pulsed: Pulse duration = 400 s, duty cycle 1.5 %
GATE-SOURCE ZENER DIODE
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the
usage of external components.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
d(on)
Turn-on Delay Time
V
DD
= 300 V, I
D
= 1 A
R
G
= 4.7
V
GS
= 10 V
(see test circuit, Figure 3)
13
ns
t
r
Rise Time
8
ns
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 480 V, I
D
= 2 A,
V
GS
= 10 V
6
1.8
3.3
8.4
nC
nC
nC
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
r(Voff)
t
f
t
c
Off-Voltage Rise Time
Fall Time
Cross-Over Time
V
DD
= 480 V, I
D
= 2 A,
R
G
= 4.7
,
V
GS
= 10 V
(see test circuit, Figure 3)
12
25
30
ns
ns
ns
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
I
SD
Source-drain Current
2
A
I
SDM
(2)
Source-drain Current (pulsed)
8
A
V
SD
(4)
Forward On Voltage
I
SD
= 2 A, V
GS
= 0
1.5
V
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 2, di/dt = 100A/s,
V
DD
= 100 V, T
j
= 25C
(see test circuit, Figure 5)
516
516
2
ns
nC
A
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 2, di/dt = 100A/s,
V
DD
= 100 V, T
j
= 150C
(see test circuit, Figure 5)
808
890
2.2
ns
nC
A
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
BV
GSO
Gate-Source Breakdown
Voltage
Igs= 1mA (Open Drain)
30
V
STSJ2NM60
4/8
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Capacitance Variations
Gate Charge vs Gate-source Voltage
5/8
STSJ2NM60
Normalized BVDSS vs. Temperature
Normalized On Resistance vs Temperature
Normalized Gate Thereshold Voltage vs Temp.
Source-drain Diode Forward Characteristics