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July 2004
STW14NM50
N-CHANNEL 550V @ Tjmax - 0.32
- 14A TO-247
MDmeshTM MOSFET
Table 1: General Features
s
TYPICAL R
DS
(on) = 0.32
s
HIGH dv/dt AND AVALANCHE CAPABILITIES
s
100% AVALANCHE RATED
s
LOW INPUT CAPACITANCE AND GATE
CHARGE
s
LOW GATE INPUT RESISTANCE
s
TIGHT PROCESS CONTROL AND HIGH
MANUFACTORING YIELDS
DESCRIPTION
The MDmeshTM
is a new revolutionary MOSFET
technology that associates the Multiple Drain pro-
cess with the Company's PowerMESHTM horizon-
tal layout. The resulting product has an
outstanding low on-resistance, impressively high
dv/dt and excellent avalanche characteristics. The
adoption of the Company's proprierati strip tech-
nique yields overall dynamic performance that is
significantly better than that of similar completi-
tion's products.
APPLICATIONS
The MDmeshTM family is very suitablr for increase
the power density of high voltage converters allow-
ing system miniaturization and higher efficiencies.
Table 2: Order Codes
Figure 1: Package
Figure 2: Internal Schematic Diagram
TYPE
V
DSS
(
@
Tjmax)
R
DS(on)
I
D
STW14NM50
550 V
< 0.35
14 A
TO-247
SALES TYPE
MARKING
PACKAGE
PACKAGING
STW14NM50
W14NM50
TO-247
TUBE
Rev. 5
STW14NM50
2/9
Table 3: Absolute Maximum ratings
()Pulse width limited by safe operating area
(*)Limited only by maximum temperature allowed
(1)I
SD
14A, di/dt
100A/s, V
DD
V
(BR)DSS
, T
j
T
JMAX.
Table 4: Thermal Data
Table 5: Avalanche Characteristics
ELECTRICAL CHARACTERISTICS (T
CASE
=25C UNLESS OTHERWISE SPECIFIED)
Table 6: On /Off
Symbol
Parameter
Value
Unit
V
GS
Gate- source Voltage
30
V
I
D
Drain Current (continuous) at T
C
= 25C
14
A
I
D
Drain Current (continuous) at T
C
= 100C
8.8
A
I
DM
(1)
Drain Current (pulsed)
56
A
P
TOT
Total Dissipation at T
C
= 25C
175
W
Derating Factor
1.28
W/C
dv/dt
Peak Diode Recovery voltage slope
6
V/ns
T
stg
Storage Temperature
65 to 150
C
T
j
Max. Operating Junction Temperature
150
C
Rthj-case
Thermal Resistance Junction-case Max
0.715
C/W
Rthj-amb
Thermal Resistance Junction-ambient Max
30
C/W
T
l
Maximum Lead Temperature For Soldering Purpose
300
C
Symbol
Parameter
Max Value
Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
j
max)
12
A
E
AS
Single Pulse Avalanche Energy
(starting T
j
= 25 C, I
D
= I
AR
, V
DD
= 50 V)
400
mJ
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
(BR)DSS
Drain-source Breakdown
Voltage
I
D
= 250 A, V
GS
= 0
500
V
I
DSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating, T
C
= 125C
1
10
A
A
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
GS
= 30 V
100
nA
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250 A
3
4
5
V
R
DS(on
Static Drain-source On
Resistance
V
GS
= 10 V, I
D
= 6 A
0.32
0.35
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STW14NM50
ELECTRICAL CHARACTERISTICS (CONTINUED)
Table 7: Dynamic
Table 8: Source Drain Diode
(1) Pulsed: Pulse duration = 300 s, duty cycle 1.5 %.
(2) Pulse width limited by safe operating area.
(3) C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
increases from 0 to 80% V
DSS
.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
g
fs
(1)
Forward Transconductance
V
DS
> I
D(on)
x R
DS(on)max,
I
D
= 6A
5.2
S
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
DS
= 25 V, f = 1 MHz,
V
GS
= 0
1000
180
25
pF
pF
pF
C
OSS eq
(3)
.
Equivalent Output
Capacitance
V
GS
= 0 V, V
DS
= 0 to 400 V
90
pF
R
G
Gate Input Resistance
f=1 MHz Gate DC Bias = 0
Test Signal Level = 20mV
Open Drain
1.6
t
d(on)
t
r
t
d(off)
t
f
Turn-on Delay Time
Rise Time
Turn-off-Delay Time
Fall Time
V
DD
= 250 V, I
D
= 6 A,
R
G
= 4.7
,
V
GS
= 10 V
(see Figure 15)
20
10
19
8
ns
ns
ns
ns
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 400 V, I
D
= 12 A,
V
GS
= 10 V
(see Figure 18)
28
8
15
38
nC
nC
nC
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
I
SD
I
SDM
(2)
Source-drain Current
Source-drain Current (pulsed)
14
56
A
A
V
SD
(1)
Forward On Voltage
I
SD
= 12 A, V
GS
= 0
1.5
V
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 12 A, di/dt = 100 A/s
V
DD
= 100V
(see Figure 16)
270
2.23
16.5
ns
C
A
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 12 A, di/dt = 100 A/s
V
DD
= 100V, T
j
= 150C
(see Figure 16)
340
3
18
ns
C
A
STW14NM50
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Figure 3: Safe Operating Area
Figure 4: Output Characteristics
Figure 5: Transconductance
Figure 6: Thermal Impedance
Figure 7: Transfer Characteristics
Figure 8: Static Drain-source On Resistance
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STW14NM50
Figure 9: Gate Charge vs Gate-source Voltage
Figure 10: Normalized Gate Thereshold Volt-
age vs Temperature
Figure 11: Dource-Drain Diode Forward Char-
acteristics
Figure 12: Capacitance Variations
Figure 13: Normalized On Resistance vs Tem-
perature
STW14NM50
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Figure 14: Unclamped Inductive Load Test Cir-
cuit
Figure 15: Switching Times Test Circuit For
Resistive Load
Figure 16: Test Circuit For Inductive Load
Switching and Diode Recovery Times
Figure 17: Unclamped Inductive Wafeform
Figure 18: Gate Charge Test Circuit
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STW14NM50
DIM.
mm.
inch
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
4.85
5.15
0.19
0.20
A1
2.20
2.60
0.086
0.102
b
1.0
1.40
0.039
0.055
b1
2.0
2.40
0.079
0.094
b2
3.0
3.40
0.118
0.134
c
0.40
0.80
0.015
0.03
D
19.85
20.15
0.781
0.793
E
15.45
15.75
0.608
0.620
e
5.45
0.214
L
14.20
14.80
0.560
0.582
L1
3.70
4.30
0.14
0.17
L2
18.50
0.728
P
3.55
3.65
0.140
0.143
R
4.50
5.50
0.177
0.216
S
5.50
0.216
TO-247 MECHANICAL DATA
STW14NM50
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Table 9: Revision History
Date
Revision
Description of Changes
05-July-2004
5
The document change from "PRELIMINARY" to "COMPLETE".
New Stylesheet.
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STW14NM50
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