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October 2004
STW29NK50Z
N-CHANNEL 500 V - 0.105
- 31A TO-247
Zener-Protected SuperMESHTM MOSFET
Table 1: General Features
I
TYPICAL R
DS
(on) = 0.105
I
EXTREMELY HIGH dv/dt CAPABILITY
I
100% AVALANCHE TESTED
I
GATE CHARGE MINIMIZED
I
VERY LOW INTRINSIC CAPACITANCES
I
VERY GOOD MANUFACTURING
REPEATIBILITY
DESCRIPTION
The SuperMESHTM
series is obtained through an
extreme optimization of ST's well established
strip-based PowerMESHTM layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt capability
for the most demanding application. Such series
complements ST full range of high vltage MOS-
FETs including revolutionary MDmeshTM products.
APPLICATIONS
I
HIGH CURRENT, HIGH SPEED SWITCHING
I
IDEAL FOR OFF-LINE POWER SUPPLIES
I
WELDING MACHINES
I
LIGHTING
Table 2: Order Codes
Figure 1: Package
Figure 2: Internal Schematic Diagram
TYPE
V
DSS
R
DS(on)
I
D
P
W
STW29NK50Z
500 V
< 0.13
31 A
350 W
1
2
3
TO-247
PART NUMBER
MARKING
PACKAGE
PACKAGING
STW29NK50Z
W29NK50Z
TO-247
TUBE
Rev. 1
STW29NK50Z
2/10
Table 3: Absolute Maximum ratings
(*) Pulse width limited by safe operating area
(1) I
SD
31 A, di/dt
200 A/s, V
DD
V
(BR)DSS
, T
J
T
JMAX
Table 4: Thermal Data
Table 5: Avalanche Characteristics
Table 6: Gate-Source Zener Diode
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the
usage of external components.
Symbol
Parameter
Value
Unit
V
DS
Drain-source Voltage (V
GS
= 0)
500
V
V
DGR
Drain-gate Voltage (R
GS
= 20 K
)
500
V
V
GS
Gate- source Voltage
30
V
I
D
Drain Current (continuous) at T
C
= 25C 31
A
I
D
Drain Current (continuous) at T
C
= 100C
19.5
A
I
DM
(*)
Drain Current (pulsed)
124
A
P
TOT
Total Dissipation at T
C
= 25C
350
W
Derating Factor
2.77
W/C
V
ESD(G-S)
Gate source ESD (HBM-C = 100pF, R = 1.5 K
)
6000
V
dv/dt (1)
Peak Diode Recovery voltage slope
4.5
V/ns
T
stg
T
j
Storage Temperature
Operating Junction Temperature
-55 to 150
C
Rthj-case
Thermal Resistance Junction-case Max
0.36
C/W
Rthj-amb
T
l
Thermal Resistance Junction-ambient Max
Maximum Lead Temperature For Soldering Purpose
50
300
C/W
C
Symbol
Parameter
Max Value
Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
j
max)
31
A
E
AS
Single Pulse Avalanche Energy
(starting T
j
= 25 C, I
D
= I
AR
, V
DD
= 50 V)
550
mJ
Symbol
Parameter
Test Condition
Min.
Typ.
Max
Unit
BV
GSO
Gate-Source Breakdown
Voltage
Igs=
1mA (Open Drain)
30
A
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STW29NK50Z
TABLE 7: ELECTRICAL CHARACTERISTICS (T
CASE
=25C UNLESS OTHERWISE SPECIFIED)
On /Off
Table 8: Dynamic
Table 9: Source Drain Diode
(1) Pulsed: Pulse duration = 300 s, duty cycle 1.5 %.
(2) Pulse width limited by safe operating area.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
(BR)DSS
Drain-source Breakdown
Voltage
I
D
= 1 mA, V
GS
= 0
500
S
I
DSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating, T
C
= 125C
1
50
A
A
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
GS
= 20 V
10
A
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 150 A
3
3.75
4.5
V
R
DS(on)
Static Drain-source On
Resistance
V
GS
= 10 V, I
D
= 15.5 A
0.105
0.13
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
g
fs
(1)
Forward Transconductance
V
DS
= 15 V, I
D
= 15.5 A
24
S
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
DS
= 25 V, f = 1 MHz, V
GS
= 0
6110
697
166
pF
pF
pF
t
d(on)
t
r
t
d(off)
t
f
Turn-on Delay Time
Rise Time
Turn-off-Delay Time
Fall Time
V
DD
= 250 V, I
D
= 15 A,
R
G
= 4.7
,
V
GS
= 10 V
(Resistive Load see Figure 17)
44.5
41
129
33
ns
ns
ns
ns
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 400 V, I
D
= 30 A,
V
GS
= 10 V
190
35.5
111
266
nC
nC
nC
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
I
SD
I
SDM
(2)
Source-drain Current
Source-drain Current (pulsed)
31
124
A
A
V
SD
(1)
Forward On Voltage
I
SD
= 31 A, V
GS
= 0
1.6
V
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 30 A, di/dt = 100 A/s
V
DD
= 44.8V, T
j
= 25C
(see test circuit Figure 5)
436
6.1
28
ns
C
A
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 30 A, di/dt = 100 A/s
V
DD
= 44.8V, T
j
= 150C
(see test circuit Figure 5)
500
7.5
30
ns
C
A
STW29NK50Z
4/10
Figure 3: Safe Operating Area
Figure 4: Output Characteristics
Figure 5: Transconductance
Figure 6: Thermal Impedance
Figure 7: Transfer Characteristics
Figure 8: Static Drain-source On Resistance
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STW29NK50Z
Figure 9: Gate Charge vs Gate-source Voltage
Figure 10: Normalized Gate Thereshold Volt-
age vs Temperature
Figure 11: Dource-Drain Diode Forward Char-
acteristics
Figure 12: Capacitance Variations
Figure 13: Normalized On Resistance vs Tem-
perature
Figure 14: Normalized BV
DSS
vs Temperature
STW29NK50Z
6/10
Figure 15: Maximum Avalanche Energy vs
Temperature
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STW29NK50Z
Figure 16: Unclamped Inductive Load Test Cir-
cuit
Figure 17: Switching Times Test Circuit For
Resistive Load
Figure 18: Test Circuit For Inductive Load
Switching and Diode Recovery Times
Figure 19: Unclamped Inductive Wafeform
Figure 20: Gate Charge Test Circuit
STW29NK50Z
8/10
DIM.
mm.
inch
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
4.85
5.15
0.19
0.20
A1
2.20
2.60
0.086
0.102
b
1.0
1.40
0.039
0.055
b1
2.0
2.40
0.079
0.094
b2
3.0
3.40
0.118
0.134
c
0.40
0.80
0.015
0.03
D
19.85
20.15
0.781
0.793
E
15.45
15.75
0.608
0.620
e
5.45
0.214
L
14.20
14.80
0.560
0.582
L1
3.70
4.30
0.14
0.17
L2
18.50
0.728
P
3.55
3.65
0.140
0.143
R
4.50
5.50
0.177
0.216
S
5.50
0.216
TO-247 MECHANICAL DATA
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STW29NK50Z
Table 10: Revision History
Date
Revision
Description of Changes
19-Oct-2004
1
First Release.
STW29NK50Z
10/10
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