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Электронный компонент: TD310

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TD310
TRIPLE IGBT/MOS DRIVER
October 1997
IN B
1
2
3
4
5
6
7
9
10
11
12
13
14
CC
V
+
UVLO/S tdby
OUT A
IN A
OA output
8
15
16
IN C
Ena ble
Ala rm
OA input +
OUT B
OUT C
GND
Se ns e -
OA input -
Se ns e +
PIN CONNECTIONS
N
DIP16
(Plastic Package)
.
THREE POWER IGBT/MOS AND PULSE
TRANSFORMER DRIVERS
.
CURRENT SENSE COMPARATOR WITH 1ms
INHIBITION TIME FUNCTION
.
INSTANTANEOUS SIGNAL TRANSMISSION
.
0.6 Amp PER CHANNEL PEAK OUTPUT
CURRENT CAPABILITY
.
LOW OUTPUT IMPEDANCE TYP :
7
at 200mA
.
CMOS/LSTTL COMPATIBLE INVERTING
INPUT WITH HYSTERESIS
.
4V TO 16V SINGLE SUPPLY OPERATION
.
CURRENT AMPLIFIER
.
LOW BIAS CURRENT TYP : 1.5mA
.
ADJUSTABLE UNDERVOLTAGE
LOCKOUT LEVEL
.
STAND-BY MODE
.
DURING POWER UP NO RANDOM OUTPUT
STATE
.
ENHANCED LATCH-UP IMMUNITY
.
CHANNEL PARALLELING CAPABILITY
DESCRIPTION
The TD310 is designed to drive one, two or three
Power IGBT/MOS and has driving capability for
pulse transformer. So it is perfectly suited to inter-
face control IC with Power Switches in low side or
half-bridge configuration.
The typical application shown figure 1 implements
the TD310 in a pulse controlled half-bridge drive.
Positive and negative pulses are applied to the
pulse transformer to charge and discharge the
IGBT/MOS gate capacitance. More sophisticated
secondary circuits provide low impedance gate
drive and short-circuit protection as shown in appli-
cation note n
AN461.
On Figure 2, TD310 is implemented as a low side
driver in a typical 3 phase motor drive.
Figure 3 presents a general purpose low side gate
drive.
In both case, the current amplifier provides inter-
facing between a sense resistor and an A/D
converter.
D
SO16
(Plastic Micropackage)
ORDER CODES
Part Number
Temperature
Range
Package
N
D
TD310I
-40
o
C, +125
o
C
1/9
4 - Input C
7 - C urre nt
O utput
6 - Alarm
5 - E na b le
3 - Input B
2 - Input A
Co ntrol Un it
tsi
tAI
1 3 - Output C
1 1 - S e nse Input -
1 4 - Output B
1 5 - Output A
V
CC
1 2 - GND
10 - Curre nt Input -
8 - Cu rren t Input +
S tdb y
1 -
0 .7V
1 6 - UVLO/Std b y
1. 2V
9 - S e nse Input +
S tdb y
UVLO
BLOCK DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
18
V
V
i
Input Voltage
0 to V
CC
V
V
is
Sense Input Voltage
-0.3 to V
CC
V
T
j
Junction Temperature
-40 to 150
o
C
T
amb
Ambient Temperature
-40 to 125
o
C
OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
4 to 16
V
INSTRUCTIONS FOR USE
1 -
The TD310 supply voltage must be decoupled with a 1
F min. capacitor.
2 -
If the application involving TD310 requires maximum output current capability,
this current must be pulsed : pulse width 1
sec, duty cycle 1% at T
amb
.
TD310
2/9
ELECTRICAL CHARACTERISTICS
V
CC
= 15V, T
amb
= 25
o
C (unless otherwise specified)
Symbol
Parameter
Min.
Typ.
Max.
Unit
I
CC
Supply Current with Inputs in High State
1.5
2
mA
LOGIC INPUT (all inputs)
V
IH
High Input Voltage
2
V
V
IL
Low Input Voltage
0.8
V
I
IH
High Input Current
10
pA
I
IL
Low Input Current
10
pA
t
dH,
t
eH
t
dL,
t
eL
Propagation Delay (10% input to 10% output)
Output Rise
Output Fall
T
min.
T
amb
T
max.
200
60
400
400
ns
t
ii
Input Inhibiting Time
100
ns
t
dd
Differential Delay Time Between Channels
20
ns
OUTPUT DRIVERS
V
sod
Sourcing Drop Voltage (A/B/C outputs)
I
source
= 200mA
3
V
V
sid
Sinking Drop Voltage (A/B/C outputs)
I
sink
= 200mA
5
V
V
dem
Demagnetising Drop Voltage (A/B/C outputs)
I
demag.
= 100mA
2
V
R
opd
Output Pull Down Resistor
47
k
ALARM OUTPUT
I
s
Low Level Sinking Current
V
O
= 0.8V
5
35
mA
I
sh
High Level Sinking Current
1
A
t
A
Alarm Output : Delay Time to Alarm Fall if Sense Input Triggered
500
ns
SENSE INPUT
V
ios
Input Offset Voltage
20
mV
t
Ai
Inhibition Time if Sense Input Triggered
1
ms
t
s
Delay Time to Output Fall if Sense Input Triggered
All outputs inhibited
600
ns
t
si
Inhibition Time of Sense Input
300
ns
V
shys
Sense Hysteresis
40
mV
OPERATIONAL AMPLIFIER
V
icm
Common Mode Input Voltage Range
0 to V
CC
+
-1.5
V
V
io
Input Offset Voltage
10
mV
GBP
Gain Bandwidth Product
1
MHz
A
vd
Open Loop Gain
60
dB
SR
Slew Rate at Unity Gain
R
L
= 100k
, CL = 100pF, V
i
= 3 to 7V
0.6
V/
s
STAND-BY
V
stdby
Standby Mode Threshold Voltage
0.3
1.1
V
I
stdby
Standby Mode Supply Current
30
A
UNDER VOLTAGE LOCKOUT
I
adj
Under Voltage Level Adjust Current
1
A/V
V
st1
Internal Stop Threshold (without external adjustement)
10.7
13.3
V
V
hys
Threshold Hysteresis
0.8
V
TD310
3/9
UVLO/stbdy pin functionning modes
Due to the wide supply voltage range of the TD310, the UVLO function (Under Voltage Lock Out) is
externally adjustable by a resistor bridge.
The bridge rate can be calculated in relation with the expected UVLO protection level as follows :
V
UVLO
x
R1
R1
+
R2
=
1.2V (where R1 is the lower resistor of the bridge)
The internal resistor sets the default UVLO value to 12V (*) and might influence the external bridge rate if
the values of the external resistors are too high.
The standby threshold value depends of the UVLO value as follows :
V
stdby
=
0.7
/
1.2
V
UVLO
Both UVLO and stdby functions can be inhibited by connecting the UVLO/stdby pin to V
CC
+
via a pull up
resistor (ex 150k
).
The following table summarizes the functions of the TD310 :
Pin
16
9/11
5
2/3/4
15/14
/13
6
7/8/10
Configuration
UVLO/stdby
Sense+/Sense- Enabl
e
In A/B/C
Out
A/B/C
Alarm
Op.
Amp.
Consumption
Normal
1
H
+ > -
X
X
L
L
OK
H (1.5mA)
+ < -
H
IN
IN
H
L
X
L
Stdby
2
L
+ > -
X
X
L
L
HZ
L (30
A)
+ < -
H
UVLO
3
M
X
X
X
L
L
OK
H
Configuration 1 : UVLO/stdby = H
The TD310 is in a normal consumption state (1.5mA), the operational amplifier is normally functionning
and the buffer outputs are determined by the sense comparator inputs, the enable inputs and the buffer
inputs.
Configuration 2 : UVLO/stdby = L
The TD310 is in a low consumption state (standby mode 30
A), the buffer outputs are set to low state and
the operational amplifier is in high impedance state.
Configuration 3 : UVLO/stdby = M
The V
CC
supply voltage is between V
UVLO
and V
stdby
(**). The TD310 remains in a normal consumption
state and the operational amplifier is normally functionning but the buffer outputs and the alarm pin are set
to low state.
(*)
If the UVLO level remains unadjusted, it is recommended to bypass the UVLO/stdby pin with a 1nF capacitor.
(**)
If the supply voltage falls below V
stdby
, the TD310 is set in standby mode (configuration 2).
TD310
4/9
tli
tdL
tdH
Input
A/B/C
Output
A/B/C
TIMING 1
TIMING 2
Input
A/B/C
Output
A/B/C
Se ns e
ts
te L
tA
tAi
Alarm
te H
Ena ble
Unde r
Volta ge
tAi
TIMING DIAGRAM
TD310
5/9