TDA1170D
LOW-NOISE TV VERTICAL DEFLECTION SYSTEM
December 1992
.
COMPLETE VERTICAL DEFLECTION SYS-
TEM
.
LOW NOISE
.
SUITABLE FOR HIGH DEFINITION MONI-
TORS
DESCRIPTION
The TDA 1170D is a monolithic integrated circuit in
a 16-lead dual in-line plastic package. It is intended
for use in black and white and colour TV receivers.
Low-noise makes this device particularly suit-
able for use in monitors. The functions incorpo-
rated are : synchronization circuit, oscillator and
ramp generator, high power gain amplifier, flyback
generator, voltage regulator.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
RAMP GENERATOR
COMPENSATION
AMPLIFIER INPUT
GROUND
GROUND
OSCILLATOR
SYNC. INPUT
HEIGHT ADJUST
RAMP OUTPUT
SUPPLY VOLTAGE
FLYBACK
GROUND
GROUND
POWER AMPLIFIER OUTPUT
REGULATED VOLTAGE
POWER AMPLIFIER
SUPPLY VOLTAGE
1170D-01.EPS
PIN CONNECTIONS
DIP16
(Plastic Package)
ORDER CODE : TDA1170D
1/8
OSCILLATOR
VOLTAGE
REGULATOR
POWER
AMPLIFLIER
PREAMPLIFLIER
BUFFER
STAGE
SYNC
CIRCUIT
RAMP
GENERATOR
FLYBACK
GENERATOR
SYNC
YOKE
LINEARITY
HEIGHT
FREQ
+ V
S
2
1
3
11
8
7
10
9
16
14
15
6
4
5
12
13
TDA1170D
1170D-02.EPS
BLOCK DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
S
Supply Voltage at Pin 2
35
V
V
6
, V
7
Flyback Peak Voltage
60
V
V
14
Power Amplifier Input Voltage
+ 10
0.5
V
V
I
o
Output Peak Current (non repetitive) at t = 2msec
2
A
I
o
Output Peak Current at f = 50Hz t
10
sec
2.5
A
I
o
Output Prak Current at f = 50Hz t > 10
sec
1.5
A
I
3
Pin 3 DC Current at V
6
< V
2
100
mA
I
3
Pin 3 Peak to Peak Flyback Current for f = 50Hz, t
fly
1.5msec
1.8
A
I
10
Pin 10 Current
20
mA
P
tot
Power Dissipation : at T
ta b
= 90
C
at T
amb
= 70
C (free air)
4.3
1
W
W
T
stg
, T
j
Storage and Junction Temperature
40 to 150
C
1170D-01.TBL
THERMAL DATA
Symbol
Parameter
Value
Unit
R
th jcase
R
th jamb
Thermal Resistance Junctionpins
Thermal Resistance Junction-ambient
Max
Max
14
80
C/W
C/W*
* Obtained with pins 4, 5, 12, 13 soldered to printed circuit with minimized copper area.
1170D-02.TBL
TDA1170D
2/8
ELECTRICAL CHARACTERISTICS
(refer to the test circuits, V
S
= 35V, T
amb
= 25
o
C, unless otherwise specified)
DC CHARACTERISTICS
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Fig.
I
2
Pin 2 Quiescent Current
I
3
= 0
7
14
mA
1b
I
7
Pin 7 Quiescent Current
I
6
= 0
8
17
mA
1b
I
11
Oscillator Bias Current
V
11
= 1V
0.1
1
A
1a
I
14
Amplifier Input Bias Current
V
14
= 1V
1
10
A
1b
I
16
Ramp Generator Bias Current
V
16
= 0
0.02
0.3
A
1a
I
16
Ramp Generator Current
I
9
= 20
A, V
16
= 0
18.5
20
21.5
A
1b
I
16
I
16
Ramp Generator Non-linearity
V
16
= 0 to 12V, I
9
= 20
A
0.2
1
%
1b
V
S
Supply Voltage Range
10
35
V
V
1
Pin 1 Saturation Voltage to Ground
I
1
= 1mA
1
1.4
V
V
3
Pin 3 Saturation Voltage to Ground
I
3
= 10mA
300
450
mV
1a
V
6
Quiescent Output Voltage
V
s
= 10V
R1 = 1k
, R2 = 1k
4.1
4.4
4.75
V
1a
V
s
= 35V
R1 = 3k
, R2 = 1k
8.3
8.8
9.45
V
1a
V
6L
Output Saturation Voltage to Ground
I
6
= 0.1A
I
6
= 0.8A
0.9
1.9
1.2
2.3
V
V
1c
1c
V
6H
Output Saturation Voltage to Supply
I
6
= 0.1A
I
6
= 0.8A
1.4
2.8
2.1
3.2
V
V
1d
1d
V
8
Regulated Voltage at Pin 8
6.1
6.5
6.9
V
1b
V
9
Regulated Voltage at Pin 9
I
9
= 20
A
6.2
6.6
7
V
1b
V
8
V
S
,
V
9
V
S
Regulated Voltage Drift with Supply
Voltage
V
S
= 10 to 35V
1
mV/V
1b
V
14
Amplifier Input Reference Voltage
2.07
2.2
2.3
V
R10
Pin 10 Input Resistance
V
10
0.4V
1
M
1a
1170D-03.TBL
TDA1170D
3/8
Figure 1 : DC Test Circuit
10
11
6
3
2
7
9
16
14
4
5
12
13
TDA1170D
V3
I3
I10
- I11
1V
1V
8V
- I16
R2
R1
V6
+ Vs
1k
1170D-03.EPS
Figure 1a
2
7
16
14
4
5
12
13
TDA1170D
- I16
+ Vs
I2
I7
11
8
V8
9
- I14
V9
1V
100k
1170D-04.EPS
Figure 1b
2
7
14
4
5
12
13
TDA1170D
11
+ Vs
4V
6
I6
V6L
1170D-05.EPS
Figure 1c
2
7
14
4
5
12
13
TDA1170D
11
+ Vs
6
I6
1V
V6H
1170D-06.EPS
Figure 1d
TDA1170D
4/8
ELECTRICAL CHARACTERISTICS
(refer to the AC test circuit, V
S
= 22V ; f = 50Hz ; T
amb
= 25
o
C, unless otherwise specified)
AC CHARACTERISTICS
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
I
s
Supply Current
I
y
= 1App
140
mA
I
10
Sync. Input Current (positive or negative)
500
A
V6
Flyback Voltage
I
y
= 1App
45
V
t
fly
Flyback Time
I
y
= App
0.7
ms
V
ON
Peak to Peak Output Noise
Pin 11 Connected to GND
40
mV
PP
f
o
Free Running Frequency
(P1 = R1) = 260k
, C2 = 0.1
F
(P1 = R1) = 300k
, C2 = 0.1
F
48.5
42.2
Hz
Hz
f
Synchronization Range
I
8
= 0.5mA
14
Hz
f
V
S
Frequency Drift with Supply Voltage
V
s
= 10 to 35V
0.005
Hz/V
f
T
pins
Frequency Drift vs. Pins 4, 5, 12 and 13
Temp.
T
pins
= 40 to 120
C
0.01
Hz/
C
1170D-04.TBL
3
2
11
10
1
7
6
9
8
1N4001
100pF
Sync.
Input
S
P1
C2
R1
470pF
T
D
A
1
1
7
0
D
D
V
V
Rf
Rf
15
16
14
4
5
12 13
0.1mF
1W
470
F
100
F
0.1
F
220k
0.1
F
120k
910k
0.1
F
0.1
F
100k
47k
1.8k
22k
10
F
1000
F
3.3
220k
5.6k
5.6k
YOKE
Ry = 10
Ly = 20mH
V
= 22V
1170D-07.EPS
Figure 2 : AC Test Circuit
TDA1170D
5/8
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