TDA1180P
TV HORIZONTAL PROCESSOR
May 1993
DIP16
(Plastic Package)
ORDER CODE : TDA1180P
s
NOISE GATED HORIZONTAL SYNC SEPARA-
TOR
s
NOISE GATED VERTICAL SYNC SEPARATOR
s
HORIZONTAL OSCILLATOR WITH FRE-
QUENCY RANGE LIMITER
s
PHASE COMPARATOR BETWEEN SYNC
PULSES AND OSCILLATOR PULSES (PLL)
s
PHASE COMPARATOR BETWEEN FLYBACK
PULSES AND OSCILLATOR PULSES (PLL)
s
LOOP GAIN AND TIME CONSTANT SWITCH-
ING ( VCR)
s
COMPOSITE BLANKING AND KEY PULSE
GENERATOR
s
PROTECTION CIRCUITS
s
OUTPUT STAGES WITH HIGH CURRENT CA-
PABILITY
DESCRIPTION
The TDA1180P is a horizontal processor circuit for
b.w. and colour monitors. It is a monolithic inte-
grated circuit encapsulated in 16-lead dual in-line
plastic package.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SUPPLY VOLTAGE
NEGATIVE OUTPUT
POSITIVE OUTPUT
PROTECTION CIRCUIT INPUT
PHASE SHIFTER FILTER
FLYBACK INPUT
KEY AND BLANKING PULSE OUTPUT
SYNC. SEPARATOR INPUT
GROUND
OSCILLATOR CONTROL CURRENT
CONTROL CURRENT OUTPUT
TIME CONSTANT SWITCH
OSCILLATOR
COINCIDENCE DETECTOR
VERTICAL SYNC. OUTPUT
VERTICAL SYNC. SEPARATOR INPUT
118
0P
-
0
1
.
E
P
S
PIN CONNECTIONS
1/12
U
nde
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P
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Ver
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Bla
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C
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ent
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)
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put
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Sh
ap
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Phas
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and
Pul
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Shape
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P
r
ot
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c
t
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on
Sw
it
ch
1
0
76
15
4
2
3
16
14
15
13
12
11
9
8
Pha
s
e
C
o
m
p
ar
at
or
(
O
sci
l
l
a
t
o
r
F
l
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a
ck)
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
Vi
d
e
o
S
i
gna
l
V
S
V
S
V
S
V
S
V
S
VC
R
F
r
eque
n
c
y
V
e
r
t
ic
al
Sy
nc
.
Separat
o
r
No
i
s
e
Ga
t
e
Sy
n
c
.
S
epa
r
a
t
o
r
11
80
P
-
0
2
.
E
P
S
BLOCK DIAGRAM
TDA1180P
2/12
THERMAL DATA
Symbol
Parameter
Value
Unit
R
th (j-a)
Thermal Resistance Junction-Ambient
Max
80
o
C/W
11
80
P
-
0
2
.
T
B
L
ELECTRICAL CHARACTERISTICS
(refer to the test circuit, V
S
= 12V, T
A
= 25
o
C, unless otherwise specified)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
V
S
Supply voltage range
9.5
12
13.2
V
I
S
Supply current
I
3
= 0
42
52
mA
V
S
Supply voltage at which the output pulses
(at pin 2 and 3) are switched off
4
V
HORIZONTAL SYNC. SEPARATOR
V
I
Peak to peak input signal
1
3
6
V
V
8
Input switching voltage
I
8
= 80
A
1.5
V
I
8
Input switching current
V
8
= 1.4V
10
A
I
8
Leakage current
V
8
= -5V
1
A
VERTICAL SYNC. SEPARATOR
V
I
Peak to Peak Input Signal
1
3
6
V
V
9
Input Switching Voltage
I
9
= 80
A
1.5
V
I
9
Input Switching Current
V
9
= 1.4V
5
A
I
9
Leakage Current
V
9
= -5V
1
A
V
10
Vertical Sync. Pulse Output Voltage
No Load Pin10
11
V
R
10
Output Resistance
10
k
t
LV
Delay between Leading Edge of Input and Output
Signals
17
s
t
LV
Delay between Trailing Edge of Input and Output
Signals
50
s
t
V
Vertical Sync Pulse Duration
190
s
11
80
P
-
0
3
.
T
B
L
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
S
Supply voltage (Pin 1)
15
V
V
2
Voltage at Pin 2
18
V
V
4
Voltage at Pin 4
V
S
V
8
Voltage at Pin 8
- 6 , V
S
V
V
9
Voltage at Pin 9
6
V
V
11
Voltage at Pin 11
V
S
I
2
Pin 2 peak current
1
A
I
3
Pin 3 peak current
0.5
A
I
6
Pin 6 current
30
mA
I
7
Pin 7 current
20
mA
I
10
Pin 10 current
30
mA
P
tot
Total power dissipation at Tamb
70
o
C
1
W
T
stg
, T
j
Storage and junction temperature
- 40 , + 150
o
C
11
80
P
-
0
1
.
T
B
L
TDA1180P
3/12
ELECTRICAL CHARACTERISTICS (continued)
(refer to the test circuit, V
S
= 12V, T
A
= 25
o
C, unless otherwise specified)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
PROTECTION CIRCUIT
V
4
Input Voltage for Switching off the Output Pulses
Output Pulses OFF
Output Pulses ON
1
0.5
V
R
4
Input Resistance
200
k
I
4
Input Current
5
A
FLYBACK PULSE
V
6
Input Threshold Voltage of Blanking Generator
1.8
V
V
6
Input Threshold Voltage of Phase Comparator
7.6
V
I
6
Input Switching Current
V
6
1.7V
0.45
mA
OUTPUT PULSE
V
3
Peak-to-Peak Output Voltage
I
3
= 150 mApp
10
V
I
3
Output Current
V
3
= 5V
500
mA
R
3
Output Resistance
At Leading Edge of
output pulse
At Training Edge of
Output Pulse
3
20
t
p
Output Pulse Duration
20
22
26
s
COMPOSITE BLANKING AND KEY PULSE
V
7k
Key Pulse Output Peak Voltage
9
11
V
V
7B
Blanking Pulse Output Voltage
4.2
4.5
4.8
V
R
7
Output Resistance
100
t
sk
Phase Relation Between Trailing Edge of Key
Pulse and Middle of Sync. Input Pulse
2.7
s
t
k
Key Pulse Duration
3.5
3.8
s
t
fb
Delay between Flyback Pulse and Blanking Pulse
V
6
= 1.7V
0.2
s
INTERNAL GATING PULSE
t
g
Gating Pulse Duration
7.5
s
t
Phase Relation between Middle of Sync. Pulse
and Trailing and Leading Edge of Gating Pulse
3.75
s
COINCIDENCE DETECTOR
V
11
Output Voltage
With Coincidence
Without Coincidence
6.8
4
V
V
I
11
Peak Output Current
0.5
mA
VCR SWITCH
V
11
Input Voltage
0 to 4 or 8.5 to 12
V
- I
11
Output Current
35
A
I
11
Output Current
0.4
mA
TIME CONSTANT SWITCH
V
12
Output Voltage
3
V
R
12
Output Resistance
4.5V < V
11
< 8V
V
11
> 8.5V or V
11
< 4V
100
40
k
11
80
P
-
0
4.
T
B
L
TDA1180P
4/12
ELECTRICAL CHARACTERISTICS (continued)
(refer to the test circuit, V
S
= 12V, T
A
= 25
o
C, unless otherwise specified)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
OSCILLATOR
V
14
Low Level Threshold Voltage
5.4
V
V
14
High Level Threshold Voltage
8.2
V
I
14
Charge Current
0.6
mA
I
14
Discharge Current
0.3
mA
V
15
Current Source Supply Voltage
3
V
I
15
Current Source Supply Current
0.3
mA
f
O
Free Running Frequency
15625
Hz
f
O
f
O
Adjustment Range
10
%
f
O
I
15
Frequency Control Sensitivity
52
Hz
A
f
O
Frequency Change when V
S
Drops to 4V
10
%
OSCILLATOR-FLYBACK PULSE PHASE COMPARATOR
V
5
Control Voltage Range
9.4 to 8.2
V
I
5
Peak Control Current
-0.6
+0.6
mA
I
5
Input Current (blocked Phase Detector)
5
A
t
D
Permissible Delay between Output Pulse Leading
Edge and Flyback Pulse Leading Edge
t
p
- t
f
s
t
t
D
Static Control Error
0.2
%
SYNC PULSE-OSCILLATOR PHASE COMPARATOR
V
13
Control Voltage Range
4.6
to
1.4
V
I
13
Control Peak Current
+2
-2.2
-2
mA
f
t
Phase Lock Loop Gain
2
kHz
s
f
Catching and Holding Range
700
Hz
OVERALL PHASE RELATIONSHIP
t
O
Phase Relation between Middle of Flyback Pulse
and Middle of Sync. Pulse
2.2
s
V
5
t
O
Adjustment Sensitivity
65
mV
s
I
5
t
O
Adjustment Sensitivity
16
A
s
11
80P
-
0
5
.
T
B
L
TDA1180P
5/12
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