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Электронный компонент: TDA8143

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TDA8143
HORIZONTAL DEFLECTION POWER DRIVER
September 1993
9
8
7
6
5
4
3
2
1
GROUND
OUTPUT
V
+
CC
SENSE-IN
GROUND
SPECIAL REMOTE STANDBY
CONTROL INPUT
PROTECTION AND REMOTE STANDBY INPUT
C
T
81
43
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0
1
.
E
P
S
PIN CONNECTIONS
SIP9
(Plastic Package)
ORDER CODE : TDA8143
.
CONTROLLED DRIVING OF THE POWER
TRANSISTOR DURING TURN ON AND OFF
PHASE FOR MINIMUM POWER DISSIPA-
TION AND HIGH RELIABILITY
.
HIGH SOURCE AND SINK CURRENT CAPA-
BILITY
.
DISCHARGE CURRENT DERIVED FROM
PEAK CHARGE CURRENT
.
CONTROLLED DISCHARGE TIMING
.
DISABLE FUNCTION FOR SUPPLY UNDER
VOLTAGE AND NONSYNCHRONOUS OP-
ERATION
.
PROTECTION FUNCTION WITH HYSTERE-
SIS FOR OVERTEMPERATURE
.
OUTPUT DIODE CLAMPING
.
LIMITING OF THE COLLECTOR PEAK CUR-
RENT OF THE DEFLECTION POWER TRAN-
SISTOR DURING TURN ON PERIOD
.
SPECIAL REMOTE FUNCTION WITH DELAY
TIME TO SWITCH THE OUTPUT ON
DESCRIPTION
The TDA8143 is a monolithic integrated circuit
designed to drive the horizontal deflection power
tran-sistor.
The current source characteristic of this device is
adapted to the non-linear current gain behaviour of
the power transistor providing a minimum power
dissipation. The TDA8143 is internally protected
against short circuits and thermal overload.
1/9
SYNC. DET.
THERMAL
PROTECTION
I
B 1
S
V
I
B2
C
V
SPECIAL
REMOTE
STANDBY
CONTROL
IN
PROTECTION AND
REMOTE STANBY INPUT
C
1nF
100k
OUT
SENSE
IN
GND
27
220
F
BU508
22nF
4.7
10
H
0.15
V
H
R
S
V
C C
+
&
7
8
6
5
4
2
3
TDA8143
1
9
8
1
4
3
-0
2
.
EPS
BLOCK DIAGRAM
PIN FUNCTIONS
Pin
Name
Function
1
Power Ground
Common Ground
2
Ouptut
Device Output
3
V
CC
Supply Voltage
4
Sense Input
Input voltage that determines output current.
5
Sense GND
Reference Ground for Input Voltage at SENSE INPUT.
6
C
EXT
Capacitor between this terminal and SENSE GROUND determines the current
slope dI
O
/dt during OFF phase.
7
Special Remote/Standby
Low level at this input sets the device after a delay time t
dr
in the standby mode
independent from CONTROL INPUT (2nd priority).
8
Control Input
High level at this input switches the BU508 off, low level switches the BU508 on.
9
Protection and Remote
Standby Input
A high level at this input switches the BU508 off independent from all other inputs
(1st priority).
81
43
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.
T
B
L
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage
18
V
I
d
Output Current
Internally Limited
P
tot
Power Dissipation
Internally Limited
T
stg
, T
j
Storage and Junction Temperature
40, + 150
C
T
oper
Operating Temperature
0, + 70
C
81
43
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0
2
.
T
B
L
THERMAL DATA
Symbol
Parameter
Value
Unit
R
th (ja)
Thermal Resistance Junction-ambient
Max.
70
C/W
R
th (jc)
Thermal Resistance Junctioncase
Max.
10
C/W
81
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3
.
T
B
L
TDA8143
2/9
ELECTRICAL CHARACTERISTICS (V
CC
= 12 V, T
amb
= 25
o
C unless otherwise specified)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
CC
Supply Voltage
7
18
V
I
Q
Quiescent Current
All Inputs Open
10
15
25
mA
I
p0
Positive Output Current (source)
1.5
A
I
n0
Negative Output Current (sink)
2
A
I
o0
Positive quiescent output current forcing
the output to 6 V and the sense input to
ground output externally forced to 6 V.
Remote Input1
Remote Input0
120
50
150
80
200
100
mA
mA
G
ON
Transconductance ON Phase (1)
See Figure 1
1.8
2.0
2.2
A/V
G
OFF
Transconductance OFF Phase (2)
See Figure 1
1.8
2.0
2.2
A/V
G
REMOTE
Transconductance Standby Mode
Remote Input0
0.675
0.75
0.825
A/V
I
5
Current Source Pin 6
V
7
= 500 mV
135
165
200
A
R
INS
Sense Input Resistance
V
S
> 0
V
S
< 0
0.7
0.35
1
0.5
1.3
0.7
k
k
I
INS
Sense Input Bias Current
V
S
= 0
Remote Input = 1
200
300
400
A
R
SYN
Synchronous Detection Input Resistance
V
SYN
< 7 V
V
SYN
> 7 V
30
7
60
10
150
15
k
k
V
THS
Threshold Voltage of the Synchronous
Detection Input
1
1.8
2.8
V
V
SYN
SYNC DETECT Input Voltage
30
V
V
THA
Threshold Voltage of Control Input
1.5
2
2.5
V
I
INA
Pull up Current of Control Input
0 < V
IN
< V
THA
V
IN
> V
THA
+ 0.5 V
50
1
100
0
160
+ 1
A
A
V
THB
Threshold Voltage Remote Input
1.5
2
2.5
V
I
INB
Pull-up Current of the Remote Input
0 < V
IN
< V
THB
V
IN
> V
THB
+ 0.5 V
50
1
100
0
160
+ 1
A
A
t
dr
Remote Delay Time (3)
190
250
300
s
t
don
On Delay Time
3
4.5
s
V
CC
V
OUT
Output Voltage Drop for I
p0
= 1 A
2
2.8
3
V
V
CC ON
Supply Voltage for Device "ON"
I
0
0
5.8
6.4
7.0
V
V
CC OFF
Supply Voltage for Device "OFF"
(output internally switched to ground)
5.6
V
CC ON
0.2 V
6.8
V
V
S limit
Sense Limit Voltage (4)
0.8
0.9
1
V
Notes : 1. G
ON
is measured with V
4
varying from 150mV to 350mV (Pin 6 is grounded)
2. G
OFF
is measured with V
6
varying from 150mV to 350mV (Pin 4 is grounded)
3. When the remote input goes from HIGH to LOW the BU508 is switched off and it remains in this condition for the time t
dr
.
4. The sense input voltage V
S
is internally limited and results in a limited positive output current I
p0
= g. V
S
limit. Note that due to
the storage time t
S
of the BU508 limiting of V
S
leads to a reduced base current of the BU508 and the output current I
0
is going to
the positive quiescent current I
o0
.
81
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4
.
T
B
L
TRUTH TABLE
Logics Inputs
Output I
0
Mode
Control Input
Remote/Standby
0
Floating or 1
Floating or 1
Floating or 1
I
0
> 0
I
0
< 0 (5)
BU508 ON
BU508 OFF
Normal Function
X
0
I
0
< 0 (5)
0 < t < t
dr
BU508 OFF
Remote/Standby
Function
X
0
I
0
> 0
t > t
dr
BU508 ON
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43
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5
.
T
B
L
Note :
5. I
O
< 0 means that the sink current flows into the output to ground.
TDA8143
3/9
2.2
1.8
0
50
100
150
200
250
300
350
400
450
500
550
600
650
700
750
G
G
or
ON
OFF
(A/V)
(A/V)
2.1
2.0
1.9
1.7
V
V
(mV) or
Pin3
Pin5
(mV)
8
1
4
3
-0
3
.
EP
S
Figure 1 :
G
ON
V
Pin3
and
|
G
OFF
|
V
Pin5
BU508
R
S
+12V
STANDBY
OUT
R
f
C
a
D1
L
O
R
O
C
O
R
b
C
b
C
S
TDA8143
1
5
6
4
2
9
3
8
8
1
4
3
-0
4
.
EPS
Figure 2 : Large Screen Application
COMPONENTS LIST FOR TYPICAL APPLICATION
CRT
22"/26" 100
14"/20" 90
CRT
22"/26" 100
14"/20" 90
C
a
R
o
C
o
L
o
47
F
27
2W
220
F
10
H
47
F
27
1 W
220
F
10
H
R
b
C
b
R
s
C
s
4.7
47 nF
0.15
1 nF
4.7
47 nF
0.1
1 nF
81
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0
6
.
T
B
L
TDA8143
4/9
APPLICATION INFORMATION
The conventional deflection system is shown in
Figure 3. The driving circuit consists of a bipolar
power transistor driven by a transformer and a
medium power element plus some passive compo-
nents.
During the active deflection phase the collector
current of the power transistor is linearly rising and
the driving circuitry must be adapted to the required
base current in order to ensure the power transistor
saturation.
According to the limited components number the
typical approach of the present TVs provides only
a rough approximation of this objective ; in Figure 4
we give a comparison between the typical real base
current and the ideal base current waveform and
the collector waveform.
The marked area represents a useless base cur-
rent which gives an additional power dissipation on
the power transistor.
Furthermore during the turn-ON and turn-OFF tran-
sient phase of the chassis the power transistor is
extremely stressed when the convenctional net-
work cannot guarantee the saturation ; for this
reason, generally, the driving circuit must be care-
fully designed and is different for each deflection
system.
The new approach, using the TDA8143, over-
comes these restrictions by means of a feedback
principle.
As shown in Figure 4, at each instant of time the
ideal base current of the power transistor results
from its collector current divided by such current
gain which ensure the saturation ; thus the required
base current I
b
can be easily generated by a feed-
back transconductance amplifier g
m
which senses
the deflection current across the resistor R
s
at the
emitter of the power transistor and delivers :
I
b
= R
S
g
m
I
e
The transconductance must only fulfill the condi-
tion :
1
1
+
min
1
R
S
<
gm
<
1
R
S
where
is the minimum current gain of the transitor.
This method always ensures the correct base cur-
rent and acts time independent on principle.
For the turn-OFF, the base of the power transistor
must be discharged by a quasi linear time decreas-
ing current as given in Figure 5.
Conventional driver systems inherently result into
a stable condition with a constant peak current
magnitude.
V
CC
+
V
IN
I
B
I
C
I
D
YOKE
DEFLECTION CIRCUIT
HORIZONTAL
TRANSFORMER
DRIVING CIRCUIT
8
1
4
3
-0
5
.
EPS
Figure 3 : Conventional Horizontal Deflection System for TVs
TDA8143
5/9
OFF PHASE
CONTROL
INPUT
t
I
0
ON PHASE
t
I
p0
I
0
t
don
I
n0
t
S
I
S0
t
S
dI
0
dt
=
I
S0
81
43
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0
7.
E
P
S
Figure 5
This is due to the constant base charge in the
turn-ON phase independent from the collector cur-
rent ; hence a high peak current results into a low
storage time of the transistor because the excess
base charge is a minimum and vice versa. In the
active deflection the required function, high peak
current-fast switch-OFF and low peak current-slow
switch-OFF, is obtained by a controlled base dis-
charge current for the power transistor ; the nega-
tive slope of this ramp is proportional to the actual
sensed current.
As a result, the active driving system even im-
proves the sharpness of vertical lines on the screen
compared with the traditional solution due to the
increased stability factor of the loop represented as
the variation of the storage time versus the collector
peak current.
I
C
I
C
t
t
I
BIAS
D
I
t
S
Base Bias Current
Off Phase
On Phase
Off Phase
Real Base Current
Ideal Base Current
8
143
-
0
6.
E
P
S
Figure 4 :
Waveforms of Collector and
Base Current
Figure 6 shows the block diagram of the TDA8143,
the circuit consists of an input transconductance
amplifier composed by Q1, Q2, Q3 and Q4.
The symmetrical output current is fed into the load
resistor R1 and R2 ; the two amplifiers V1 and V2
realize a floating voltage to current converter which
can drive 1.2A sink current and 2A source current
for a wide common output range.
So, the overall transconductance results into :
g
m
=
R1
+
R2
R3
1
R5
A current source I
1
generates a drop of 70mV
across the resistor R4 which provides an output
bias current of 140mA ; the control input determines
the turn ON/OFF function.
In the ON phase, Q5 shorts the external capacitor
C
t
. Within the input voltage range 0 < V
in
< 750mV
the element realizes the transconductance func-
tion ; lower voltages are clamped by the D1/Q6
configuration.
For input voltages higher than 750mV, Q7 limits the
maximum output current at 1.5A peak.
In the turn-OFF mode, C
t
will be charged by the
controlled source I
2
which is proportional to the
input voltage, by this way, the output current de-
creases quasi linearly and the system stability is
reached.
During the flyback phase, the IC is enabled via the
sync. detector input ; this function with the limited
sink and source current together with the undervol-
tage turn-OFF and a chip temperature sensor en-
sure a complete protection of the IC.
CIRCUIT DESCRIPTION
TDA8143
6/9
In Figure 7 is shown the application diagram of the
TDA8143, the few external component and the
automatic handling possibility ensures a lower ap-
plication cost versus the conventional approach
shown in Figure 3.
In Figure 8 is shown the currents and voltage
waveforms of the driver circuit of Figure 7 as to be
seen, the driving charge I
b
t
on
has been reduced
at minimum.
The power dissipation on this application condition
is about 1.3W.
The presence of thermal shut-down circuit means
that the heatsink can have a smaller factor of safety
compared with that of a conventional circuit.
If for any reason, the junction temperature in-
creases up to 150
o
C, the thermal shut-down simply
switches off the device.
&
C
VOLTAGE
CONTROL
V < 7V
j
OVERTEMP.
PROTECTION
T < 150C
&
Q9
V1
R2
R1
INPUT
TRANSCONDUCTANCE
AMPLIFIER
V2
Q10
Q11
R5
D2
Q7
Q6
R4
D1
Q1
Q4
Q3
R3
Q8
R6
Q2
Q5
I
1
I
2
REF
IN
V
V = 750mV
OUTPUT
I
B
SENSE
INPUT
V
+
CC
PROTECTION
AND REMOTE
STANDBY INPUT
CONTROL
INPUT
SPECIAL
REMOTE
STANDBY
SENSE
GROUND
C
EXT
C
T
9
8
7
6
1
5
4
2
3
POWER
GROUND
814
3-
08
.
E
P
S
Figure 6 : Block Diagram of the Integrated Horizontal Driver
TDA8143
7/9
I
C
I
D
I
B
V
i
+
V
CC
R
2W
47nF
1nF
YOKE
HORIZONTAL
TRANSFORMER
DEFLECTION CIRCUIT
100
F
220
F
27
4.7
0.15
DRIVING CIRCUIT
3
8
1
TDA8143
9
2
4
6
5
8
1
4
3
-0
9
.
EPS
Figure 7 : Integrated Horizontal Driver
81
43
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.
T
I
F
Figure 8 : Signal Diagrams of the Driver Circuits
81
43
-
1
1
.
T
I
F
TDA8143
8/9
B
e3
a1
L1
D
d1
b1
C
b3
N
L
L2
e
c2
c1
1
9
M
L3
A
PM
-SI
P9
.
EPS
PACKAGE MECHANICAL DATA
9 PINS - PLASTIC SIP
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility
for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result
from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics.
Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all
information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life
support devices or systems without express written approval of SGS-THOMSON Microelectronics.
1994 SGS-THOMSON Microelectronics - All Rights Reserved
Purchase of I
2
C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips
I
2
C Patent. Rights to use these components in a I
2
C system, is granted provided that the system conforms to
the I
2
C Standard Specifications as defined by Philips.
SGS-THOMSON Microelectronics GROUP OF COMPANIES
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Dimensions
Millimeters
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
A
7.1
0.280
a1
2.7
3
0.106
0.118
B
24.8
0.976
b1
0.5
0.020
b3
0.85
1.6
0.033
0.063
C
3.3
0.130
c1
0.43
0.017
c2
1.32
0.052
D
21.2
0.835
d1
14.5
0.571
e
2.54
0.100
e3
20.32
0.800
L
3.1
0.122
L1
3
0.118
L2
17.6
0.693
L3
0.25
0.010
M
3.2
0.126
N
1
0.039
SI
P9
.
T
B
L
TDA8143
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