9-1
9
V
DD
R
O(ON)
I
O(ON)
I
O(OFF)
Order Number/Package
(max)
(max)
(min)
(max)
SO-16
Die
320V
350
25mA
-1.0nA
AN0332CG
AN0332ND
*Average current per channel, measured with all eight channels connected in parallel.
AN0332
8 N-Channel Latchable Power MOSFET Array
Ordering Information
General Description
The Supertex AN0332 is an 8 N-Channel 320V common source
power MOSFET array with a CMOS 8 bit addressable latch. The
outputs are guaranteed to have very low leakage current. The
outputs are addressed by logic inputs A0, A1, and A2. The
addressed and unaddressed output can be turned on or off by the
data, reset, and write disable inputs.
The AN0332 is ideally suited for low leakage/high impedance
measurements, providing excellent accuracy as well as resolution
for automatic bare board test equipment and other applications.
Features
Low drain to source leakage
Interfaces directly to TTL and CMOS logic
8 independent channels
Low crosstalk between channels
Low power dissipation
Freedom from secondary breakdown
Serial data input
On-chip decoder, latch with reset and write disable circuitry
Absolute Maximum Ratings
1
Output voltage, V
DD
320V
Logic supply voltage, V
DD
-0.5V to +15V
Logic input levels, all inputs
-0.5V to V
DD
Operating and storage temperature range
-55C to +150C
Soldering temperature
2
300C
Channel-to-channel crosstalk
10mV/V
Notes:
1. All voltages are referenced to V
SS
.
2. Distance of 1.6mm from case for 10 seconds.
Applications
High impedance/low leakage measurements
for bare board testers
High voltage piezoelectric transducer drivers
High voltage electroluminescent panel drivers
High voltage electrostatic array drivers
General multi-channel driver arrays
Pin Configuration
Q
7
V
DD
Reset
Q
6
Data
Q
5
Write Dis
Q
4
A
0
Q
3
A
1
Q
2
A
2
Q
1
V
SS
Q
0
Note: See Package Outline section for dimensions.
SO-16
1
8
top view
2
3
4
5
6
7
16
9
15
14
13
12
11
10
OBSOLETE
9-2
Symbol
Parameter
Min
Typ
Max
Unit
Conditions
I
O(OFF)
Off-State Output Current
8.0
nA
V
O
= max. rating,
8 outputs connected in parallel
I
O(ON)
On-State Output Current
25
mA
V
O
= 25V
R
O(ON)
On-State Output Resistance
350
I
O
= 10mA
R
O(ON)
Change in R
O(ON)
with High Temperature
0.8
%/C
I
O
= 10mA
I
DDQ
Quiescent Logic Supply Current
0.05
16.5
A
V
IL
Input Low Voltage
3.5
V
V
IH
Input High Voltage
12
V
I
IN
Input Current
1.0
A
Note:
1. All voltages are referenced to V
SS
.
Electrical Characteristics
(@ 25C and V
DD
= 12V unless otherwise specified)
DC Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
Fig. 1*
Conditions
t
D(ON)
Turn-On Delay Time
800
ns
1a
t
D(OFF)
Turn-Off Delay Time
800
ns
1b
t
r
Rise Time
200
ns
10
t
f
Fall Time
200
ns
11
t
PHL
, t
PLH
Propagation Delay Time
87
ns
2
V
O
= 25V, I
O
= 10mA
from Write Disable to Output
t
PHL
, t
PLH
Propagation Delay Time
87
ns
3
from Reset to Output
t
PHL
, t
PLH
Propagation Delay Time
107
ns
9
from Address to Output
t
W
Minimum Pulse Width Data
50
100
ns
4
t
W
Minimum Pulse Width Address
100
200
ns
8
t
W
Minimum Pulse Width Reset
40
75
ns
5
t
S
Setup Time Data to Write Disable
50
ns
6
t
H
Hold Time Data to Write Disable`
75
ns
7
C
IN
Input capacitance Any Input
5.0
7.5
pF
*Refer to circled numbers on Timing Diagram (Figure 1).
Note:
1. All voltages are referenced to V
SS
.
AC Characteristics
AN0332
OBSOLETE
9-3
9
A
0
, A
1
, A
2
5
6
7
8
9
1a
11
10
1b
2
3
4
Write Disable
Data
Reset
t
W
t
P
t
P
t
R
t
W
t
P
V
SS
V
DD
t
f
10%
10%
90%
t
d(ON)
t
d(OFF)
10%
t
H
t
S
t
W
Q
0
OFF
Q
0
ON
Q
7
OFF
Q
7
ON
90%
90%
90%
Symbol
Parameter
V
DD
Min
Max
Unit
V
DD
Logic supply voltage
10.0
13.2
V
V
O
Output Voltage referenced to V
SS
0
320
V
V
IH
Input High Voltage
12V
V
DD
- 2
V
DD
V
V
IL
Input Low Voltage
12V
0
2.0
V
T
A
Operating Free-Air Temperature
0
70
C
Note:
1. All voltages are referenced to V
SS
.
Recommended Operating Conditions
(For maximum reliability, nominal operating conditons should be selected so that operation is always within the following ranges.)
AN0332
Data
Write Disable
Reset
Addressed Output
Unaddressed Outputs
H
L
L
On
Holdspriv.
L
Off
H
H
L
Holdspriv.
Holdspriv.
L
H
L
H
On
Off
L
Off
H
H
H
Off
Off
L
Mode Selection
Timing Diagram
Figure 1
OBSOLETE
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